KR100902103B1 - Method for fabricating capacitor and memthod for fabricating semiconductor device comprising the capacitor - Google Patents

Abstract

The present invention relates to a process for removing a -OH group present on the surface of an insulating film (including a dielectric film) and a method for manufacturing a capacitor of a semiconductor device which simplifies the equipment for carrying out this process. And forming a capacitor, flushing the insulating film with a gas containing oxygen, and forming a metal electrode on the insulating film. The present invention described above includes flushing with a metal-based gas. Compared with the conventional process of forming the capacitor electrode after the treatment, the deposition equipment for forming the capacitor electrode can be simplified, thereby improving the reliability of the deposition equipment.

Capacitor, Dielectric Film, Insulation Film, Lower Electrode, Upper Electrode

Description

TECHNICAL FIELD OF THE INVENTION A method for manufacturing a capacitor and a method for manufacturing a semiconductor device including the capacitor TECHNICAL FIELD

1 is a cross-sectional view showing a method of forming a lower electrode of a capacitor according to the prior art.

2A to 2C are diagrams illustrating an adsorption reaction of a ruthenium lower electrode formed on the sacrificial layer pattern of FIG. 1.

3A to 3E are flowcharts illustrating a method of manufacturing a capacitor of a semiconductor device according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

101 substrate 102 interlayer insulating film

103: storage node contact plug

103A: Surface of flushed storage node contact plug

104: etch stop

104A: Flushed etch stop film surface

105: sacrificial film pattern

105A: Flushed sacrificial film pattern surface

106: open pattern 107: lower electrode 108: dielectric film

108A: Flushed dielectric film surface 109: Upper electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a manufacturing method of a capacitor during a semiconductor device manufacturing process.

Currently, MIM (Metal Insulator Metal) capacitors are mainly used as the capacitors of semiconductor devices to secure charge capacity required by semiconductor devices. The capacitor electrode of the MIM capacitor may be any one of a ruthenium film Ru, a platinum film Pt, a titanium nitride film TiN, an iridium film Ir, or a laminated film thereof, using an atomic layer deposition method (hereinafter, referred to as 'ALD'). It is formed on an insulating film including a dielectric film of high dielectric constant by a deposition method.

1 is a cross-sectional view showing a method of forming a lower electrode of a capacitor according to the prior art.

As shown in FIG. 1, in the method of forming a lower electrode of a capacitor according to the related art, first, an interlayer insulating film 12 is formed on a substrate 11 including a predetermined lower layer, and the interlayer insulating film 12 is formed. A storage node contact plug 13 (eg, a polysilicon film) is formed to penetrate and connect the junction region of the substrate 11 and the lower electrode 17 of the capacitor.

Subsequently, a sacrificial layer pattern 15 exposing the storage node contact plug 13 is formed on the resultant on which the storage node contact plug 13 is formed, and the sacrificial layer pattern 15 is formed along an upper step of the resultant. The lower electrode 17 is formed. Reference numeral '14', which is not described, denotes an etch stop layer 14, and '16' denotes an open pattern 16 for forming the lower electrode of the capacitor.

Here, the lower electrode 17 may be formed of any one of metals, that is, ruthenium layer Ru, platinum layer Pt, titanium nitride layer TiN, and iridium layer Ir by using an ALD deposition method, or a laminate thereof. have. For convenience of explanation, it is assumed that the lower electrode 17 is formed of a ruthenium film. In addition, the sacrificial film pattern 15 is an insulating film and will be described by taking a silicon oxide film (SiO ₂ ) as an example.

The ruthenium lower electrode 17 is formed of a source having a Cp-based ligand such as Ru (EtCp) ₂ . However, the hydroxyl group (hereinafter referred to as '-OH group') is formed on the surface on which the source is deposited, that is, the sacrificial layer pattern 15, the storage node contact plug 13, and the etch stop layer 14. If present, the adsorption reaction is insufficient to form a uniform lower electrode 17 as shown in FIG. In addition, the inadequate adsorption reaction means that a large number of incubation cycles are required.

2A to 2C illustrate adsorption reactions of the ruthenium lower electrode 17 formed on the sacrificial layer pattern 15 of FIG. 1. For convenience of explanation, the reference numerals of FIG. 1 will be referred to, and the sacrificial layer pattern 15 among the -OH group, the storage node contact plug 13, and the etch stop layer 14 is present. ) As representative.

2A to 2C, it can be seen that -OH groups exist on the surface of the sacrificial layer pattern 15.

When the ruthenium source 17B is introduced into the chamber including the sacrificial layer pattern 15, it can be seen that the ruthenium layer 17A cannot be formed on the surface where the -OH group is present. That is, the -OH group restricts the adsorption site of the ruthenium source 17B, thereby making the morphology of the ruthenium film 17A poor.

Therefore, as shown in FIG. 2C, an island-type ruthenium lower electrode 17 is formed.

In addition, the above problem is not only seen in the process for forming the lower electrode 17, but also occurs when forming the upper electrode of the capacitor. That is, the -OH group is present in the dielectric film of the capacitor to prevent the formation of the metal-based upper electrode.

To solve this problem, a metal-based source such as Ti precursor source consisting of Tetrakis Methylethylamido Titanium (TEMAT), Tetra DiMethylamine Titanium (TDMAT), Tetrakis Diethylamido Titanium (TDEAT) and Titanium Tetraisopropoxide (TTIP), TBTEMT, PEMATa (T [N (N)) C ₂ H ₅ ) CH ₃ ] ₅ ) and a technique for removing the -OH group using a source selected from a Ta precursor source consisting of PET (PolyEthylene Terephthlate), a source consisting of HfCl ₄ , TiCl ₄ and AlCl ₃ (Domestic Patent Registration Number: 10-0672766).

However, in the case of using such a metal-based chemical source, it is necessary to add a separate source supply line to the deposition apparatus for forming the ruthenium film 17. This source supply line includes line heaters, canisters for source storage and many valves for source supply, thus complicating the process and equipment for actual production.

Accordingly, there is a need for a technique for forming a metal-based lower electrode that effectively removes -OH groups to reduce the incubation cycle and simplifies the process and equipment.

The present invention has been proposed to solve the above-mentioned problems of the prior art, and a process for removing a -OH group present on the surface of the insulating film (including the dielectric film) and a capacitor manufacturing method for simplifying the equipment for performing the process and the capacitor It aims at providing the manufacturing method of the semiconductor element containing.

According to an aspect of the present invention for achieving the above object, forming an insulating film on a substrate, flushing the insulating film with a gas containing oxygen and forming a metal electrode on the insulating film It provides a method of manufacturing a capacitor comprising a.

Further, according to another aspect of the invention, forming an insulating film for exposing the plug on a substrate on which a conductive plug is formed, flushing a substrate including the insulating film with a gas containing oxygen, flushing It provides a semiconductor device manufacturing method comprising the step of forming a lower electrode along the step of the substrate, forming a dielectric film on the lower electrode and forming an upper electrode on the dielectric film.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

3A to 3E are flowcharts illustrating a method of manufacturing a capacitor of a semiconductor device according to an embodiment of the present invention.

As shown in FIG. 3A, an interlayer insulating film 102 is formed on a substrate 101 including a predetermined lower layer.

The lower layer includes components such as word lines and bit lines included in a dynamic random access memory (DRAM) device.

The interlayer insulating film 102 may be formed of an oxide-based material film such as a BSG (Boro Silicate Glass) film, a BOSG (Boro Phopho Silicate Glass) film, a PSG (Phospho Silicate Glass) film, a TEOS (Tetra Ethyl Ortho Silicate) film, and a SOG (Spin) film. On Glass) may be formed of any one or a laminated film thereof.

Subsequently, a storage node contact plug 103 is formed through the interlayer insulating layer 102 to connect the junction region of the substrate 101 and the lower electrode of the capacitor. The storage node contact plug 103 may be formed of a polysilicon film.

The etch stop layer pattern 104 and the sacrificial layer pattern 105 exposing the storage node contact plug 103 are formed on a resultant on which the storage node contact plug 103 is formed. An etch stop layer pattern 104 and a sacrificial layer pattern 105 are formed to form an open pattern 106 for forming a lower electrode of the capacitor.

The etch stop layer pattern 104 is a layer having a high etching selectivity with the sacrificial layer pattern 105. For example, when the sacrificial layer pattern 105 is a silicon oxide layer (SiO ₂ ), the etch stop layer pattern 104 is formed. It may be a silicon nitride film (Si ₃ N ₄ ).

The sacrificial film pattern 105, the storage node contact plug 103, and the etch stop film pattern 104 have a hydrophilic surface. Therefore, -OH groups are easily adsorbed on these surfaces. The -OH group is absorbed by the sacrificial layer pattern 105, the storage node contact plug 103, and the etch stop layer 104 from the air.

As shown in FIG. 3B, the resultant on which the sacrificial layer pattern 105 is to be formed is flushed with an oxygen-based gas.

The flushing process is performed in a pretreatment process in an ALD or chemical vapor deposition (CVD) deposition chamber, which is a chamber for forming the lower electrode, before forming the lower electrode.

The flushing process proceeds with a gas containing oxygen, such as O ₂ or O ₃ gas, and proceeds for 1 to 500 seconds, continuously or divided several times. When the process proceeds several times every few seconds, the process of removing the unreacted gas is repeated by introducing a gas containing oxygen → purge gas into the chamber to remove unreacted gas → a gas containing oxygen → purging gas into the chamber.

At this time, the number of cycles can be changed as an experimental factor for controlling the -OH group, and the temperature can be controlled under the condition that no further oxidation occurs on the surface of the film in which the -OH group exists. In addition, when the O ₃ gas is used, the effect can be maximized by controlling the concentration of the O ₃ gas. The purge gas may be an inert gas such as argon (Ar) or nitrogen (N ₂ ) gas.

The flushing process of O ₂ gas proceeds at a chamber temperature of 100 to 500 ° C., and the flushing process of O ₃ gas is performed at a chamber temperature of 100 to 450 ° C. This temperature difference is because O ₃ gas is more reactive than O ₂ gas. Then, the flushing of the O ₃ gas is the density of the O ₃ gas in 100 ~ 400g / cm ^3.

When the flushing process proceeds as described above, oxygen (O) is bonded to the -OH group to remove the -OH group. That is, the -OH group is changed into the form of H ₂ O to change to the surface that ruthenium source is easy to adsorb.

The surface of the sacrificial layer pattern 105, the storage node contact plug 103, and the etch stop layer 104 in which the -OH group is removed by the flushing process is shown as '105A', '103A', and '104A', respectively.

As shown in FIG. 3C, the lower electrode material is formed along the upper step of the result of the flushing process and the node separation process is performed to form the lower electrode 107 in the open pattern 106.

The lower electrode 107 is a metal-based lower electrode, and any one or a laminated film of a ruthenium film Ru, platinum film Pt, titanium nitride film TiN, and iridium film Ir may be ALD deposited or CVD deposited. Form. The lower electrode 107 is formed at a chamber temperature of 200 to 400 ° C.

Here, the lower electrode 107 is flushed because the -OH group is removed from the surfaces 103A, 104A, and 105A of the storage node contact plug 103, the etch stop layer 104, and the sacrificial layer pattern 105 by a flushing process. The process is uniformly formed in the upper step of the resultant.

As shown in FIG. 3D, the dielectric film 108 is formed on the resultant on which the lower electrode 107 is formed.

The dielectric film 108 includes a zirconium oxide film (ZrO ₂ ), an aluminum oxide film (Al ₂ O ₃ ), a hafnium oxide film (HfO ₂ ), a tantalum oxide film (Ta ₂ O ₅ ), a titanium oxide film (TiO ₂ ), and a strontium titanium oxide film (SrTiO _3). ), BST (BaSrTiO ₃ ), and niobium oxide film (Nb ₂ O ₅ ), or a laminated film thereof, formed by ALD or CVD deposition.

At this time, the —OH group is also present on the surface of the dielectric film 108. This is because the dielectric film 108 also has hydrophilicity, so that the -OH group is easily adsorbed.

The surface of dielectric film 108 is then flushed.

The flushing process proceeds to a pretreatment process in an ALD or chemical vapor deposition (CVD) deposition chamber, which is a chamber for forming the upper electrode, before forming the upper electrode.

The flushing process proceeds with a gas containing oxygen, such as O ₂ or O ₃ gas, and proceeds for 1 to 500 seconds, continuously or divided several times. When the process proceeds several times every few seconds, the process of removing unreacted gas is repeated by adding gas containing oxygen → purge gas to remove unreacted gas → adding gas containing oxygen → purging gas into the chamber.

In this case, the number of cycles may be changed as an experimental factor for controlling the -OH group, and the temperature of the nitride film surface in which the -OH group is present may be controlled under a condition that no further oxidation occurs. In addition, when using the O ₃ gas by controlling the concentration of O ₃ gas can maximize the effect. The purge gas may be an inert gas such as argon (Ar) or nitrogen (N ₂ ).

The flushing process of O ₂ gas proceeds at a chamber temperature of 100 to 500 ° C., and the flushing process of O ₃ gas is performed at a chamber temperature of 100 to 450 ° C. This temperature difference is because O ₃ gas is more reactive than O ₂ gas. Then, the flushing of the O ₃ gas is the density of the O ₃ gas in 100 ~ 400g / cm ^3.

When the flushing process proceeds as described above, oxygen (O) is bonded to the -OH group to remove the -OH group. That is, the -OH group is changed into the form of H ₂ O to change the surface of the ruthenium source is easy to adsorb.

The surface of the dielectric film 108 having the -OH group removed by the flushing process is shown as '108A'.

As shown in FIG. 3E, the upper electrode 109 is formed along the upper step of the result of the flushing process.

The upper electrode 109 is a metal-based lower electrode. The upper electrode 109 is one of a ruthenium film Ru, a platinum film Pt, a titanium nitride film TiN, and an iridium film Ir, or a stacked film thereof, by ALD deposition method or CVD deposition method. Form. The upper electrode 109 is formed at a chamber temperature of 200 to 400 ° C.

Here, the upper electrode 109 is uniformly formed in the upper step of the dielectric film 108 because the -OH group is removed from the surface 108A of the dielectric film 108 by a flushing process.

The lower electrode 107 and the upper electrode 109 can be uniformly formed by the flushing process, thereby reducing the incubation cycle.

Next, although not shown, a capacitor node isolation process for forming individual capacitors is performed. The capacitor node separation process may be performed by chemical mechanical polishing or etch back process. Since the impurities such as abrasives or etched particles may be attached inside the open pattern 106, step coverage may be performed. Open pattern 106 as a photoresist layer with excellent coverage characteristics After filling the inside, it is preferable to perform polishing or etching back to a target in which the upper portion of the sacrificial film pattern 105 is exposed. After the polishing or etch back process, the photoresist layer is ashed and removed.

Subsequently, the sacrificial film pattern 105 is removed to form a cylinder type individual capacitor.

In the embodiment of the present invention, in order to stably remove the -OH group present on the surface of the insulating film (including the dielectric film), the insulating film having the -OH group is flushed using a gas containing oxygen. When flushing with oxygen-containing gas, -OH group can be removed, effectively inducing adsorption reaction of Cp-based metal film source, reducing incubation cycle, and maximizing adsorption reaction site. have.

By controlling the surface of the film on which the electrodes 107 and 109 of the capacitor are formed in the above manner, it is possible to solve the problem of complicated process and equipment by using a conventional metal source. That is, the gas containing oxygen can solve the above problems because the above gas can be introduced in the ALD or CVD deposition chamber for forming the electrodes 107, 109 of the capacitor.

More specifically, when a ruthenium oxide film containing ruthenium and oxygen is formed using a Cp-based ruthenium source in an in-situ process, the ruthenium source in an ALD or CVD device is used because oxygen is used as a ruthenium reaction gas. The flushing process can proceed prior to supply. If the ruthenium oxide film is formed by an ex-situ process, the ruthenium oxide film should be formed within the time that no -OH group occurs after the flushing process.

The above method is not only applied to ruthenium oxide film but also to platinum oxide film and iridium oxide film.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

For example, the capacitor of the embodiment is formed to have a concave shape, but may also be formed in a planar shape or a cylinder shape.

As described above, the present invention can increase the productivity by reducing the incubation cycle for forming the capacitor electrode.

In addition, as compared with the conventional process of forming a capacitor electrode after flushing with a metal-based gas, it is possible to simplify the deposition apparatus for forming the capacitor electrode, thereby improving the reliability of the deposition apparatus.

Therefore, a semiconductor device having a DRAM capacitor electrode of 60 nm or less can be stably manufactured.

Claims (32)

delete delete delete delete delete delete delete delete delete delete delete Forming an insulating film on the substrate on which the conductive plug is formed to expose the plug; First flushing the substrate including the insulating layer with a gas containing oxygen to remove hydroxyl groups; Forming a metal lower electrode along a step of the flushed substrate; Forming a dielectric film on the lower electrode; Second flushing the dielectric layer with a gas containing oxygen to remove hydroxyl groups; And Forming a metal upper electrode on the dielectric layer Semiconductor device manufacturing method comprising a. delete The method of claim 12, The first flushing step is a semiconductor device manufacturing method proceeds with O ₂ or O ₃ gas. The method of claim 14, The first flushing is performed for 1 to 500 seconds, continuously or several times divided by several seconds. The method of claim 14, The first flushing proceeds to the O ₂ gas proceeds at a chamber temperature of 100 ~ 500 ℃. The method of claim 14, The first flushing proceeds to the O ₃ gas is a semiconductor device manufacturing method proceeds at a chamber temperature of 100 ~ 450 ℃. The method of claim 14, The first flushing proceeds to the O ₃ gas to advance the concentration of the O ₃ gas to 100 ~ 400g / cm ³ . The method of claim 12, And the first flushing is performed in a pretreatment prior to forming the metal-based lower electrode in an ALD and CVD deposition chamber for forming the metal-based lower electrode. The method of claim 12, The second flushing step is performed in a pretreatment prior to forming the metal-based upper electrode in an ALD and CVD deposition chamber. delete The method of claim 12, The metal lower electrode may be formed of any one selected from the group consisting of a ruthenium film Ru, a platinum film Pt, a titanium nitride film TiN, and an iridium film Ir. The method of claim 12, The metal-based lower electrode is a semiconductor device manufacturing method formed by the ALD deposition method or CVD deposition method. The method of claim 12, The metal-based lower electrode is formed at a chamber temperature of 200 to 400 ℃. The method of claim 12, The dielectric film may be a zirconium oxide film (ZrO ₂ ), an aluminum oxide film (Al ₂ O ₃ ), a hafnium oxide film (HfO ₂ ), a tantalum oxide film (Ta ₂ O ₅ ), a titanium oxide film (TiO ₂ ), a strontium titanium oxide film (SrTiO ₃ ), A method for manufacturing a semiconductor device, which is formed of any one of BST (BaSrTiO ₃ ) and niobium oxide film (Nb ₂ O ₅ ) or a laminated film thereof. The method of claim 12, The dielectric film is formed by the ALD or CVD deposition method. delete The method of claim 12, The metal-based upper electrode is any one selected from the group consisting of ruthenium film (Ru), platinum film (Pt), titanium nitride film (TiN) and iridium film (Ir). The method of claim 12, The metal-based upper electrode is a semiconductor device manufacturing method formed by the ALD deposition method or CVD deposition method. The method of claim 12, The metal-based upper electrode is formed at a chamber temperature of 200 ~ 400 ℃. The method of claim 12, The plug is a semiconductor device manufacturing method of forming a polysilicon film. The method of claim 12, The insulating layer may be a silicon oxide layer (SiO ₂ ), a polysilicon layer, a silicon nitride layer (Si ₃ N ₄ ), a zirconium oxide layer (ZrO ₂ ), an aluminum oxide layer (Al ₂ O ₃ ), a hafnium oxide layer (HfO ₂ ), or a tantalum oxide layer (Ta). ₂ O _5), titanium oxide (TiO _2), strontium titanium oxide _{(SrTiO 3), BST (BaSrTiO} 3) and niobium oxide (Nb ₂ O ₅₎ the method for forming a semiconductor device of any one selected from the group consisting of.

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