KR100896583B1 - Manufacturing method of surface plasmon resonance semiconductor light emitting device - Google Patents

Abstract

Preparing a single crystal growth substrate, sequentially growing a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the single crystal growth substrate, and forming an upper surface of the second conductive semiconductor layer. Selectively etching to form a concave-convex structure, applying a wet etching process to a region damaged by etching of an upper surface of the second conductive semiconductor layer, and removing the damaged region and the second conductive semiconductor And forming a metal layer to form an interface such as the periodic concave-convex structure on the layer, wherein the forming of the concave-convex structure includes excitation of surface plasmon present in the metal layer by light emitted from the active layer. The table is characterized in that the recessed portion of the concave-convex structure is located to be spaced apart from the active layer by a distance that can be It provides a semiconductor light-emitting device manufacturing method using a plasmon resonance. According to the present invention, it is possible to obtain a method of manufacturing a semiconductor light emitting device using the expression plasmon resonance with improved internal quantum efficiency and light extraction efficiency by minimizing damage of the uneven structure for surface plasmon resonance.

Light emitting element, surface plasmon resonance, irregularities, dry etching, wet etching

Description

Method for manufacturing semiconductor light emitting device using surface plasmon resonance {MANUFACTURING METHOD OF SURFACE PLASMON RESONANCE SEMICONDUCTOR LIGHT EMITTING DEVICE}

1A to 1G are cross-sectional views of processes for manufacturing a semiconductor light emitting device according to one embodiment of the present invention.

2A to 2D are cross-sectional views of processes for manufacturing a semiconductor light emitting device according to another embodiment of the present invention.

3A illustrates an interfacial uneven structure of the p-type semiconductor layer and the metal layer according to the embodiment of FIG. 1, and FIGS. 3B and 3C illustrate uneven structures that may be employed in another embodiment.

<Code Description of Main Parts of Drawing>

11, 21: sapphire substrate 12, 22: buffer layer

13,23: n-type semiconductor layer 14,24: active layer

15,15`, 15``, 25: p-type semiconductor layer 16,26: metal layer

27: conductive substrate

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor light emitting device, and more particularly, to a method of manufacturing a semiconductor light emitting device using the expression plasmon resonance, which has improved internal quantum efficiency and light extraction efficiency by minimizing damage of uneven structure for surface plasmon resonance.

BACKGROUND A light emitting diode (LED) is a semiconductor device capable of generating light of various colors based on recombination of electrons and holes at a junction portion of a p and n type semiconductor when current is applied thereto. These LEDs have a number of advantages over filament based light emitting devices, such as long life, low power, excellent initial driving characteristics, high vibration resistance, and high tolerance for repetitive power interruptions. In recent years, group III nitride semiconductor light emitting devices capable of emitting light in a blue short wavelength region have been in the spotlight.

Despite these advantages, however, semiconductor light emitting devices, especially nitride semiconductor light emitting devices, exhibit low light extraction efficiency due to the large difference in refractive index between gallium nitride (refractive index of about 2.4) and external materials (typically refractive index of about 1.0 as air). This is because a large part of the light emitted from the light emitting device is totally reflected and disappeared without being emitted to the outside.

In order to solve this problem, a method of forming an uneven structure on the surface of the semiconductor layer which is generally present in the direction of light emission is used. That is, the path of light is changed by the uneven structure formed in the direction of light emission, thereby reducing the amount of total reflection.

However, the method of improving the light extraction efficiency by the uneven structure, that is, the method of improving the external light extraction efficiency can be seen as a fundamental method of improving the light extraction efficiency as the light emitted from the inside is well emitted to the outside. There is no. Therefore, a method of increasing the amount of light generated through a method such as increasing the generation probability of light inside the light emitting device is required.

The present invention is to solve the above problems of the prior art, an object of the present invention is to minimize the damage of the concave-convex structure for the surface plasmon resonance, the semiconductor light emitting device using the expression plasmon resonance improved internal quantum efficiency and light extraction efficiency It is to provide a manufacturing method.

In order to solve the above technical problem, the present invention,

Preparing a single crystal growth substrate, sequentially growing a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the single crystal growth substrate, and forming an upper surface of the second conductive semiconductor layer. Selectively etching to form a concave-convex structure, applying a wet etching process to a region damaged by etching of an upper surface of the second conductive semiconductor layer, and removing the damaged region and the second conductive semiconductor And forming a metal layer to form an interface such as the periodic concave-convex structure on the layer, wherein the forming of the concave-convex structure includes excitation of surface plasmon present in the metal layer by light emitted from the active layer. The table is characterized in that the recessed portion of the concave-convex structure is located to be spaced apart from the active layer by a distance that can be It provides a semiconductor light-emitting device manufacturing method using a plasmon resonance.

Preferably, the first conductive semiconductor layer may be an n-type semiconductor layer, and the second conductive semiconductor layer may be a p-type semiconductor layer.

The step of forming the concave-convex structure may be performed by dry etching, and preferably, may be performed by Inductive Coupled Plasma / Reactive Ion Etching (ICP / RIE).

The etching solution used in the wet etching step to remove the damaged region generated in the uneven structure forming step is preferably an aqueous solution of a material selected from the group consisting of NaOH, KOH, HF, BOE, H ₃ PO ₄ .

The method may further include applying heat to the etchant used in the wet etching step, and may irradiate the damaged area with ultraviolet rays during the wet etching step.

On the other hand, the predetermined distance is a distance at which the surface plasmon present at the interface with the second conductivity-type semiconductor layer by the light emitted from the active layer can be excited, in this case, between the recessed portion of the uneven structure and the active layer It is preferable that the distance of is 10-50 nm.

The metal layer is made of a material selected from the group consisting of Ag, Al, Au, and alloys thereof, and is suitable for using the surface plasmon phenomenon.

In relation to the concave-convex structure, the height of the concave-convex structure is preferably 10 to 500 nm, the period of the concave-convex structure is preferably 10 to 1000 nm, the width of the convex portion of the concave-convex structure is 10 to 1000 nm.

Preferably, the first conductive semiconductor layer, the active layer and the second conductive semiconductor layer may be formed of nitride to emit short wavelength light such as blue light.

The method may further include growing a buffer layer on the single crystal growth substrate before growing the first conductive semiconductor layer on the single crystal growth substrate.

The single crystal growth substrate may be a light transmissive substrate, and in this case, the semiconductor light emitting device may have a flip chip shape.

Further, after the forming of the metal layer, the method may further include forming a conductive support substrate on the metal layer and removing the single crystal growth substrate. In this case, the semiconductor light emitting device may have a vertical structure. Can be. The removing of the single crystal growth substrate may be performed by a laser liftoff or chemical liftoff process.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

1A to 1G are cross-sectional views of processes for manufacturing a semiconductor light emitting device according to one embodiment of the present invention.

First, as shown in FIG. 1A, the buffer layer 12, the n-type semiconductor layer 13, the active layer 14, and the p-type semiconductor layer 15 are sequentially grown on the sapphire substrate 11.

The sapphire substrate 11 is a crystal having hexagonal-Rhombo R3c symmetry and has an uneven constant of c. The orientation plane includes a C (0001) plane, an A (1120) plane, an R (1102) plane, and the like. In the case of the C surface of the sapphire substrate 11, since the growth of the nitride film is relatively easy and stable at a high temperature, it is mainly used as a substrate for nitride growth.

However, in the present embodiment, a sapphire substrate is used as the light-transmissive substrate for single crystal growth, but the present invention is not limited thereto, and a substrate made of a material such as SiC, Si, MgAl ₂ O, MgO, LiAlO ₂ , LiGaO _2, or the like may be employed. have.

The buffer layer 12 is formed between the sapphire substrate 11 and the n-type semiconductor layer 13 to reduce stress of the semiconductor layers formed thereon. In general, the buffer layer 12 is preferably a low temperature nucleus growth layer such as AlN or GaN.

The n-type semiconductor layer 13 and the p-type semiconductor layer 15 may be a nitride semiconductor for emitting light of a short wavelength, specifically, Al _x In _y Ga _(1-xy) N (where 0≤ n-type impurity and p-type impurity having x ≦ 1, 0 ≦ y ≦ 1, and 0 ≦ x + y ≦ 1). Representative materials include GaN, AlGaN, InGaN. Here, Si, Ge, Se, Te or C may be used as the n-type impurity, and the p-type impurity may be representative of Mg, Zn or Be.

The layers formed on the sapphire substrate 11 may use known semiconductor layer growth processes such as organometallic vapor deposition (MOCVD), molecular beam growth (MBE) and hybrid vapor deposition (HVPE).

Subsequently, as shown in FIG. 1B, the upper surface of the p-type semiconductor layer 15 is selectively etched to form a periodic uneven structure. This is to form a periodic uneven structure at the interface between the p-type semiconductor layer 15 and the metal layer 16 as shown in FIG. This converts the surface plasmon wave present at the interface into light that can be radiated to the outside of the semiconductor light emitting device 10, in particular, toward the active layer 14 (or the sapphire substrate 11). It is for.

This will be described in more detail as follows.

Surface plasmons are collective charge density oscillations of electrons occurring on the metal thin film surface, and the surface plasmon waves generated are surface electromagnetic waves propagating along the interface between the metal and the dielectric. On the other hand, as a photo-electron effect in metals such as gold (Au), when light of a specific wavelength is irradiated onto the metal, a resonance phenomenon occurs in which most of the light energy is transferred to free electrons. As a result, the phenomenon that occurs when surface electromagnetic waves occur is called Surface Plasmon Resonance.

The conditions for the surface plasmon resonance to occur is the wavelength of the incident light, the refractive index of the material in contact with the metal, and the like, in particular, the distance between the light emitting layer and the metal thin film is very important. That is, surface plasmon resonance may occur when the distance between the light emitting layer and the metal thin film is less than or equal to a predetermined distance. In this embodiment, the distance between the active layer 14 and the metal layer 16 corresponds to this.

Therefore, in this embodiment, in order to use surface plasmon resonance, the distance between the active layer 14 and the metal layer 16, that is, the concave-convex portions formed in the recess-metal layer 16 of the concave-convex structure in the active layer 14 Based on the structure, it is preferable that the distance to the convex portion-is within a predetermined distance, specifically, 10 to 50 nm. The lower limit of the distance is set to 10 nm because most of the light in the metal layer 16 may be lost in the form of heat when the distance from the active layer 14 to the uneven structure is too close.

On the other hand, the surface plasmon wave formed by being excited by the incident light as described above is characterized in that it does not propagate from the metal surface to the inside or the outside when the metal layer has a flat surface. In this way, if the surface plasmon wave is not emitted to the outside but trapped inside the metal, the luminous efficiency will be significantly lowered. Therefore, it is necessary to emit the surface plasmon wave to the outside as light.

To this end, in the present embodiment, an uneven structure formed at the interface between the p-type semiconductor layer 15 and the metal layer 16 is adopted.

In order to emit the surface plasmon wave to the outside, the wave vector of the light and the wave vector of the surface plasmon in the p-type semiconductor layer 15 must match, which is the interface between the p-type semiconductor layer 15 and the metal layer 16. It can be achieved by the uneven structure formed in the.

Figures 3a to 3d is a form that can be employed as a concave-convex structure that can achieve this purpose.

The n-type semiconductor layer 35 of FIG. 3A is an example that can be employed in the structure of the n-type semiconductor layer 15 of FIG. The uneven structure formed on the upper surface has a convex portion having a rectangular pillar shape and a concave portion adjacent thereto. In this case, considering the side for effectively radiating the surface plasmon wave to the outside, the period (s) of the uneven structure and the width (w) of the convex portion are preferably 10 to 1000 nm, and the height (h) of the uneven structure It is preferable that it is 10-500 nm. In addition, as described above, in order to cause surface plasmon resonance, the distance t from the active layer to the recess is preferably 10 to 50 nm. Similarly, as shown in FIG. 3B, the concave-convex structure 35 'at the interface between the n-type semiconductor layer and the metal layer may have a semicircular cross section of the convex portion or a cylindrical shape of the convex portion.

3A and 3B, the concave-convex structures 45 and 45 'employable in the present invention may have a shape in which the convex portions and the concave portions are arranged in the longitudinal and transverse directions, respectively, as shown in FIGS. 3C and 3D. As shown, each convex portion may have various shapes such as a square or a circle in cross section. Each convex portion, however, in the present invention, the concave-convex structure is not limited to the illustrated embodiment, and various structures capable of radiating the surface plasmon wave to the outside, for example, the concave portion and the convex portion in FIGS. 3A to 3D. An inverted form or the like may be possible.

In connection with the method of forming the concave-convex structure described above, it is preferable to dry-etch the upper surface of the p-type semiconductor layer 15, for example, to form the pattern (P) by photolithography or other method and to ICP / RIE. Processes such as (Inductive Coupled Plasma / Reactive Ion Etching) can be used. However, the uneven structure forming method does not limit the broadest technical scope of the present invention, but is a part of various optional methods for carrying out the present invention.

Meanwhile, in the case of dry etching the p-type semiconductor layer 15 as described above, the damage region D may be generated around the etched region as illustrated in FIG. 1C.

That is, when dry etching is performed to give roughness or curvature to the p-type semiconductor layer, in particular, the p-GaN layer, defects such as voids, impurities, and dry etching residues occur on the semiconductor surface after etching, thereby reducing device efficiency. . Moreover, due to the preferential desorption of nitrogen by dry etching, a non-stoichiometric surface is formed, thereby reducing the reliability of the device and shortening the life of the device. In particular, the nitrogen vacancy (N-vacancy) generated by the escape of the nitrogen atom acts as an acceptor and may cause a decrease in luminous efficiency.

In order to solve this problem, as illustrated in FIG. 1D, the damaged region D is removed by a wet etching process. The damaged region D may be easily removed by wet etching as compared to the undamaged p-type semiconductor layer 15. In this case, the etchant used in the wet etching step is preferably an aqueous solution of a material selected from the group consisting of NaOH, KOH, HF, BOE, H ₃ PO ₄ . The method may further include applying heat to the etchant used in the wet etching process so that the etching is better, and irradiating ultraviolet rays to the damaged area during the wet etching process. You can also bias them.

Subsequently, as shown in FIG. 1E, the metal layer 16 is formed on the p-type semiconductor layer 15. Description of the metal layer 16 is as described above, it may be formed by a general metal layer forming process such as deposition, plating. In this case, the metal layer 16 is preferably made of a metal capable of exhibiting a surface plasmon phenomenon, specifically, metals having a negative dielectric constant and easy emission of electrons by an external stimulus such as Au, Ag, Al, etc. It can be used mainly. Among these, Ag having the sharpest surface plasmon resonance peak and Au showing excellent surface stability may be selected universally. In addition, an alloy of the above metals may be used as the metal layer 16. In addition, the metal layer 16 may be multi-layered together with Au, Ag, Al, and the like by using Ni, Pt, or the like to improve ohmic contact performance.

Next, as shown in FIG. 1F, a portion of the n-type semiconductor layer 13 is exposed by removing a portion of the metal layer 16, the p-type semiconductor layer 15, and the active layer 14 by mesa etching. However, in the present invention, a process of exposing a part of the n-type semiconductor layer 13 by mesa etching may be performed before forming the metal layer 16.

Lastly, as shown in FIG. 1G, p-side bonding electrodes 17b and n-side electrodes 17a are formed on a portion of the upper surface of the metal layer 16 and the exposed surface of the n-type semiconductor layer 13, respectively. As the formation process of the electrode structure, metal thin film deposition using APCVD, LPCVD, PECVD, etc. may be used. The final light emitting device that has undergone the electrode forming process as described above is the same as the semiconductor light emitting device 10 shown in FIG. 1G.

2A to 2D are cross-sectional views of processes for manufacturing a semiconductor light emitting device according to another embodiment of the present invention.

First, as shown in FIG. 2A, the buffer layer 22, the n-type semiconductor layer 23, the active layer 24, and the p-type semiconductor layer 25 are sequentially grown on the sapphire substrate 21. (25) The upper surface is etched to form the uneven structure. Thereafter, the metal layer 26 is formed on the upper surface of the p-type semiconductor layer 25. The growth process of each of the layers grown on the sapphire substrate 41 and the method of forming the uneven structure are as described in the embodiment of FIG.

Next, as illustrated in FIG. 2B, a conductive substrate 27 is formed on the upper surface of the metal layer 26. The conductive substrate 27 is an element included in the final light emitting device, and serves as a support for supporting the light emitting structure together with the p-side electrode of the final light emitting device. Specifically, the conductive substrate 27 may be Si, Cu, Ni, Au, W, Ti, and the like. The conductive substrate 27 may be formed through a deposition process, a plating process, or the like, and a plating process is preferable in terms of process efficiency. In this case, a plating process includes well-known plating processes, such as electroplating, non-electroplating, vapor deposition, etc. Among these, it is preferable to use the electroplating method which requires a short plating time. However, a method of bonding the conductive substrate 27 to the upper surface of the metal layer 26 may be used in addition to the method directly formed on the upper surface of the metal layer 26.

Subsequently, as shown in FIG. 2C, the laser lift-off process, that is, the laser beam L is irradiated to the lower surface of the sapphire substrate 21 to form the light emitting structure composed of n-type and p-type semiconductor layers, an active layer, a metal layer, and a conductive substrate. The sapphire substrate 21 is removed. In this case, the laser beam L is not irradiated to the entire surface of the sapphire substrate 21, but aligned to each of the light emitting structures separated by the size of the final light emitting element formed on the sapphire substrate 21 and irradiated a plurality of times. It is preferable. The step of removing the sapphire substrate 21 is most preferably a laser lift-off process as in the present embodiment, but the present invention is not limited thereto and may be separated through other mechanical or chemical lift-off processes.

Finally, as shown in FIG. 2D, n-side and p-side electrodes 28a and 28b are formed on the top surface of the conductive substrate 27 and the bottom surface of the buffer layer 22, respectively.

It is intended that the invention not be limited by the foregoing embodiments and the accompanying drawings, but rather by the claims appended hereto. Accordingly, various forms of substitution, modification, and alteration may be made by those skilled in the art without departing from the technical spirit of the present invention described in the claims, which are also within the scope of the present invention. something to do.

As described above, according to the present invention, a method of manufacturing a semiconductor light emitting device using the expressed plasmon resonance with improved internal quantum efficiency and light extraction efficiency may be obtained by minimizing damage of the uneven structure for surface plasmon resonance.

Claims (17)

Preparing a substrate for single crystal growth; Sequentially growing a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on the single crystal growth substrate; Selectively etching an upper surface of the second conductive semiconductor layer to form a periodic uneven structure; Removing the damaged region by applying a wet etching process to a region damaged by etching of an upper surface of the second conductive semiconductor layer; Forming a metal layer on the second conductive semiconductor layer to form an interface such as the periodic uneven structure; And And forming first and second electrodes electrically connected to the first and second conductive semiconductor layers, respectively. The step of forming the concave-convex structure is performed so that the concave portion of the concave-convex structure is spaced apart from the active layer by a distance of 10 to 50 nm so that the surface plasmon present in the metal layer is excited by the light emitted from the active layer. Method for manufacturing a semiconductor light emitting device using the surface plasmon resonance, characterized in that. The method of claim 1, The first conductive semiconductor layer is an n-type semiconductor layer, the second conductive semiconductor layer is a semiconductor light emitting device using a surface plasmon resonance, characterized in that the p-type semiconductor layer. The method of claim 1, Forming the uneven structure is a semiconductor light emitting device manufacturing method using surface plasmon resonance, characterized in that performed by a dry process. The method of claim 3, Forming the uneven structure is a method of manufacturing a semiconductor light emitting device using surface plasmon resonance, characterized in that performed by ICP / RIE (Inductive Coupled Plasma / Reactive Ion Etching). The method of claim 1, The etching solution used in the wet etching step is a method of manufacturing a semiconductor light emitting device using surface plasmon resonance, characterized in that the aqueous solution of a material selected from the group consisting of NaOH, KOH, HF, BOE, H ₃ PO ₄ . The method of claim 1, The method of manufacturing a semiconductor light emitting device using surface plasmon resonance, characterized in that further comprising the step of applying heat to the etchant used in the wet etching step. The method of claim 1, The method of manufacturing a semiconductor light emitting device using surface plasmon resonance, characterized in that for irradiating the ultraviolet light to the damaged area during the wet etching step. delete The method of claim 1, The metal layer is a method of manufacturing a semiconductor light emitting device using surface plasmon resonance, characterized in that consisting of a material selected from the group consisting of Ag, Al, Au and alloys thereof. The method of claim 1, The height of the uneven structure is a semiconductor light emitting device manufacturing method using surface plasmon resonance, characterized in that 10 ~ 500nm. The method of claim 1, The cycle of the uneven structure is a semiconductor light emitting device manufacturing method using surface plasmon resonance, characterized in that 10 ~ 1000nm. The method of claim 1, The width of the convex portion of the concave-convex structure is a semiconductor light emitting device manufacturing method using surface plasmon resonance, characterized in that 10 ~ 1000nm. The method of claim 1, The first conductive semiconductor layer, the active layer and the second conductive semiconductor layer is a semiconductor light emitting device manufacturing method using the surface plasmon resonance, characterized in that made of nitride. The method of claim 1, A method of manufacturing a semiconductor light emitting device using surface plasmon resonance further comprising the step of growing a buffer layer on the single crystal growth substrate before the first conductive semiconductor layer is grown on the single crystal growth substrate. The method of claim 1, The method for manufacturing a semiconductor light emitting device using surface plasmon resonance, characterized in that the single crystal growth substrate has a light transmitting property. The method of claim 1, After forming the metal layer, Forming a conductive support substrate on the metal layer and removing the single crystal growth substrate further comprising the step of manufacturing a semiconductor light emitting device using surface plasmon resonance. The method of claim 16, The removing of the single crystal growth substrate is performed by laser liftoff or chemical liftoff process.

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