KR100844328B1 - Digital broadcasting receiver and his control method - Google Patents

Abstract

The present invention relates to a digital broadcast receiver, in order to reduce the cost by using a low-cost microcomputer instead of expensive CFI in order to implement an A / V output which is a function of DTV. To this end, the present invention comprises a user interface for inputting a user command; A tuner / demodulator for receiving a broadcast signal of a channel and converting the channel into a digital data stream when a desired channel is selected by a user; A demux / emp decoder which selects and stores the digital data stream of the tuner / demodulator in an MPEG memory and reads the stored digital data stream in an MPEG manner; A microcomputer generating a command set for performing a control operation corresponding to a user command input from the user interface unit; A control unit configured to receive a command set generated by the microcomputer and to analyze the command set and accordingly perform an interface between the microcomputer and the demux / epect decoder; It comprises a plurality of buffers for temporarily storing the data required for access between the microcomputer and the demux / MPEG decoder.

Description

Digital broadcast receiver and control method thereof {DIGITAL BROADCASTING RECEIVER AND HIS CONTROL METHOD}

1 is a block diagram showing a schematic configuration of a conventional digital broadcast receiver.

2 is a flowchart illustrating a control method of a conventional digital broadcasting receiver.

3 is a block diagram showing a schematic configuration of a digital broadcast receiver of the present invention;

4 is a block diagram showing the configuration of a control unit in FIG.

Fig. 5 is a block diagram showing the configuration of the command controller in Fig. 4;

FIG. 6 is a block diagram showing the configuration of a buffer / device controller in FIG. 5; FIG.

7 is a flowchart illustrating a control method of the digital broadcast receiver of the present invention.

FIG. 8 is a flowchart of operation of the second process in FIG. 7; FIG.

Fig. 9 is a flowchart of operation for the second step in Fig. 7;

Fig. 10 is a flowchart of operation of the third step in Fig. 7;

Fig. 11 is a block diagram showing the configuration of a command set in Fig. 3;

***** Description of the symbols for the main parts of the drawings *****

10: User interface unit 11: Tuner / demodulator

13: Controller 14: Demux / MPEG decoder

15: MPEG memory B1-BN: Buffer

The present invention relates to a digital broadcast receiver, and in particular, in order to implement A / V output, which is a function of DTV, to reduce costs while implementing A / V output, which is a function of DTV, with a low cost micom instead of expensive C. A digital broadcast receiver and a control method thereof are provided.

In general, since a digital broadcast receiver includes an OS, a high performance CPU, a large amount of RAM, a large data transfer amount, a processor capable of performing high performance graphics, etc. are required to operate the OS, which will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram illustrating a conventional digital broadcast receiver. As shown in FIG. 1, when a desired channel is selected by a user, a tuner / demodulator (1) receives a broadcast signal of a corresponding channel, converts it into a digital data stream, and outputs the converted data. )Wow; By controlling the CPI 4, the digital data stream of the tuner / demodulator 1 is selected and stored in the MPEG memory 7, and the stored digital data stream is read, decoded by the MPEG method, and output through the output line. Demux / emppe decoder 2; A RAM 3 commonly connected to the system bus and used for the control operation of the CPI 4; A CPI 4 for performing a control operation corresponding to a user command input from the user interface unit 5 via the system bus; It consists of a user interface 5 for inputting user commands.

FIG. 2 is a flowchart illustrating an operation of a conventional digital broadcasting receiver. When a desired channel is selected as shown in the drawing, a first process of initializing the demux / emp decoder 2 by CPI is performed; A second process of reading channel information data from the demux / emp decoder (2); A third step of writing relevant data for decoding the digital data stream to the demux / emp decoder (2); The CPI 4 comprises a fourth process of writing OSD data to the demux / mpeg decoder 2 and repeating the above-described process when the channel is changed, and this conventional technology will be described.

First, when the desired channel is selected by the user, the tuner / demodulator 1 is set to transmit the transport stream data (TP stream data) for the current channel to the demux / emp decoder (2).

The demux / mpeg decoder 2 extracts program information (audio PD, video PD, user data PD, etc.) for the current channel from the digital data stream and applies it to the CPI through a bus. The CPU 4 reads the program information and sets the PID for stream decoding in the demux / emp decoder.

Accordingly, the demux / mpeg decoder 2 outputs an audio / video signal by performing MPEG decoding.

In the above-described conventional apparatus, a digital broadcast receiver requiring only simple audio / video output has a problem in that a high performance CPU and a large RAM for operating an OS are included, thereby increasing the cost.                         

In addition, the low cost digital broadcasting receiver, which does not need to use colorful graphic data with a large amount of data transmission, does not require an OS and does not need a high performance CPU and RAM.In a digital broadcasting receiver that outputs simple video / audio signals, the OS, CPU, RAM is provided to increase the price.

In other words, since a general DTV includes an OS, a high performance CPU, a large amount of RAM, a large data transfer amount, and a processor capable of performing high-performance graphics processing are required, thereby increasing costs.

The present invention has been made to solve the above problems, in order to realize the A / V output which is a function of the DTV, a digital broadcast receiver and its control to reduce the cost by using a low-cost microcomputer instead of expensive CPU The purpose is to provide a method.

The present invention for achieving the above object, the user interface for inputting a user command; A tuner / demodulator for receiving a broadcast signal of a channel and converting the channel into a digital data stream when a desired channel is selected by a user; A demux / emp decoder which selects and stores the digital data stream of the tuner / demodulator in an MPEG memory and reads the stored digital data stream in an MPEG manner; A microcomputer generating a command set for performing a control operation corresponding to a user command input from the user interface unit; A control unit configured to receive a command set generated by the microcomputer and to analyze the command set and accordingly perform an interface between the microcomputer and the demux / epect decoder; And a plurality of buffers for temporarily storing data necessary for access between the microcomputer and the demux / emp decoder.

In order to achieve the above object, the present invention executes a command set from a microcomputer to a plurality of buffers, and writes data for a demux / emppe decoder to the plurality of buffers or writes the data written to the buffers. A first process of reading; And executing a command set from the buffer to the demux / emp decoder to perform a second process of controlling data input / output between the buffer and the demux / emp decoder.

Hereinafter, operations and effects of the digital broadcast receiver and its control method according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a block diagram showing an embodiment of a digital broadcast receiver of the present invention, which includes a user interface unit 10 for inputting a user command as shown in the figure; A tuner / demodulator 12 for receiving a broadcast signal of a corresponding channel and converting it into a digital data stream when a desired channel is selected by a user; A demux / emp decoder (14) which selects and stores the digital data stream of the tuner / demodulator (12) in the MPEG memory (15) and reads the stored digital data stream in an MPEG manner; A microcomputer 11 for generating a command set for performing a control operation corresponding to a user command input from the user interface unit 10; A control unit 13 which receives a command set generated by the microcomputer 11 and analyzes the command set and accordingly performs an interface between the microcomputer 11 and the demux / emp decoder 12; It consists of a plurality of buffers (B1 ~ BN) for temporarily storing the data required for access between the microcomputer 11 and the demux / MPEG decoder 14.

The control unit 13, as shown in Figure 4, the microcomputer interface unit 20 for interfacing the command signal of the microcomputer 11; A command controller 21 for receiving a command set of the microcomputer 11 and analyzing the command set; A plurality of buffer controllers BC1 to BCN respectively outputting input / output control signals of the buffers B1 to BN according to the command set analyzed by the command controller 21; A plurality of buffer interface units BI1 to BIN for respectively interfacing the input / output control signals output from the buffer controllers BC1 to BCN to the corresponding buffers B1 to BN; A device controller (22) for controlling demux and decoding in accordance with the command set analyzed in the command controller (21); And a device interface unit 23 for interfacing the decoding control signal output from the device controller 22 to the demux / emp decoder 24.

The command controller 21 includes a buffer / device controller 30 for controlling each of the selected buffer controllers BC1 to BCN and the device controller 22, as shown in FIG. A start address buffer 31 for storing a start address; A data size buffer 32 for storing a data size; A state buffer 33 for storing states of the respective buffer controllers BC1 to BCN and the device controller 22; And a command interpreter 34 for interpreting the command set.

As shown in Fig. 6, the buffer / device controller 30 includes: a state processor 40 for informing the command controller 21 of the state of the buffer / device controller 30; A start address buffer 41 for storing a start address output from the command controller 21; A data size buffer (43) for storing the data size output from the command controller (21); An address generator 42 for generating an address to each of the buffers B1 to BN and the demux / epect decoder based on the start address and the data size; A control signal generator 44 for generating a control signal according to the command set and outputting the control signal to each of the buffers B1 to BN and the demux / epect decoder 2; The control signal of the control signal generator 44 is composed of a data buffer 45 for inputting and outputting data between the plurality of buffers B1 to BN and the demux / emp decoder 2.

FIG. 7 is a flowchart illustrating a control method of the digital broadcast receiver of the present invention. As shown in FIG. 7, a command set from the microcomputer 11 to the plurality of buffers B1 to BN is executed, and the demux / empek decoder 14 is performed. A first process of writing data about the data into the plurality of buffers B1 to BN or reading the data written to the buffers B1 to BN; A second process of controlling a data input / output between the buffers B1 to BN and the demux / mpeg decoder 14 by executing a command set from the plurality of buffers B1 to BN to the demux / MPE decoder 14. and; The command set from the microcomputer 11 to the buffers B1 to BN and the command set from the buffers B1 to BN to the demux / mppe decoder 14 are used to externally display the OSD data through the demux / empep decoder 14. The third process is to output.

 The second process includes, as shown in FIG. 8, a first step of receiving a desired command set from the microcomputer 11 when the demux / emp decoder 12 is prepared; A second step of performing a control operation corresponding to the command set; A third step is performed to control the buffers B1 to BN and the demux / emp decoder 14.

In the second step, as shown in FIG. 9, a control signal, a start address, and a data size for the buffers B1 to BN and the demux / MPE decoder 14 included in the transmitted command set are extracted. Steps; Extracting the execution bit included in the transmitted command set, and if the execution bit is set, performing control of the buffers B1 to BN and the demux / emp decoder 12.

The third step includes a first step of setting a start address and a data size of a command set as shown in FIG. When the execution bit is set up, a second step of outputting an address and a control signal to write the data of the buffers B1 to BN to the corresponding register of the demux / emp decoder 14 is performed.

The operation of the present invention configured as described above will be described.

First, when a user inputs to the microcomputer 11 through the user interface unit 10, the microcomputer 11 applies a command set to the controller 13 to perform a control operation corresponding to the user's command. .

In this case, the command set is a signal for initializing the demux / emp decoder 12, and includes command data, a target start address, a target data size, and an execution bit. Referring to FIG. The data is '1' (data write command from the microcomputer 11 to the buffer B1), the target start address is the start address of the buffer B1, the target data size is the amount of data to be written, and the execution bit.

The controller 13 receives a command set generated by the microcomputer 11, analyzes the command set, and accordingly performs an interface between the microcomputer 11 and the demux / emp decoder 12.                     

That is, the microcomputer interface unit 20 interfaces the command set of the microcomputer 11 to the command controller 21, and the command controller 21 receives the command set of the microcomputer 11 and analyzes the command set. The command set is applied to the plurality of buffer controllers BC1 to BCN. When the execution bit of the command set is set, the buffer controller BC1 is enabled, and the device initialization data is buffered by the amount of data in the command set. Light on.

That is, the plurality of buffer controllers BC1 to BCN respectively output the input / output control signals of the buffers B1 to BN according to the command set analyzed by the command controller 21.

Thereafter, the input / output control signals output from the buffer controllers BC1 to BCN are respectively interfaced to the buffers B1 to BN through the buffer interface units BI1 to BIN, and the corresponding buffer controllers BC1 to BCN are not-busy. Notifies the control unit 13 that it is a state.

In addition, the device controller 22 interfaces with the demux / emp decoder 24 through the device interface 23 for controlling demux and decoding according to the command set analyzed by the command controller 21. .

Thereafter, in order to write the initialization data stored in the buffers B1 to BN to the demux / mpeg decoder 14, the microcomputer 11 sets the command data value of the command set to '11' to the control unit 13. 2 Send a command packet (command, target start address, target data size, source start, address, source data size, execution bit).

In the device controller 22, a target start address and a target data size are set, and in the buffer controllers BC1 to BCN, a source start address and a source data size are set.

At this time, the buffer controllers BC1 to BCN and the device controller 22 are enabled when the execution bit is received, and the data stored in the buffers B1 to BN are demux / empecode decoder 14 through the device controller 22. ) Is written to the corresponding register, and when the write is completed, the controller 13 notifies the control unit 13 that the buffer controllers BC1 to BCN and the device controller 22 are in a Not Busy state, and the demux / emp decoder 24 is initialized.

In order to obtain the program information (Augio PID, Video PID, User Data PID) for the current channel from the demux / mpeg decoder 14, the data is moved from the demux / empde decoder 14 to the target buffer B2. When executing the second command packet for the program information data of the channel is moved to the target buffer (B2).

At this time, the microcomputer 11 executes a first command packet for data reading from the buffer B2, reads program information for the current channel from the buffer B2, and decodes PID information for decoding. It writes on (14).

Further, when the microcomputer 11 executes a data write command to the buffer B1 and executes a data write command from the buffer B1 to the demux / empdecoder 14, the demux / empdecoder ( 14) decodes and outputs an audio / video stream corresponding to the set PID.

On the other hand, the command set from the microcomputer 11 to the plurality of buffers B1 to BN and the plurality of buffers B1 to BN to write the OSD data (current channel display, time display, etc.) to the demux / mpeg decoder 14. Command) to the demux / empdecoder 14 to output the audio / video signal through the demux / amplifier decoder 14.                     

The present invention will be described in more detail. First, the microcomputer 11 executes a command set to a plurality of buffers, and writes data for the demux / MPE decoder 14 to the plurality of buffers B1 to BN. Next, a command set is executed from the buffers B1 to BN to the demux / emp decoder 24 to control data input / output between the buffers B1 to BN and the demux / emp decoder 14.

That is, when the demux / mpeg decoder 14 is prepared, after receiving the desired command set from the microcomputer 11, the control operation corresponding to the command set is performed. The command set is received to receive the buffers B1 to BN and After extracting the control signal, the start address, and the data size for the demux / mpeg decoder 14, and extracting the execution bit, if the execution bit is set, the buffers B1 to BN and the demux / empede decoder 14 are extracted. Perform control of the.

 Then, control operations are performed for each of the buffers B1 to BN and the demux / emp decoder 14. After setting the start address and data size of the command set, and executing the execution bit, the buffers B1 to BN are performed. A control operation is performed by outputting an address and a control signal so that the data of BN) is written to the corresponding register of the demux / emp decoder 14.

At this time, a command set from the microcomputer 11 to the buffers B1 to BN and a command set from the buffers B1 to BN to the demux / mpeg decoder 14 are used to display the OSD data into the demux / empeg decoder 14. Output to the outside through.

Specific embodiments or examples made in the detailed description of the present invention are intended to clarify the technical contents of the present invention to the extent that they should not be construed as limited to these specific embodiments and should not be construed in consultation. Various changes can be made within the scope of.

As described in detail above, the present invention reduces the cost by using a low-cost microcomputer instead of the expensive CPI that causes the price increase in order to implement a digital broadcast receiver for receiving a simple A / V signal without an OS. Has the effect of.

Claims (10)

A user interface unit for inputting a user command; A tuner / demodulator for receiving a broadcast signal of a channel and converting the channel into a digital data stream when a desired channel is selected by a user; A demux / emp decoder which selects and stores the digital data stream of the tuner / demodulator in an MPEG memory and reads the stored digital data stream in an MPEG manner; A microcomputer generating a command set for performing a control operation corresponding to a user command input from the user interface unit; A control unit configured to receive a command set generated by the microcomputer and to analyze the command set and accordingly perform an interface between the microcomputer and the demux / epect decoder; And a plurality of buffers configured to temporarily store data necessary for access between the microcomputer and the demux / emp decoder. The method of claim 1, wherein the command set generated in the microcomputer is: A first command packet composed of command data, a target start address, a target data size, and an execution bit; And a second command packet comprising a command data, a target start address, a target data size, a source start address, a source data size, and an execution bit. The method of claim 1, wherein the control unit, A micom interface unit for interfacing the command signal of the micom; A command controller for receiving a command set of the microcomputer and analyzing the input command set; A plurality of buffer controllers each outputting an input / output control signal of a corresponding buffer according to the command set analyzed by the command controller; A plurality of buffer interface units which respectively interface input / output control signals output from the buffer controller to a corresponding buffer; A device controller for controlling demux and decoding according to the command set analyzed in the command controller; And a device interface unit for interfacing the decoding control signal output from the device controller to the demux / emp decoder. The method of claim 3, wherein the command controller, A buffer / device controller for controlling each selected buffer controller and the device controller; A start address buffer for storing a start address; A data size buffer for storing a data size; A status buffer for storing states of each of the buffer controller and the device controller; A digital broadcast receiver comprising a command interpreter for interpreting a command set. The method of claim 4, wherein the buffer / device controller, A status processor for informing a status of the buffer / device controller to the command controller; A start address buffer for storing a start address output from the command controller; A data size buffer for storing a data size output from the command controller; An address generator for generating an address to each buffer and to the demux / emp decoder based on the start address and the data size; A control signal generator for generating a control signal according to a command set and outputting the generated control signal to each buffer and the demux / emp decoder; And a data buffer for inputting and outputting data between the plurality of buffers and the demux / emp decoder in response to a control signal of the control signal generator. Executing a command set from a microcomputer to a plurality of buffers to write data for a demux / emppe decoder to the plurality of buffers or to read data written to the buffers; And executing a command set from the buffer to the demux / emp decoder to control data input / output between the buffer and the demux / emp decoder. The method of claim 6, wherein the second process, A first step of receiving a desired command set from the micom when the demux / emp decoder is prepared; A second step of performing a control operation corresponding to the command set; And a third step of performing a control operation on each buffer and the demux / emp decoder. The method of claim 7, wherein the second step, Extracting a control signal, a start address, and a data size for the buffer included in the transmitted command set and the demux / emp decoder; Extracting the execution bits included in the transmitted command set, and if the extracted execution bits are set up, controlling each of the buffers and the demux / emp decoders; Way. The method of claim 7, wherein the third step, Setting a start address and a data size of the command set; And when the execution bit is set, outputting an address and a control signal to write the data of the buffer to a corresponding register of the demux / emppe decoder. The method of claim 6, And performing a command set from the micom to the buffer and a command set from the buffer to the demux / emp decoder to output OSD data to the outside through the demux / emp decoder. A control method of a digital broadcast receiver.

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