KR100835435B1 - Method for making passivation in semiconductor device - Google Patents

Method for making passivation in semiconductor device Download PDF

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KR100835435B1
KR100835435B1 KR1020060118121A KR20060118121A KR100835435B1 KR 100835435 B1 KR100835435 B1 KR 100835435B1 KR 1020060118121 A KR1020060118121 A KR 1020060118121A KR 20060118121 A KR20060118121 A KR 20060118121A KR 100835435 B1 KR100835435 B1 KR 100835435B1
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film
passivation
nitride film
etching process
etching
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KR20080048142A (en
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이기민
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동부일렉트로닉스 주식회사
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Abstract

본 발명은 이미지센서 공정시 패시베이션 형성 기술에 관한 것으로, 패드 금속층 상부에 제 1 질화막, 산화막, 제 2 질화막을 순차 증착하고, 포토레지스트 패턴을 이용하는 제 1 식각 공정을 수행하여 상기 제 2 질화막을 제거하며, 산화막을 부분적으로 제거하고, 제 2 식각 공정을 수행하여 잔류하는 산화막을 모두 제거한 후, 잔류하는 상기 포토레지스트 패턴을 제거하며, 제 2 질화막 상부에 칼라 포토레지스트 패턴을 형성하고, 제 3 식각 공정을 통해 상기 제 1 질화막을 제거하는 것을 특징으로 한다. 본 발명에 의하면, 이미지센서 제조시 칼라 포토레지스트 공정 과정에서 현상 용액의 패드 금속 부식을 방지하고자, 보호막으로 SIN 막질을 사용함으로써, 패시베이션 막 증착 이후 추가적인 패드 보호막 증착 과정이 필요없어지므로, 공정의 단순화가 가능하고, 타 막질에 비해 내화확성이 뛰어난 SiN 막질을 이용함으로써 공정상 안정화할 수 있는 효과가 있다.The present invention relates to a passivation forming technology in an image sensor process, and sequentially deposits a first nitride film, an oxide film, and a second nitride film on a pad metal layer, and performs a first etching process using a photoresist pattern to remove the second nitride film. And partially removing the oxide film, performing a second etching process to remove all of the remaining oxide film, removing the remaining photoresist pattern, forming a color photoresist pattern on the second nitride film, and performing a third etching process. The first nitride film is removed through the process. According to the present invention, in order to prevent the corrosion of the pad metal of the developing solution in the color photoresist process during the manufacturing of the image sensor, by using the SIN film as a protective film, since the additional pad protective film deposition process is not necessary after the passivation film deposition, the process is simplified It is possible to, and by using the SiN film quality excellent in fire resistance compared to the other film quality there is an effect that can be stabilized in the process.

반도체, 이미지센서, 패시베이션, 칼라 PR, Develop 용액, SIN 보호막 Semiconductor, Image Sensor, Passivation, Color PR, Develop Solution, SIN Shield

Description

반도체 소자의 패시베이션 형성방법{METHOD FOR MAKING PASSIVATION IN SEMICONDUCTOR DEVICE} Passivation forming method of semiconductor device {METHOD FOR MAKING PASSIVATION IN SEMICONDUCTOR DEVICE}

도 1a 내지 도 1e는 종래 기술에 따른 이미지센서 제조 공정에서 페시베이션 증착 및 칼라PR공정을 나타낸 공정 순서도,1a to 1e is a process flow diagram showing the passivation deposition and color PR process in the image sensor manufacturing process according to the prior art,

도 2a 내지 도 2d는 본 발명의 바람직한 실시 예에 따른 이미지센서 제조 공정에서 페시베이션 증착 및 칼라PR공정을 나타낸 공정 순서도,2a to 2d is a process flow chart showing the passivation deposition and color PR process in the image sensor manufacturing process according to an embodiment of the present invention,

도 3은 본 발명의 바람직한 실시 예에 따른 패드 식각 절차를 도시한 도면.3 is a diagram illustrating a pad etching process according to a preferred embodiment of the present invention.

본 발명은 반도체 소자를 제조하는 방법에 관한 것으로서, 특히 이미지센서 제조를 위한 반도체 소자의 칼라 포토 레지스트 공정시 현상 용액에 의한 패드 금속 부식을 방지하기 위한 패시베이션 층을 증착하는데 적합한 반도체 소자의 패시베이션 형성방법에 관한 것이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular, to a passivation method of a semiconductor device suitable for depositing a passivation layer for preventing pad metal corrosion by a developing solution during a color photoresist process of a semiconductor device for manufacturing an image sensor. It is about.

일반적으로, 이미지 센서는 광학 영상(optical image)을 전기신호로 변환시키는 반도체 소자로써, 개별 모스(MOS:metaloxide-silicon) 캐패시터(capacitor)가 서로 매우 근접한 위치에 있으면서 전하캐리어가 캐패시터에 저장되고 이송되는 이중결합소자(CCD:charge coupled device)와 제어회로(control circuit) 및 신호처리회로(signal processing circuit)를 주변회로에 사용하는 씨모스(CMOS)기술을 이용하여 화소수 만큼 모스 트랜지스터를 만들고 이것을 이용하여 차례차례 출력을 검출하는 스위칭 방식을 채용한 씨모스(CMOS:complementary MOS) 이미지 센서가 있다. 이와 같은 이미지 센서의 제조 공정에서 패시베이션 증착공정 및 패드 식각 공정 후 반복되는 칼라 포토레지스트(PR:Photoresist) 공정전에 현상용액의 패드부식에 대응한 보호막 증착 공정을 추가로 수행하고 있다. In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal, in which charge carriers are stored and transferred to a capacitor while individual metal oxide-silicon (MOS) capacitors are in close proximity to each other. By using CMOS technology that uses charge coupled device (CCD), control circuit, and signal processing circuit to peripheral circuits, MOS transistors are made as many as the number of pixels. There is a CMOS (complementary MOS) image sensor that employs a switching scheme that detects the output sequentially. In the manufacturing process of the image sensor, a protective film deposition process corresponding to the pad corrosion of the developing solution is additionally performed before the color photoresist (PR) process repeated after the passivation deposition process and the pad etching process.

이하, 첨부된 도면을 참고하여 종래 기술의 이미지 센서에서의 칼라 PR 공정에 대하여 상세하게 설명하면 다음과 같다.Hereinafter, the color PR process in the image sensor of the prior art will be described in detail with reference to the accompanying drawings.

도 1a 내지 도 1e는 종래 기술에 따른 이미지센서 제조 공정에서 페시베이션 증착 및 칼라PR공정을 나타낸 공정 순서도이다.1A to 1E are process flowcharts illustrating passivation deposition and a color PR process in an image sensor manufacturing process according to the prior art.

도 1a를 참조하면, 금속의 증착 및 배선이 형성된 패드 즉, 패드 패터닝이 된 금속 층(102) 위에 TEOS(Tetra Ethyl Ortho Silicate) 계열의 산화막(Oxide)(104)을 형성하고, TEOS 산화막(104) 상에 질화막(SIN)(106)을 순서대로 증착하여 패시베이션층(Passivaiton layer)을 형성한다. Referring to FIG. 1A, a TeOS (Tetra Ethyl Ortho Silicate) -based oxide 104 is formed on a pad on which a metal is deposited and wired, that is, a pad patterned metal layer 102, and a TEOS oxide film 104. A passivation layer is formed by sequentially depositing a nitride film (SIN) 106 on the C).

이후 형성된 패시베이션층 상에 포토레지스트(108)를 이용하여 소정의 패턴을 이식하는 PEP(Photo Engraving Process) 공정이 그 다음으로 수행되며, 그 후 이와 같은 방법을 통해 이식된 패턴을 에칭(etching)하는 식각 공정이 수행됨으로써, 도 1b에 도시한 바와 같이, 패시베이션 층(질화막 및 산화막)이 식각되어 패 드(102) 상부가 드러나게 되며 홀(110)을 형성한다. 그후 에싱(Ashing) 공정으로 상기 포토레지스트(108)를 제거한다.Thereafter, a PEP (Photo Engraving Process) process of implanting a predetermined pattern using the photoresist 108 on the formed passivation layer is then performed, and then etching the implanted pattern through such a method. As the etching process is performed, as illustrated in FIG. 1B, the passivation layer (nitride layer and oxide layer) is etched to expose the upper portion of the pad 102 and form the hole 110. Thereafter, the photoresist 108 is removed by an ashing process.

상기 에싱 공정 이후, 도 1c에 도시한 바와 같이 전체적으로 TEOS 막을 증착하거나 TR(thermo-set resin) 보호막(112)을 형성한다. 이는 칼라 포토레지스트 공정시 사용되는 현상(Develop) 용액에 의한 패드 부식을 막기위해 형성되는 것으로서, 패드(102) 식각 후 대략 100 ~ 500 Å 두께의 TEOS 막을 증착하거나 TR 보호막(112)을 형성하는 것이다. After the ashing process, as shown in FIG. It is formed to prevent pad corrosion due to the development solution used in the color photoresist process, and is to deposit a TEOS film having a thickness of approximately 100 to 500 mV after etching the pad 102 or to form the TR protective film 112. .

이후 도 1d에 도시한 바와 같이, 컬러 포토레지스트를 질화막 상부에 도포한 후, 현상 용액을 이용하여 현상하는 칼라 PR 공정(114)을 수행하고, 도 1e에 도시한 바와 같이, 패드(102) 보호막으로 사용했던 증착된 TEOS 막 또는 TR보호막을 제거하여, 패드(102) 상부를 드러나게 한다. Thereafter, as shown in FIG. 1D, the color photoresist is applied on the nitride film, and then a color PR process 114 for developing using a developing solution is performed. As shown in FIG. 1E, the pad 102 protective film is performed. The deposited TEOS film or TR protective film used as is removed, thereby exposing the upper part of the pad 102.

상기한 바와 같은 일련의 제조 공정을 갖는 종래 기술에 의한 이미지센서의 경우, 패드 식각 및 에싱 이후에 칼라 포토레지스트 공정을 수행하기 위해서는 TEOS막의 증착이나 TR 코팅 공정을 추가해야하나 이에 대한 다른 방안이 없었다. In the prior art image sensor having a series of manufacturing processes as described above, in order to perform a color photoresist process after pad etching and ashing, a deposition of a TEOS film or a TR coating process should be added, but there is no other solution. .

본 발명은 상술한 종래 기술의 한계를 극복하기 위한 것으로, 이미지 센서제조를 위한 컬러 포토레지스트 공정에 있어서 패드 식각 후 진행되는 보호막 증착 대신에, 패시베이션 층을 증착하여 공정을 간소화할 수 있는 반도체 소자의 패시베이션 형성방법을 제공하는데 그 목적이 있다. The present invention is to overcome the limitations of the prior art described above, in the process of manufacturing a semiconductor device that can simplify the process by depositing a passivation layer, instead of the protective film deposition after the pad etching in the color photoresist process for manufacturing an image sensor It is an object of the present invention to provide a passivation method.

본 발명의 다른 목적은,　이미지 센서제조를 위한 컬러 포토레지스트 공정에 있어서 제1질화막, 산화막, 제2 질화막 순서로 패시베이션 층을 증착하여 공정을 간소화할 수 있는 반도체 소자의 패시베이션 형성방법을 제공하는데 있다. Another object of the present invention is to provide a passivation method of a semiconductor device capable of simplifying the process by depositing a passivation layer in the order of a first nitride film, an oxide film, and a second nitride film in a color photoresist process for fabricating an image sensor. .

본 발명의 일 관점에서는, 반도체 소자의 패시베이션 형성 방법으로서, 패드 금속층 상부에 제 1 질화막, 산화막, 제 2 질화막을 순차 증착하는 과정과, 포토레지스트 패턴을 이용하는 제 1 식각 공정을 수행하여 상기 제 2 질화막을 제거하고, 산화막을 부분적으로 제거하는 과정과, 제 2 식각 공정을 수행하여 잔류하는 산화막을 모두 제거한 후, 잔류하는 상기 포토레지스트 패턴을 제거하는 과정과, 상기 제 2 질화막 상부에 칼라 포토레지스트 패턴을 형성하는 과정과, 제 3 식각 공정을 통해 상기 제 1 질화막을 제거하는 과정을 포함한다. According to an aspect of the present invention, a passivation method of a semiconductor device may include sequentially depositing a first nitride film, an oxide film, and a second nitride film on a pad metal layer, and performing a first etching process using a photoresist pattern to perform the second etching process. Removing the nitride film, partially removing the oxide film, removing the remaining oxide film by performing the second etching process, removing the remaining photoresist pattern, and color photoresist on the second nitride film. Forming a pattern, and removing the first nitride film through a third etching process.

이하 첨부된 도면을 참조하여 본 발명의 동작 원리를 상세히 설명한다. 하기에서 본 발명을 설명함에 있어서 공지 기능 또는 구성에 대한 구체적인 설명이 본 발명의 요지를 불필요하게 흐릴 수 있다고 판단되는 경우에는 그 상세한 설명을 생략할 것이다. 그리고 후술되는 용어들은 본 발명에서의 기능을 고려하여 정의된 용어들로서 이는 사용자, 운용자의 의도 또는 관례 등에 따라 달라질 수 있다. 그러므로 그 정의는 본 명세서 전반에 걸친 내용을 토대로 내려져야 할 것이다. Hereinafter, the operating principle of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, when it is determined that a detailed description of a known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. Terms to be described later are terms defined in consideration of functions in the present invention, and may be changed according to intentions or customs of users or operators. Therefore, the definition should be made based on the contents throughout the specification.

본 발명은 이미지 센서제조를 위한 컬러 포토레지스트 공정에 있어서 패드 식각 후 진행되는 보호막 증착 대신에, 패시베이션 층에 초기에 Sin 막질을 증착하 여 공정을 단순화 하는 것이다. The present invention simplifies the process by initially depositing a Sin film on the passivation layer, instead of the protective film deposition after pad etching in the color photoresist process for manufacturing an image sensor.

도 2a 내지 도 2d는 본 발명의 바람직한 실시 예에 따른 이미지센서 제조 공정에서 페시베이션 증착 및 칼라PR공정을 나타낸 공정 순서도이다.2A to 2D are process flowcharts illustrating passivation deposition and a color PR process in an image sensor manufacturing process according to an exemplary embodiment of the present invention.

도 2a를 참조하면, 금속의 증착 및 배선이 형성된 패드 즉, 패드 패터닝이 된 금속 층(202) 위에 보호막으로 사용할 제 1질화막(203)을 먼저 증착한다. 여기에는 SIN 막질을 사용함으로써, 종래의 추가공정시 패드에 증착되는 TEOS나 TR 막질에 비해 뛰어난 내화학성을 나타내며, 칼라 PR공정후에 현상액으로 패드를 보호하기 위한 추가적인 패드 보호막 형성 공정이 필요없게 된다. Referring to FIG. 2A, a first nitride film 203 to be used as a protective film is first deposited on a pad on which metal deposition and wiring are formed, that is, a pad patterned metal layer 202. By using the SIN film, it exhibits excellent chemical resistance compared to TEOS or TR film deposited on the pad in the conventional additional process, and does not require an additional pad protective film forming process for protecting the pad with a developer after the color PR process.

이후 TEOS(Tetra Ethyl Ortho Silicate) 계열의 산화막(Oxide)(204)과 제 2질화막(SIN)(206)을 순서대로 증착하여 패시베이션층(Passivaiton layer)을 형성한다. 이때 보호막으로 이용하는 질화막(203)의 두께는 100~500Å 범위로 증착하며, 산화막(204)은 3000~10000Å, 상부 질화막(206)은 3000~10000Å 범위로 증착한다.Thereafter, a Tetra Ethyl Ortho Silicate (TEOS) -based oxide layer (Oxide) 204 and a second nitride layer (SIN) 206 are sequentially deposited to form a passivation layer. At this time, the thickness of the nitride film 203 used as the protective film is deposited in the range of 100 ~ 500Å, the oxide film 204 is deposited in the range of 3000 ~ 10000Å, the upper nitride film 206 is in the range of 3000 ~ 10000Å.

이후 형성된 패시베이션층 상에 포토레지스트(208)를 이용하여 소정의 패턴을 이식하는 PEP(Photo Engraving Process) 공정이 그 다음으로 수행되며, 그 후 이와 같은 방법을 통해 이식된 포토 레지스트 패턴을 이용하는 식각 공정을 수행함으로써, 도 2b에 도시한 바와 같이, 패시베이션 층(질화막 및 산화막)이 식각되어 패드(202) 상부가 드러나는 홀(210)을 형성한다. 그후 에싱(Ashing) 공정을 통해 잔류하는 포토레지스트 패턴을 제거한다.Thereafter, a PEP (Photo Engraving Process) process of implanting a predetermined pattern using the photoresist 208 on the formed passivation layer is then performed, and then an etching process using the photoresist pattern implanted through such a method is performed. As shown in FIG. 2B, the passivation layer (nitride layer and oxide layer) is etched to form a hole 210 in which the top of the pad 202 is exposed. Afterwards, the remaining photoresist pattern is removed through an ashing process.

도 2a와 도2b 사이의 패드 식각공정에 대해 구체적으로 설명하도록한다. 이는 도 3에서 도시하고 있는 것으로서, 1단계 식각공정(a)은 제 2 질화막(206)과 부 분적인 산화막(204)을 식각하기 위한 것으로서, 이때 식각은 CHF3/O2/Ar 가스의 조합으로 이루어진 활성화 플라즈마로 진행되며, 여기에 N2, 또는 CxFy 등의 가스가 필요에 따라서 첨가될 수 있다. 여기에서 프라즈마 식각을 위한 공정조건으로 압력은 30mT 내지 50mT의 범위로 설정되고, 소스전원은 1500W 내지 2000W의 범위로, 바이어스 전원은 1000W 내지 2000W로 설정될 수 있다. 이때, 주 식각 가스는 CHF3로서, Ar 가스는 캐리어로 작용한다. The pad etching process between FIGS. 2A and 2B will be described in detail. This is shown in Figure 3, the one-step etching process (a) is to etch the second nitride film 206 and the partial oxide film 204, wherein the etching is made of a combination of CHF3 / O2 / Ar gas Proceeds to the activation plasma, a gas such as N2, or CxFy can be added as needed. Here, as a process condition for plasma etching, the pressure may be set in the range of 30mT to 50mT, the source power source may be set in the range of 1500W to 2000W, and the bias power source may be set in the range of 1000W to 2000W. At this time, the main etching gas is CHF3, Ar gas acts as a carrier.

2단계 식각공정(b)은 상기 1단계 식각공정(a) 이후 남아 있는 TEOS 산화막(204)을 식각하기 위한 것으로서, SiN 대비 식각 선택비가 14:1 이상을 나타내므로 제1질화막(203)을 식각 저지막으로 사용할 수 있다. 이때 식각은 CH3F/C4F8/O2/Ar 가스의 조합으로 이루어진 활성화 플라즈마로 진행되며, 여기에 N2 등의 가스가 필요에 따라서 첨가될 수 있다. 그리고 프라즈마 식각을 위한 공정조건은 1단계 식각공정과 동일하게 설정될 수 있으며, 상기 조건에 대응하는 제2질화막(206)의 식각 속도는 1500~2000 Å/min 범위를 나타내며, TEOS 산화막(204)의 식각 속도는 200~500 Å/min 범위를 나타낸다. The second step etching process (b) is for etching the TEOS oxide film 204 remaining after the first step etching process (a), and the first nitride film 203 is etched because the etching selectivity to SiN is 14: 1 or more. Can be used as a barrier. At this time, the etching proceeds to an activated plasma composed of a combination of CH3F / C4F8 / O2 / Ar gas, and a gas such as N2 may be added as necessary. In addition, the process conditions for plasma etching may be set in the same manner as the one-step etching process, and the etching rate of the second nitride film 206 corresponding to the above conditions is in the range of 1500 to 2000 μs / min, and the TEOS oxide film 204 The etching rate of is in the range of 200 to 500 mW / min.

그후 도 2b에 도시한 바와 같이 에싱공정을 수행하여 포토레지스트(208)를 제거한다. 이후 칼라 포토레지스트(214)를 제2 질화막(206) 상부에 증착하고, 현상 용액을 도포하여, 노광 및 현상으로 칼라 PR을 형성하는 것으로서, 이는 도 2c에 도시하고 있다. 그리고 칼라 PR공정을 모두 마친 후, 도 2d에 도시한 바와 같이 보호막으로 사용했던 제1질화막(203)을 제거하는 3단계 식각공정을 수행하여, 패드(202) 상부를 드러낸다. 이때 식각은 CH3F/CF4/O2/Ar 가스의 조합으로 이루어진 활성화 플라즈마로 진행되며, 여기에 N2 등의 가스가 필요에 따라서 첨가될 수 있다. 여기에서 프라즈마 식각을 위한 공정조건으로 압력은 40mT 내지 70mT의 범위로 설정되고, 소스전원은 500W 내지 1000W의 범위로, 바이어스 전원은 0W 내지 1000W로 설정될 수 있다.After that, as shown in FIG. 2B, an ashing process is performed to remove the photoresist 208. Thereafter, the color photoresist 214 is deposited on the second nitride film 206 and coated with a developing solution to form a color PR by exposure and development, which is illustrated in FIG. 2C. After completing the color PR process, as shown in FIG. 2D, a three-step etching process of removing the first nitride film 203 used as the protective film is performed to expose the upper portion of the pad 202. At this time, the etching proceeds to an activated plasma composed of a combination of CH3F / CF4 / O2 / Ar gas, and a gas such as N2 may be added as necessary. Here, as a process condition for plasma etching, the pressure may be set in the range of 40mT to 70mT, the source power source may be set in the range of 500W to 1000W, and the bias power source may be set in the range of 0W to 1000W.

이상 설명한 바와 같이, 본 발명은 본 발명은 이미지 센서제조를 위한 컬러 포토레지스트 공정에 있어서 패드 식각 후 진행되는 보호막 증착 대신에, 패시베이션 층(제1질화막+산화막+제2질화막)을 증착하여 공정을 간소화한다.As described above, the present invention is a process for forming a passivation layer (first nitride film + oxide film + second nitride film) by depositing a passivation layer instead of the protective film deposition after pad etching in the color photoresist process for manufacturing an image sensor. Simplify.

한편 본 발명의 상세한 설명에서는 구체적인 실시예에 관해 설명하였으나, 본 발명의 범위에서 벗어나지 않는 한도 내에서 여러 가지 변형이 가능함은 물론이다. 그러므로 본 발명의 범위는 설명된 실시예에 국한되지 않으며, 후술되는 특허청구의 범위뿐만 아니라 이 특허청구의 범위와 균등한 것들에 의해 정해져야 한다. Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the scope of the following claims, but also by those equivalent to the scope of the claims.

이상에서 상세히 설명한 바와 같이 동작하는 본 발명에 있어서, 개시되는 발명 중 대표적인 것에 의하여 얻어지는 효과를 간단히 설명하면 다음과 같다. In the present invention operating as described in detail above, the effects obtained by the representative ones of the disclosed inventions will be briefly described as follows.

본 발명은, 이미지센서 제조시 칼라 포토레지스트 공정 과정에서 현상 용액의 패드 금속 부식을 방지하고자, 보호막으로 SIN 막질을 사용함으로써, 패시베이션 막 증착 이후 추가적인 패드 보호막 증착 과정이 필요없어지므로, 공정의 간소화가 가능하고, 종래의 TEOS나 TR 막질에 비해 내화확성이 뛰어난 SiN 막질을 이용함으로써 공정상 안정화할 수 있는 효과가 있다.The present invention uses SIN film as a protective film to prevent corrosion of the pad metal of the developing solution during the color photoresist process in the manufacture of the image sensor, so that an additional pad protective film deposition process is not required after the passivation film deposition. It is possible to stabilize the process by using the SiN film quality excellent in fire resistance compared to the conventional TEOS and TR film quality.

Claims (9)

반도체 소자의 패시베이션 형성 방법으로서,As a passivation method of a semiconductor device, 패드 금속층 상부에 제 1 질화막, 산화막, 제 2 질화막을 순차 증착하는 과정과,Sequentially depositing a first nitride film, an oxide film, and a second nitride film on the pad metal layer; 포토레지스트 패턴을 이용하는 제 1 식각 공정을 수행하여 상기 제 2 질화막을 제거하고, 산화막을 부분적으로 제거하는 과정과,Performing a first etching process using a photoresist pattern to remove the second nitride film and partially removing the oxide film; 제 2 식각 공정을 수행하여 잔류하는 산화막을 모두 제거한 후, 잔류하는 상기 포토레지스트 패턴을 제거하는 과정과,Removing all of the remaining oxide film by performing a second etching process, and then removing the remaining photoresist pattern; 상기 제 2 질화막 상부에 칼라 포토레지스트 패턴을 형성하는 과정과,Forming a color photoresist pattern on the second nitride film; 제 3 식각 공정을 통해 상기 제 1 질화막을 제거하는 과정Removing the first nitride film through a third etching process 을 포함하는 반도체 소자의 패시베이션 형성 방법.Passivation method of a semiconductor device comprising a. 제 1 항에 있어서,The method of claim 1, 상기 제 1 식각 공정은 CH3F, O2, Ar을 포함하는 혼합 가스 분위기에서 수행하는 것을 특징으로 하는 반도체 소자의 패시베이션 형성 방법.The first etching process is a passivation forming method of a semiconductor device, characterized in that performed in a mixed gas atmosphere containing CH3F, O2, Ar. 삭제delete 제 1 항에 있어서,The method of claim 1, 상기 제 2 식각 공정은 CH3F, C4F8, O2, Ar을 포함하는 혼합 가스 분위기에서 수행하는 것을 특징으로 하는 반도체 소자의 패시베이션 형성 방법.The second etching process is a passivation forming method of a semiconductor device, characterized in that performed in a mixed gas atmosphere containing CH3F, C4F8, O2, Ar. 삭제delete 제 2 항 또는 제 4 항에 있어서,The method according to claim 2 or 4, 상기 제 1 내지 제2 식각 공정은, 30 mT - 50 mT 범위의 압력, 1500 W - 2000 W의 소스 전원, 1000 W - 2000 W의 바이어스 전원 조건에서 수행되는 것을 특징으로 하는 반도체 소자의 소자의 패시베이션 형성 방법.The first to second etching processes may be performed under a pressure range of 30 mT-50 mT, a source power source of 1500 W-2000 W, and a bias power source of 1000 W-2000 W. Forming method. 제 1 항에 있어서,The method of claim 1, 상기 제 3 식각 공정은 CH3F, CF4, O2, Ar을 포함하는 혼합 가스 분위기에서 수행하는 것을 특징으로 하는 반도체 소자의 패시베이션 형성 방법.The third etching process is a passivation method of a semiconductor device, characterized in that performed in a mixed gas atmosphere containing CH3F, CF4, O2, Ar. 제 7 항에 있어서,The method of claim 7, wherein 상기 제 3 식각 공정은, 40 mT - 70 mT 범위의 압력, 500 W - 1000 W의 소스 전원, 0 W - 1000 W의 바이어스 전원 조건에서 수행되는 것을 특징으로 하는 반도체 소자의 패시베이션 형성 방법.And the third etching process is performed under a pressure range of 40 mT-70 mT, a source power source of 500 W-1000 W, and a bias power source of 0 W-1000 W. 삭제delete
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KR100613573B1 (en) 2005-04-29 2006-08-16 매그나칩 반도체 유한회사 Method for manufacturing a semiconductor device
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US5472913A (en) 1994-08-05 1995-12-05 Texas Instruments Incorporated Method of fabricating porous dielectric material with a passivation layer for electronics applications
KR19990057286A (en) * 1997-12-29 1999-07-15 김영환 Method of manufacturing input / output pad of semiconductor device
KR20010083728A (en) * 2000-02-21 2001-09-01 박종섭 Method of fabricating a semiconductor device
KR100613573B1 (en) 2005-04-29 2006-08-16 매그나칩 반도체 유한회사 Method for manufacturing a semiconductor device
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