KR100826329B1 - An apparatus for transposing data in a round scanning display of 10bit one panel - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a data transpose device. In particular, it uses DDR SDRAM (Double Data Rate Synchronous DRAMs), which is advantageous in terms of cost, access speed, and storage capacity in a 10-bit three-panel one-dimensional reciprocating scanning display device using an optical modulator. The present invention relates to a data transposing apparatus for changing an input data arrangement of an RGB image input signal.

Optical Modulators, Display Devices, Transpose, DDR, DDR SDRAM, Round Trip Scanning

Description

An apparatus for transposing data in a round scanning display of 10bit one panel

1 and 2 show a typical configuration of an optical MEMS device applied to an optical switch and an optical modulation device by using light reflection or diffraction.

3 is a perspective view of a recessed diffraction type optical modulator using piezoelectric materials developed by Samsung Electro-Mechanics.

4A shows a structure in which image data input in a typical HDTV or the like is horizontally aligned, and FIG. 4B shows a structure in which 1080 micro mirror elements are arranged in a longitudinal direction.

FIG. 5A shows a structure of image data of one frame composed of 1920 x 1080 pixels, and FIG. 5B shows a structure in which the input image data is transposed from the horizontal arrangement to the longitudinal arrangement.

Figure 6 shows an embodiment of a three-panel optical apparatus using an optical modulator to which the present invention is applied.

7 is a block diagram of a data transpose apparatus according to an embodiment of the present invention.

FIG. 8A illustrates a data structure stored in the line double buffer of FIG. 7, FIG. 8B illustrates a data structure stored in the scan converter, and FIG. 8C illustrates a data structure of the DDR SDRAM.

9A is a timing diagram of a data writing process of the DDR SDRAM, and FIG. 9B is a timing diagram of a data reading process of the DDR SDRAM.

<Explanation of symbols for the main parts of the drawings>

71A, 71B: Line Double Buffer 72A, 72B: Scan Converter

73: DDR SDRAM Controller 74A, 74B: DDR SDRAM

77: time controller

TECHNICAL FIELD The present invention relates to a data transpose device. In particular, the present invention relates to the use of DDR SDRAM (Double Data Rate Synchronous DRAMs), which is advantageous in terms of cost, access speed and storage capacity in a 10-bit three-panel 1-dimensional reciprocating scanning display using an optical modulator. A data transpose apparatus for changing the input data arrangement of an RGB image input signal.

In accordance with the development of microtechnology, attention has been paid to small devices incorporating micro electromechanical systems (MEMS) devices and MEMS devices.

A MEMS device is a device formed as a microstructure on a substrate such as a silicon substrate or a glass substrate, and electrically and mechanically coupled to a driver for outputting a mechanical driving force, a semiconductor integrated circuit for controlling the driver, and the like. The basic feature of the MEMS device is that a drive body configured as a mechanical structure is assembled to a part of the device, and the drive of the drive body is electrically performed by applying the coulomb force between the electrodes.

1 and 2 show a typical configuration of an optical MEMS device applied to an optical switch and an optical modulation device by using light reflection or diffraction.

The optical MEMS element 1 shown in FIG. 1 includes a substrate 2, a substrate side electrode 3 formed on the substrate 2, and a driving side electrode arranged in parallel to the substrate side electrode 3 ( A beam beam 6 having 4) and a support 7 supporting one end of the beam 6 are formed. The beam 6 and the board | substrate side electrode 3 are electrically insulated by the space | gap 8 between them.

In the optical MEMS element 1, the beam 6 is displaced by electrostatic attraction or electrostatic repulsion between the substrate-side electrode 3 and the substrate-side electrode 3 depending on the potential applied to the substrate-side electrode 3 and the driving-side electrode 4. For example, as shown by the solid line and the broken line of FIG. 1, it displaces in parallel and inclined state with respect to the board | substrate side electrode 3, for example.

The optical MEMS element 11 shown in FIG. 2 includes a substrate 12, a substrate side electrode 13 formed on the substrate 12, and a beam 14 that spans the substrate side electrode 13 in a bridge shape. Achieve. The beam 14 and the board | substrate side electrode 13 are electrically insulated by the space | gap 10 between them.

The beam 14 is parallel to each other facing the substrate-side substrate 13 and the bridge member 15 made of, for example, a SiN film, which is placed on the substrate 12 by hanging the substrate-side electrode 13 in a bridge shape. It consists of the drive side electrode 16 provided on the bridge member 15 which also serves as the reflecting film which consists of Al film of about 100 nm thickness, for example. The beam 14 is formed in a so-called bridged manner with its ends supported.

In this optical MEMS element 11, the beam 14 is displaced by electrostatic attraction or electrostatic repulsion between the substrate side electrode 13 and the potential given to the substrate side electrode 13 and the driving side electrode 16. For example, as shown by the solid line and the broken line of FIG. 2, it displaces in parallel and concave state with respect to the board | substrate side electrode 3, for example.

In the optical MEMS elements 1 and 11, light is irradiated onto the surfaces of the driving side electrodes 4 and 16, which also serve as light reflection films, and the reflection directions of the light are different depending on the driving positions of the beams 4 and 14. The present invention can be applied as an optical switch that detects reflected light in one direction and has a switch function.

The optical MEMS elements 1 and 11 can be applied as optical modulators that modulate the light intensity. When the reflection of light is used, the beams 4 and 14 are vibrated to modulate the light intensity with the amount of reflected light in one direction per unit time. This optical modulation element is so-called time modulation.

When using diffraction of light, a plurality of beams 6 and 14 are arranged in parallel with respect to the common substrate side electrodes 3 and 13 to form an optical modulator, and an example of the common substrate side electrodes 3 and 13 is shown. For example, the height of the driving electrode serving as the light reflection film is changed by the operation of the adjacent beams 6 and 14 in proximity and separation, and the intensity of the light reflected by the driving electrode is modulated by the diffraction of the light. This optical modulator is so-called spatial modulation.

Such an optical modulation device is a GLV (Grating Light Valve) device developed by SLM (Silicon Light Machine) Co., Ltd. (Domestic Application No. 10-2000-7014798) as a light intensity conversion device for laser display, that is, an optical modulator. In addition, there is a diffraction type optical modulator (Korean Patent Application No. P2003-077389) using piezoelectric materials developed by Samsung Electro-Mechanics.

3 is a perspective view of a recessed diffraction type optical modulator using piezoelectric materials developed by Samsung Electro-Mechanics.

Referring to FIG. 3, the recessed thin film piezoelectric optical modulator developed by Samsung Electro-Mechanics includes a silicon substrate 30 and a plurality of elements 32a to 32n.

Here, the plurality of elements 32a to 32n have a constant width and are aligned regularly to form a recessed thin film piezoelectric optical modulator. In addition, the plurality of elements 32a to 32n have different widths and are alternately arranged to form a recessed thin film piezoelectric optical modulator. In addition, the elements 32a to 32n may be spaced apart from each other at a predetermined interval (almost the same distance as the width of the elements 32a to 32n), and in this case, the micromirrors formed on the entire upper surface of the silicon substrate 30. The layer reflects the incident light and diffracts it.

The silicon substrate 30 has depressions in order to provide air space to the elements 32a to 32n, and an insulating layer 31 is deposited on the upper surface, and ends of the elements 32a to 32n on both sides of the depressions. Is attached.

Each element (herein, only the reference numeral 32a is described in detail, but the remaining 32b to 32n is the same) has a rod shape, and the lower surfaces of both ends are positioned so that the center portion is spaced apart from the recessed portion of the silicon substrate 30. A portion located at both sides of the silicon substrate 30 beyond the depression, and the portion located in the depression of the silicon substrate 30 includes a lower support 33a that is movable up and down.

In addition, the element 32a is stacked on the left end of the lower support 33a, and is stacked on the lower electrode layer 34a and the lower electrode layer 34a for providing a piezoelectric voltage, and contracts and A piezoelectric material layer 35a that expands to generate a vertical driving force, and an upper electrode layer 36a that is stacked on the piezoelectric material layer 35a and provides a piezoelectric voltage to the piezoelectric material layer 35a are included.

In addition, the element 32a is stacked on the right end of the lower support 33a, and is laminated on the lower electrode layer 34a 'and the lower electrode layer 34a' for providing a piezoelectric voltage. A piezoelectric material layer 35a 'that contracts and expands to generate a vertical driving force, and an upper electrode layer 36a' that is stacked on the piezoelectric material layer 35a 'and provides a piezoelectric voltage to the piezoelectric material layer 35a'. Doing.

The micromirror layer 37a is stacked on the lower support 33a at the center of the element 32a to reflect or diffract incident incident light.

On the other hand, an optical device using a GLV device or a piezoelectric diffraction type optical modulator of Samsung Electro-Mechanics as an optical modulator employing the above-described MEMS device includes a light source system, a light collecting unit, an illumination lens system, a plate-shaped color wheel, an optical modulator, a Fourier filter system, and a projection system. The projection system includes a scanner, a projection lens, and projects incident diffracted light onto the screen.

A display device using such an optical modulator is a device for outputting HDTV-quality video, and 1080 pixels are vertically arranged to scan and display in a horizontal direction.

As shown in Fig. 4A, image data input in a typical HDTV or the like is aligned in the lateral direction. In the display device using the optical modulator, as shown in FIG. 4B, 1080 micro mirror elements are arranged in the longitudinal direction, and display 1080 image data while scanning in the horizontal direction.

In the general-purpose HDTV standard, an image of one frame consists of row length (K) = 1920 pixels and column length (L) = 1080 pixels, and each pixel is typically composed of 3 bytes of 1 byte of each RGB signal.

A display device using an optical modulator used for image scanning of a general-purpose HDTV is a device for outputting HDTV-class video, and 1080 micro mirror cells are arranged in a row to display and scan in a horizontal direction.

Accordingly, a display device using an optical modulator requires 1080 longitudinally arranged data to scan an image of one frame composed of 1080 x 1920 pixels.

Fig. 5A shows a structure of image data of one frame composed of 1080 x 1920 pixels. The image data shown in Fig. 5A is input from the outside in the transverse direction, that is, in the order of (0,0), (0,1), (0,2), (0,3).

However, since the display device using the optical modulator requires 1080 longitudinally arranged data, as shown in Fig. 5B, the input image data must be transposed from the horizontal arrangement to the longitudinal arrangement.

In this way, the scanning direction of the input image signal is 90 degrees, that is, one frame of data must be stored to change the alignment of the data of the column and the row, and the scanning direction of the image data of one frame is changed to convert the input image in real time. While converting and outputting, another input image must be stored in another frame buffer (memory).

2x6Mbyte is required to store 2 frames in 8-bit RGB data standard of HD-TV level (1080x1920). In addition, in order to perform data conversion of columns and rows, the memory must store data using an external SRAM capable of random access mode.

In order to store 1080 × 1920 60Hz input video RGB signal in 8 bit format in real time, the memory read / write access speed should be operated at about 150MHz or more, but it is close to the operating speed of SRAM. It is difficult and increases the possibility of noise generated by high speed operation. It also requires higher density memory than conventional SRAM, which is very expensive.

The present invention to solve the above problems, in the 10-bit three-panel one-dimensional reciprocating scanning display using an optical modulator, the input data arrangement sequentially input in the horizontal direction using the DDR SDRAM burst mode as the longitudinal input data The aim is to provide a data transpose device that is improved in terms of cost, access speed and storage capacity.

The present invention for achieving the above object, the line double buffer unit for outputting after temporarily storing the input data of the horizontally arranged RGB video signal when the RGB video signal arranged in the transverse direction from the outside; A scan converter which reads the input data of the RGB video signal stored in the line double buffer section in the longitudinal direction and temporarily stores the transposed video signal and outputs the temporary video signal; The input data of the RGB video signal transposed in the longitudinal array is continuously skipped in a row set by the difference between the number of bits of the RGB video signal input data and the number of output bits of the scan converter unit by a column set by the number of output bits of the scan converter unit. A DDR SDRAM unit for continuously storing input data of the RGB video signal transposed in the longitudinal array after skipping by the row; Reads the video signal transposed from the scan converter unit and continuously stores input data arranged in the longitudinal direction in the DDR SDRAM unit by skipping the column in the set row and then skips the row continuously And a DDR SDRAM controller configured to continuously read and output the transposed video signal stored in the DDR SDRAM in units of rows.

Now, the preferred embodiment of the present invention will be described in detail with reference to the drawings of FIG. 6.

Figure 6 shows an embodiment of a three-panel one-dimensional reciprocating scanning display using an optical modulator to which the present invention is applied. In this example, a case of application to a laser display will be described.

The laser display 61 according to the present embodiment is used, for example, as a projector for a large screen, particularly as a projector for digital images or as a computer image projection apparatus.

As shown in Fig. 6, the laser display 61 has images on the optical axis of the laser light sources 62R, 62G, 62B of each color of red (R), green (G), and blue (B), and the respective laser light sources. Mirrors 64R, 64G, 64B, which are sequentially provided in the lens, each color tone optical system (lens group) 66R, 66G, 66B, and optical modulators 68R, 68G, 68B.

The laser light sources 62R, 62G and 62B are each lasers of, for example, R (642 nm, light output of about 3 W), G (wavelength of 532 nm, light output of about 2 W), and B (wavelength of 457 nm, light output of about 1.5 W). Exit.

In addition, the laser display 61 includes a red (R) laser light, a green (G) laser light, and a blue (B) laser, in which the light intensity is modulated by a GLV device or piezoelectric diffraction light modulators 68R, 68G, and 68B, respectively. It is equipped with a color synthesis filter 70, a spatial filter 72, a diffuser 74, a mirror 76, a galvano scanner 68, a projection optical system (lens group) 70 and a screen 72 for synthesizing light. have. The color combining filter 70 is composed of, for example, a dichroic mirror.

In the laser display 61 of the present embodiment, each of the RGB laser beams emitted from the laser light sources 62R, 62G, and 62B passes through each of the color tone optical systems 66R, 66G, and the like via the mirrors 64R, 64G, and 64B. 66B) is incident on each GLV device or piezoelectric diffraction light modulators 68R, 68G, 68B. Each laser light is a color-coded image signal, and is input in synchronization with the optical modulators 68R, 68G, and 68B.

In addition, each laser light is spatially modulated by diffraction by the optical modulators 68R, 68G, and 68B, and these three-color diffracted light is synthesized by the color synthesis filter 70, and subsequently by the spatial filter 72. Only signal components are taken out.

This RGB image signal is then reduced in the laser spectrum by the diffuser 74 and developed in space by the galvano scanner 78 which is synchronized with the image signal via the mirror 76 to the projection optical system 80. Thereby projecting as a full color image on the screen 82 and projecting the image onto the screen 82 not only when traveling in the forward direction but also in the reverse direction.

FIG. 7 is a block diagram of a data transposing apparatus according to an embodiment of the present invention, and a pair of line double buffers 71A and 71B and line double for temporarily storing input data in units of 4 lines or 8 lines A pair of scan converters 72A and 72B for longitudinally scanning and storing input data stored in the buffers 71A and 71B, and a pair of DDR SDRAMs 74A for storing transposed image data in units of frames. 74B), a DDR SDRAM controller 73 for controlling each of the DDR SDRAMs 74A and 74B to store the transposed data in the DDR SDRAMs 74A and 74B, and a time controller 77 for providing a clock signal. Equipped.

First, image data is input to the line double buffers 71A and 71B in units of 2 pixels with 10 bits of data as 1 byte for each RGB signal. Therefore, the total number of bits input to the line double buffers 71A and 71B at one time is 60 bits at 3 × 2 × 10 = 60 because each RGB signal is composed of 10 bits, inputted in units of 2 pixels at once, and both RGB signals are inputted. Becomes

Here, the line double buffers 71A and 71B may be used in units of 4 lines, units of 8 lines, and the like. For convenience of description, the line double buffers of units of 4 lines will be described as an example.

The line double buffers 71A and 71B are paired with each other and alternately store input data.

That is, when the first line double buffer 71A stores four lines of input data, the second line double buffer 71B stores the next four lines of input data, and the first line double buffer 71A of the next four lines is stored. Store the input data and repeat this operation.

Here, the data structure stored in the four-line double buffer 71A or 71B is shown in FIG. 8A, and in one line, (0.0) (0.1) (0.2) (0.3) ... (0.1916) (0.1917) (0.1918). (0.1919), 2 lines (1.0) (1.1) (1.2) (1.3) ... (1.1916) (1.1917) (1.1918) (1.1919), 3 lines (2.0) (2.1) (2.2) (2.3) ... (2.1916) (2.1917) (2.1918) (2.1919), and on the 4th line (3.0) (3.1) (3.2) (3.3) ... (3.1916) (3.1917) (3.1918) (3.1919) are stored. Therefore, the total number of pixels stored in the four-line double buffer 71A or 71B is 7680 (1920 x 4).

At this time, the data stored in the four-line double buffer 71A or 71B is stored in units of two pixels at a time. For example, two pixels of (0.0) (1.0) are stored and then two of (0.2) (0.3). The pixels are stored next, in this way two pixels at a time.

In addition, the pair of scan converters 72A and 72B store two pixels in one memory cell as input data, as shown in FIG. 8B, and in the line double buffers 71A and 71B of FIG. 8A. Read and save the input data as indicated by the direction of the arrow. That is, as shown in FIG. 8B, the input data is read and stored line by line from the line double buffers 71A and 71B. The first memory cell has (0.0) (1.0) and the next memory cell continues the line. The remaining data of the first column of the double buffer 71A is read and stored.

Meanwhile, the DDR SDRAM controller 73 alternately reads input data stored in the corresponding scan converters 72A and 72B in units of 2 pixels, and transmits the input data transposed in frames to the DDR SDRAM 74A or 74B in units of frames. Save it.

That is, referring to FIG. 8C, the DDR SDRAM controller 73 reads from the scan converters 72A and 72B in units of 2 pixels. For example, H0VO ((0.0) (1.0) means) and H0V1 ((2.0). (3.0) (where H stands for row and V stands for column) and stores it in the first and second columns of the first row of DDR SDRAM (74A or 74B), and then reads H1V0, H1V1. And store in the 129th column (denoted 128 here) and the 130th column (denoted 129 here) of the first row of the DDR SDRAM (74A or 74B), and then read the H2V0, H2V1 first. In the 256th and 257th columns of the row, 128 rows are skipped in this way, and then H7V0 and H7V1 are stored consecutively.

Afterwards, H8V0 and H8V1 are stored in the ninth row. Similarly to the above-described method, the H8V0 and H8V1 are stored up to H15V0 and H15V1.

In this case, when data is inputted from the first column to the 128th column of the first row, the input of the data of the next 9 rows, the next 17 rows, the next 25 rows, and so on is finished. Continue typing.

As a result, all the 1080 data in the longitudinal direction of the input data are stored in the first to fifth rows and the columns in the first through 128 columns.

Thereafter, the DDR SDRAM controllers 73A and 73B read and output data from the DDR SDRAM in the direction of the arrow as shown in Fig. 8C.

That is, it reads from the first column to the 128th column of the first row, then reads the first column to the 128th column of the second row, and then reads the first column to the 128th column of the third row, and then prints it. Read from the first column to the 128th column of the fourth row. Then, read and output from the 129th column to the 256th column of the first row, and then read the output from the 129th column to the 256th column of the second row, and then read the 129th to 256th column of the third row. Then, read from the 129th column to the 256th column of the fourth row. After outputting the image data of one frame in this manner, the image data of the next frame is output.

Meanwhile, DDR SDRAM (74A, 74B) is a memory that has already been widely used for high-end graphics card, etc., and the output is output from both the rising and falling of the system clock, which is twice the speed of the existing SDRAM. Memory. It is similar to RDRAM, but based on the existing SDRAM, it has the advantage of excellent compatibility and lower manufacturing costs.

9A is a timing diagram of a data writing process of the DDR SDRAM, and FIG. 9B is a timing diagram of a data reading process of the DDR SDRAM.

Referring to FIG. 9A, a bank address and a row address are input at the first clock, a column address is input after the next one clock, and eight column addresses must be input to input 32 pixels at a time, and three clocks are added for automatic charging. This is necessary. Therefore, 13 clocks are required to input 32 pixels of data into the DDR SDRAM. When the input clock is 75 MHz, data write operation is possible at 61 MHz or more.

Referring to FIG. 9B, a clock required for reading 1080 pixels is 295 clocks. Because 5 rows are needed to input bank address and row address, 5 clocks are needed. After input of 5 clocks, 1 clock of idle clock is required, so 5 additional clocks are needed and 5 rows are inputted. 5 clocks are required.

Since 128/2 = 64 clocks are required to input 128 pixels in one row address, a total of 64 × 5 = 320 clocks are required, and 3 × 5 = 15 clocks are required for automatic charging after pixel input.

On the other hand, in the case of reciprocal scanning, 295 x 2 = 590 clocks are required because two outputs are required for one frame.

At this time, if the input clock is 75 MHz, the required frequency is at least 82 MHz.

According to the present invention as described above, by configuring the buffer and control logic suitable for the burst mode of the DDR SDRAM using the DDR SDRAM to convert the scan direction by 90 degrees, the cost and access speed is also greatly improved in terms of storage capacity There is.

Although the present invention has been described above by way of examples, the scope of the present invention is not limited to the above embodiments, and various modifications are possible within the scope of the present invention. It is intended that the scope of the invention only be limited by the following claims.

Claims (8)

A line double buffer unit for temporarily storing the input data of the RGB video signals arranged in the horizontal direction and outputting the RGB video signals arranged in the horizontal direction from the outside; A scan converter which reads the input data of the RGB video signal stored in the line double buffer section in the longitudinal direction and temporarily stores the transposed video signal and outputs the temporary video signal; The input data of the RGB video signal transposed in the longitudinal array is continuously skipped in a row set by the difference between the number of bits of the RGB video signal input data and the number of output bits of the scan converter unit by a column set by the number of output bits of the scan converter unit. A DDR SDRAM unit for continuously storing input data of the RGB video signal transposed in the longitudinal array after skipping by the row; And Read the transposed video signal from the scan converter unit and continuously store the input data arranged in the longitudinal direction in the DDR SDRAM unit by skipping the column in the set row and then skipping the row in the row continuously, and A data transpose device including a DDR SDRAM controller for continuously reading and outputting a transposed video signal stored in a DDR SDRAM in a row unit. The method of claim 1, And the RGB video signal input from the outside to the line double buffer unit is a 10-bit video signal. The method of claim 1, And the line double buffer unit comprises one of four line units and eight line units. The method of claim 1, And the line double buffer unit is a pair of line double buffers. The method of claim 1, And the scan converter unit is a pair of scan converters. The method of claim 1, The DDR SDRAM unit data transpose device, characterized in that consisting of a pair of DDR SDRAM. The method of claim 1, The DDR SDRAM unit continuously stores the set column in each of a plurality of rows of input data of an RGB video signal transposed in a longitudinal array, and stores all the pixels of the columns arranged in the longitudinal direction in the plurality of rows. Data transpose device. The method of claim 7, wherein The DDR SDRAM unit, when the external input video is 1080 × 1920 data storage device, characterized in that to store 128 columns in one row to store 1080 pixels in five columns.

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