KR100805028B1 - Patch antenna and manufacturing method thereof - Google Patents

Abstract

A patch antenna and a manufacturing method thereof are provided to satisfy a desired size and a desired frequency by changing an oscillation frequency and a miniaturization ratio through a hole and a slot by using a low dielectric material. A patch antenna includes a patch(70), a ground plate(80), and a dielectric layer(or a dielectric material)(90). A through-hole(70a) is formed in the patch. A feeder cable is connected to a feed point. The ground plate is installed with being spaced from the patch by a predetermined gap. The dielectric layer is installed between the patch and the ground plate. At least one holes(92,94) are formed in the dielectric layer by punching. The patch is a thin plate made of metallic materials such as copper, aluminium, gold, silver, and the like. A diameter of a through-hole(80a) of the ground plate is larger than a diameter of the feeder cable.

Description

Patch antenna and manufacturing method thereof

1 is a perspective view for explaining the configuration of a conventional patch antenna.

2 and 3 are exploded perspective views schematically illustrating a method of forming a patch using a dielectric film in a conventional iris patch antenna.

4 is an exploded perspective view of a patch antenna according to the first embodiment of the present invention.

5 is a perspective view of the combination of FIG.

6 is a cross-sectional view taken along the line A-A of FIG.

FIG. 7 is a plan view of FIG. 5.

8 is an exploded perspective view for explaining the configuration of a patch antenna according to a second embodiment of the present invention.

9 is an exploded perspective view illustrating a modification of FIG. 8.

FIG. 10 is a graph for explaining the conventional reflection loss can be obtained by the patch antenna according to the first or second embodiment of the present invention.

11 is an exploded perspective view of a patch antenna according to a third embodiment of the present invention.

12 is a state diagram of FIG.

FIG. 13A is a view illustrating an upper surface of the first dielectric layer illustrated in FIG. 12.

FIG. 13B is a view illustrating a bottom portion of the first dielectric layer illustrated in FIG. 12.

14 is a graph for comparing the bandwidth of a patch antenna according to a third embodiment of the present invention with a conventional patch antenna, (a) is a graph showing the bandwidth of a conventional patch antenna, (b) is a graph of the present invention A graph showing a bandwidth of a patch antenna according to the third embodiment.

15 is a graph comparing return loss between a conventional folded patch antenna and a patch antenna according to a third embodiment of the present invention, (a) is a graph showing the reflection loss of a conventional folded patch antenna, ( b) is a graph showing the return loss of the patch antenna according to the third embodiment of the present invention.

16 is a graph for comparing the gain characteristics of a conventional patch antenna and a patch antenna according to a third embodiment of the present invention, (a) is a graph showing the gain characteristics of a conventional patch antenna, (b) is a present invention A graph showing gain characteristics of a patch antenna according to the third embodiment of the present invention.

17 is a graph for comparing gain characteristics of a conventional folded patch antenna and a patch antenna according to a third embodiment of the present invention, (a) is a graph showing gain characteristics of a conventional folded patch antenna; (b) is a graph showing the gain characteristics of the patch antenna according to the third embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

70: patch 80: ground plate

90 dielectric layer 92, 94, 95 hole

100: metal pin 110: upper patch

112: through hole 120: lower patch

121: patch flake 122: slit

130: first dielectric layer 132: hole

140: second dielectric layer 150: ground plate

The present invention relates to a patch antenna, and more particularly, to a patch antenna that can be miniaturized using a dielectric having a low dielectric constant.

The development of wireless communication technology has made it possible to popularize information communication terminals such as mobile phones, PDAs and GPS receivers. These telecommunication terminals are mainly used in a small, lightweight, flat and thin patch antenna.

1 illustrates an example of a conventional patch antenna. The patch antenna of FIG. 1 is also called a ceramic patch antenna because it uses a ceramic dielectric substrate. In the patch antenna of FIG. 1, a planar patch 12 serving as an antenna is provided on one surface (upper surface) with a dielectric substrate 10 formed between a predetermined thickness and a ground plate 14 on the other surface (lower surface). ) Is configured to be installed.

Here, the shape of the patch 12 is formed in a variety of shapes, such as square, round, oval, serious, annular, mainly square or round is used.

The power supply to the patch 12 may be provided by feeding a microstrip line and feeding or by feeding a probe. In the feeding method using the microstrip line, the characteristics of the antenna and the input impedance are changed according to the feeding position, but matching between the feeding line and the patch is an important factor, but it is easy to manufacture. In the power feeding method using the probe, it is possible to find the best matching point and feed it to the position, so that no separate matching circuit is required.

In general, the size of the patch antenna is proportional to the wavelength of the design frequency, and in order to reduce the size of the patch antenna and reduce the size of the patch antenna for the same frequency, a dielectric substrate having a high dielectric constant should be used.

However, there is a limit to using a dielectric having a high dielectric constant because the radiation characteristics of the antenna are degraded and the gain is reduced as a result.

In addition, as the dielectric constant of the dielectric increases, the manufacturing cost increases and the production yield decreases rapidly. Therefore, there is a limit in shortening the size of the antenna using a dielectric having a high dielectric constant.

Accordingly, patch antennas for solving such problems have been proposed in various structures. One example is the patch antenna shown in US Pat. No. 10-0562788.

The patch antenna of No. 10-0562788 has a patch which forms one or more corners in a "ㄷ" shape or a "ㅌ" shape, and is installed at a predetermined distance from the patch, and the one or more edges surround the edges of the patch. A ground plate formed in a "c" shape, and a dielectric layer provided between the ground plate and the patch, wherein the patch is formed by bending the edge of the patch body and the patch body having a predetermined planar shape twice and the "c". The ground plate is composed of a vertical portion and a horizontal portion formed in a shape or "ㅌ" shape, the ground plate is composed of a plate body having a predetermined planar shape and a vertical portion and a horizontal portion bent to extend from the edge of the plate body, the ground The horizontal part of the plate is located opposite the plate body with the patch in between.

No. 10-0562788 is a folded patch antenna. When using the dielectric layer as an air layer, it is possible to simplify the manufacturing and manufacturing process. However, in order to achieve the purpose of miniaturization, the dielectric layer has a relative dielectric constant other than air. The use of this high dielectric has the disadvantage that the manufacturing and manufacturing process is complicated.

As such, there may be a patch antenna (Registration No. 10-0562786) using a dielectric lamination process.

The patch antenna of No. 10-0562786 has a ground plate, a patch provided at a predetermined distance from the ground plate, a dielectric layer provided between the ground plate and the patch, and the patch and / or the ground plate. It comprises a plurality of protruding pieces arranged at intervals and installed at a predetermined height.

As shown in Figs. 2 and 3, the patch antenna No. 10-0562786 is an iris patch antenna structure that has been successfully miniaturized by using a dielectric lamination process. 2 and 3, reference numeral 20 is a patch, reference numeral 22 is a ground plate, and reference numeral 24 is a protruding piece. Reference numeral 32 is a feed line, reference numeral 50 is a dielectric film, and reference numeral 52 is a patch hole. Reference numeral 54 denotes a protruding piece hole, and reference numeral 56 denotes a through hole.

In the patch antenna shown in Figs. 2 and 3, a plurality of dielectric films 50 are required to form patch holes 52 or through holes 56 in each dielectric film 50, and then the desired patch antennas are formed. It is a structure laminated in thickness, which has a complicated process compared to the manufacturing process of a patch antenna such as a conventional GPS patch antenna.

In particular, in order to have more than a certain gain characteristic, which is one of important characteristics of a general patch antenna, the thickness of the dielectric layer lying between the patch surface and the ground surface must be greater than or equal to a certain thickness. However, in the patch antennas of FIGS. 2 and 3 completed by using a dielectric stacking process, a process of making the overall thickness of the stacked dielectric films 50 to a desired thickness and a process of forming a protruding piece are required, and these processes are expensive. Only by using manufacturing equipment. As a result, manufacturing costs are increased, and it is difficult to satisfy low-cost products which are requirements of PDA terminals and vehicle GPS antennas in the commercial market.

SUMMARY OF THE INVENTION The present invention has been proposed to solve the above-mentioned conventional problems, and an object thereof is to provide a patch antenna and a method of manufacturing the same, which can be miniaturized and mass-produced using a dielectric having a low relative dielectric constant.

Patch antenna according to a preferred embodiment of the present invention to achieve the above object, the patch is connected to the feed line; A ground plate installed at a predetermined distance from the patch; And a dielectric layer disposed between the patch and the ground plate, wherein the dielectric layer is formed of one dielectric film and one or more holes are formed by a single punching.

The inner surface of each hole formed in the dielectric layer is plated, and the upper opening of the hole is in contact with the bottom edge portion of the patch.

Patch antenna according to another embodiment of the present invention, the patch is connected to the feed line; A ground plate installed at a predetermined distance from the patch; And a dielectric layer comprising one dielectric film disposed between the patch and the ground plate.

One or more holes into which the conductive material is inserted are formed in the patch and the dielectric layer by a single punch.

Patch antenna according to another embodiment of the present invention, the upper patch; A lower patch separated into a plurality of patch groups, each patch group separated into a plurality of patch flakes by a plurality of slots; A first dielectric layer disposed between the upper patch and the lower patch; A second dielectric layer provided on the bottom of the lower patch; And a ground plate installed at the bottom of the second dielectric layer,

In yet another embodiment, the upper patch and the lower patch are electrically connected to each other by a hole passing through the first dielectric layer.

In another embodiment of the present invention, the hole is formed to penetrate the edge portion of the upper patch and the lower patch and the first dielectric layer. A conductor may be inserted into the hole, and an inner surface of the hole may be plated with a metal material.

And, in another embodiment of the above, the plurality of patch groups of the lower patch is formed in a shape in which the opposite patch groups are symmetrical.

In another embodiment, the thicknesses of the first dielectric layer and the second dielectric layer are different. The dielectric constant of the first dielectric layer and the second dielectric layer is different. Preferably, the dielectric constant of the second dielectric layer is higher than that of the first dielectric layer.

On the other hand, a method of manufacturing a patch antenna according to an embodiment of the present invention, the process of preparing a dielectric layer of a predetermined thickness consisting of one dielectric film; Forming one or more holes in the dielectric layer by single punching; Plating the inner surface of the hole; And installing a patch on an upper surface of the dielectric layer in which the hole is formed, and installing a ground plate on the lower surface of the dielectric.

When the patch is installed on the upper surface of the dielectric layer in which the hole is formed, the upper opening of the hole is in contact with the bottom edge portion of the patch.

A method of manufacturing a patch antenna according to another embodiment of the present invention includes the steps of preparing a dielectric layer having a predetermined thickness consisting of one dielectric film; Installing a patch on an upper surface of the dielectric layer; Integrally forming the patch and the dielectric layer to form one or more holes in the patch and the dielectric layer by single punching; Inserting a conductive material into the hole; And installing a ground plate on a bottom surface of the dielectric layer.

Hereinafter, a patch antenna according to the present invention will be described with reference to the accompanying drawings.

In the present invention, it is assumed that the dielectric constant of the dielectric layer is as low as possible. For example, if a conventional GPS patch antenna having a relative dielectric constant of 20 is implemented according to the present invention, the dielectric constant of the dielectric layer may be 7.5 or a general FR-4 PCB having a relative dielectric constant of about 4.6. .

(First embodiment)

4 is an exploded perspective view of a patch antenna according to the first embodiment of the present invention, FIG. 5 is a combined perspective view of FIG. 4, FIG. 6 is a cross-sectional view taken along line A-A of FIG. 5, and FIG. 7 is a plan view of FIG. 5.

The patch antenna of the first embodiment includes a patch 70 having a through hole 70a formed therein and a feed line 96 connected to a feed point (not shown) through the through hole 70a; A ground plate (80) formed with a through hole (80a) and installed at a predetermined distance from the patch (70); And a dielectric layer (or dielectric substrate) 90 provided between the patch 70 and the ground plate 80, wherein at least one hole 92, 94 is formed by punching.

Here, the patch 70 is a thin metal plate of high electrical conductivity, such as copper, aluminum, gold, silver, and the like.

The diameter of the through hole 80a of the ground plate 80 is larger than the diameter of the feed line 96. This is to prevent a short circuit between the feed line 96 and the ground plate 80.

In addition, the dielectric layer 90 may be a layer having a desired thickness by laminating a plurality of sheets (dielectric films) or a layer having a desired thickness with one sheet (dielectric film). Let's make layer of desired thickness with sheet of.

In addition, a through hole 90a is formed in the dielectric layer 90, and a feed line 96 for supplying power to the patch 70 is inserted through the through hole 90a. One end of the inserted feed line 96 is connected to a feed point (not shown) of the patch 70, and the other end of the feed line 96 penetrates the through hole 80a of the ground plate 80. It is connected to a PCB substrate (not shown).

In addition, the holes 92 and 94 formed in the dielectric layer 90 are edge portions of the dielectric layer 90 (more specifically, the outermost portions of the facing portions when facing the patch 70). It is formed in, simply formed by punching. In the first embodiment, a plurality of holes 92a to 92n; 92 are formed in the direct direction by punching in the upper left portion of the dielectric layer 90, and a plurality of holes 94a to the upper right portion of the dielectric layer 90 are formed. 94n; 94) was formed in the direct direction by punching.

Although the holes 92 and 94 are formed in the upper left / right side of the dielectric layer 90 in the same figure, the upper edge of the dielectric layer 90 (more specifically, in the portion facing the patch 70 when facing the patch 70). A hole may be formed as a whole along the outermost part). The holes 92 and 94 may pass through the dielectric layer 90 or may have a predetermined depth. Inner surfaces of the holes 92 and 94 are preferably plated for electrical connection with the patch 70.

The holes 92 and 94 may have various shapes such as a circle, a triangle, a rectangle, and a pentagon.

The diameter and number of the holes 92 and 94 may vary depending on the desired resonance frequency. In other words, since the resonant frequency can be changed by changing the size, number, and length of the holes 92 and 94, the diameter and number of the holes 92 and 94 will vary depending on the desired resonant frequency. Further, the larger the number of the holes 92 and 94, the narrower the gap between the holes 92 and 94, and the larger the diameter of the holes 92 and 94, the larger the miniaturization ratio of the patch antenna. In addition, when the holes 92 and 94 are not formed to penetrate, that is, when the holes 92 and 94 are formed to have a predetermined depth, the smaller the depth of the holes 92 and 94 becomes, the larger the reduction ratio becomes.

Various methods can be adopted to manufacture the patch antenna of the first embodiment of the present invention configured as described above, one of which is described below.

First, a dielectric layer 90 having a relative dielectric constant of 7.5, a size of 25 * 25 mm, and a thickness of 4 mm is prepared.

Holes 92 and 94 are then formed in the edge portion of the prepared dielectric layer 90 using a conventional punching machine (for example, a punching machine used for manufacturing a PCB substrate; not shown) (or drill). At this time, the holes 92 and 94 formed may pass through the dielectric layer 90 or may have a predetermined depth (for example, 3.2 mm).

Thereafter, the inner surfaces of the holes 92 and 94 are plated with a conductive material.

A patch 70 is provided on the upper surface of the dielectric layer 90 on which the holes 92 and 94 are formed, and a ground plate 80 is provided on the lower surface of the dielectric 90. When the patch 70 is provided on the upper surface of the dielectric layer 90 in which the holes 92 and 94 are formed, the upper openings of the holes 92 and 94 come into contact with the bottom edge portion of the patch 70.

(Second embodiment)

8 is an exploded perspective view for explaining the configuration of a patch antenna according to a second embodiment of the present invention.

In the first embodiment of the present invention described above, the holes 92 and 94 are formed in the edge portion of the dielectric layer 90 and the inner surfaces of the holes 92 and 94 are plated, but in the second embodiment of the present invention, A hole 95 having a predetermined diameter was formed in the patch 70 and the dielectric layer 90, and the metal pin 100 was inserted into the hole 95.

That is, in FIG. 8, a hole 95 having a predetermined diameter is drilled along an edge portion of the patch 70, and corresponds to an edge portion of the dielectric layer 90 (that is, the position of the hole 95 of the patch 70). Position), a hole 95 having the same diameter as that of the patch 70 is formed to a predetermined depth.

Here, each of the holes 95 formed in the dielectric layer 90 may pass through the dielectric layer 90 or maintain a predetermined depth. The depths of the holes 95 formed in the dielectric layer 90 are equal to each other.

When forming the hole 95, it is preferable to form a hole using a conventional punching machine after laminating the patch 70 on the dielectric layer 90 to make a lower cost product (patch antenna).

Then, a metal pin 100 is inserted into the hole 95. The metal pin 100 may have an empty central portion. The metal pin 100 is directly connected to the patch 70 or connected by soldering or the like.

9 is a variation of FIG. 8, which differs in the depth of the hole 95 and the length of the metal pin 100.

That is, although the depths of the holes 95 formed in the dielectric layer 90 are the same in FIG. 8, the depths of the holes 95 are the same. Accordingly, the depth of the metal pin 100 is also differential.

In FIG. 9, since the dielectric layer 90 is illustrated as having a rectangular plane, seven holes 95 are formed in each side of the dielectric layer 90. The depth of the center hole was the deepest and the farther from the hole, the smaller the depth was. This is to implement a different depth of each hole 95 to implement a circular polarization by varying the length from the feed portion to the radiator. Of course, if necessary, the depth of the hole 95 may be reversed. The reason why the holes 95 are formed in each side of the dielectric layer 90 is because the intensity of the electric field of the portion is the strongest, and the resonance frequency can be adjusted by applying deformation to the portion. Therefore, what is necessary is just to adjust the depth of the hole 95 as a way to obtain desired resonance frequency.

Accordingly, the lengths of the metal pins 100 inserted into the holes 95 also differ from each other corresponding to the depths of the holes 95 to be fitted.

In particular, since the metal pin 100 is used in FIGS. 8 and 9 described above, it is not necessary to plate the inner surface of the hole 95. In other words, in the first embodiment of the present invention, the inner surface of the hole is plated, but in the second embodiment and the modification of the present invention, since the metal pins are not used, the plating is not necessary. Low cost patch antenna implementation is possible.

Various methods can be adopted to manufacture the patch antenna of the second embodiment of the present invention and its modifications configured as described above, one of which will be described below.

First, a dielectric layer 90 having a relative dielectric constant of 7.5, a size of 25 * 25 mm, and a thickness of 4 mm is prepared.

Then, the patch 70 is provided on the upper surface of the dielectric layer 90.

Thereafter, the patch 70 and the dielectric layer 90 are integrally formed, and a plurality of holes 95 are formed at the edges of a conventional punching machine (for example, a punching machine used for manufacturing a PCB substrate; not shown) (or a drill). To form. At this time, the hole 95 formed may pass through the dielectric layer 90 or may have a predetermined depth (for example, 3.2 mm). Of course, the depths of the holes 95 formed in the dielectric layer 90 may be different.

Then, a conductive material such as metal pin 100 is inserted into the hole 95.

Finally, the ground plate 80 is provided on the bottom surface of the dielectric layer 90.

Fig. 10 is a graph for explaining that the conventional reflection loss can be obtained by the patch antenna according to the first or second embodiment of the present invention.

In FIG. 10, a is a graph showing the reflection loss of a conventional GPS antenna (for example, an antenna having a dielectric layer having a size of 25 * 25 mm, a dielectric layer having a thickness of 4 mm, and a relative dielectric constant of 20), and b is a conventional dielectric stack and an iris ( is a graph showing the return loss of a GPS antenna (for example, an antenna having a dielectric layer of 25 * 25 mm, a dielectric layer of 4 mm in thickness, and a dielectric constant of 20).

Referring to FIG. 10, when the same size, width, and relative dielectric constant are used, the frequency (b) of the GPS antenna using the conventional dielectric stack and the iris is shifted to the low frequency side of about 500 MHz or more from the frequency (a) of the conventional GPS antenna. Can be. This means that the length of the antenna is increased due to the iris.

Therefore, in the patch antenna according to the first or second embodiment of the present invention, the size of the patch 70 is 22 * 22 mm, and the dielectric constant of the dielectric layer 90 is 7.5, for example, the dielectric layer 90 The size of the dielectric layer 90 is 4 mm, the holes 92 and 94 of the dielectric layer 90 are seven, respectively, and the depths of the holes 92 and 94 are 3.2 mm. In case of moving to the same GPS band as before.

In other words, in FIG. 10, a is a reflection loss graph of the conventional ceramic patch antenna using the relative dielectric constant 25, and in FIG. 10, b is a reflection that appears when holes are formed in the existing ceramic patch antenna using the dielectric constant 25 as shown in FIG. 4. Since it is a loss graph, the graph (a, b) of FIG. 10 is a graph which can be compared with the case where a hole was formed in the same dielectric which has a dielectric constant of 20. FIG. When the patch antenna having a hole in relative dielectric constant 20 is replaced with a relative dielectric constant of about 7.5, the resonant frequency is shifted to the GPS band again.

That is, since the resonant frequency can be changed by the number and length of the holes 92 and 94 of the dielectric layer 90, the dielectric material having a low relative dielectric constant (low dielectric) while satisfying the same radiation characteristics and electrical characteristics can be used. This means that it is possible to solve problems such as a decrease in production yield caused by the use of a high dielectric constant (high dielectric) and a rise in product cost.

(Third Embodiment)

FIG. 11 is an exploded perspective view of a patch antenna according to a third embodiment of the present invention, FIG. 12 is a coupled state diagram of FIG. 11, FIG. 13A is a view showing an upper surface portion of the first dielectric layer shown in FIG. 12, and FIG. 13B is 12 illustrates a bottom portion of the first dielectric layer illustrated in FIG. 12.

The patch antenna according to the third embodiment includes an upper patch 110, a lower patch 120, a first dielectric layer 130, a second dielectric layer 140, and a ground plate 150.

The upper patch 110 is a thin plate made of metal having high electrical conductivity, such as copper, aluminum, gold, and silver, and has a through hole 112 formed therein. A feed line (not shown) is connected to a feed point (not shown) through the through hole 112. In addition, holes 132 having a predetermined diameter are drilled at the edges (eg, four locations) of the upper patch 110.

The lower patch 120 is a thin plate of the same material as the upper patch 110. The lower patch 120 is separated into a plurality of patch groups (four patch groups in FIG. 11) and each patch group is separated into a plurality of patch lamellas 121 by a plurality of slots 122. The plurality of patch groups of the lower patch 120 is formed spaced apart from each other. In FIG. 11, the patch groups that face each other are formed in a symmetrical shape, but may be formed in an asymmetrical shape. A hole 132 having a predetermined diameter is drilled in the outermost portion of each patch group of the lower patch 120 (that is, the outermost portion of the patch lamella 121).

Here, the narrower the interval between the slots 122, the larger the capacitor value formed therebetween, so that the resonance frequency characteristics are lower than those of the conventional folded patch antenna (No. 10-0562788). .

The first dielectric layer 130 is installed between the upper patch 110 and the lower patch 120. Holes 132 having a predetermined diameter are drilled in the direction of the edges of the first dielectric layer 130 (for example, positions corresponding to positions of the holes 132 of the upper patch 110 and the lower patch 120).

Here, the holes 132 formed in the upper patch 110, the lower patch 120, and the first dielectric layer 130 are formed at the same position. Then, a conductive material such as metal pin 160 is inserted into the hole 132 to electrically connect the upper patch 110 and the lower patch 120. The metal pin 160 may have an empty central portion.

That is, in the case of FIG. 11, the upper patch 110 and the lower patch 120 are electrically connected by using the metal pin 160, but the upper patch 110 and the lower part are not provided even if the metal pin 160 is not present. Connection between patches 120 is possible. For example, the upper patch 110 and the lower patch 120 may be connected by using the hole 132 plating, which can be fully understood by those skilled in the art without providing a separate drawing. In the case of the third embodiment, it is more preferable to form a hole by hole plating after punching than to add the metal pin 160 in order to reduce the number of manufacturing processes.

As such, by separating the upper patch 110 and the lower patch 120 with the first dielectric layer 130 interposed therebetween, that is, formed in parallel with the ground plate in the conventional folded patch antenna (No. 10-0562788). By separating the bottom patch surface (that is, the bottom portion of the "c" shape or "ㅌ" shape patch) from each other instead of the same surface, it exhibits the same resonance frequency characteristics as the existing folded patch antenna (see Figure 1) Compared with the planar patch antenna which is a disadvantage of the existing folded patch antenna (Patent No. 10-0562788), the problem of deterioration of radiation characteristics is solved. In other words, when the upper patch 110 and the lower patch 120 are separated from each other with the first dielectric layer 130 interposed therebetween, the lower patch 120 may have the same patch area as that of the existing folded patch antenna. By the slot 122 formed in the) has a characteristic that the electrical patch area looks long due to the coupling phenomenon between the patch flakes 121. Accordingly, as shown in FIG. 14, the bandwidth of the patch antenna (see (b)) according to the third embodiment of the present invention is 40 MHz, which is wider than the bandwidth of the existing patch antenna (see (a)) of 20 MHz. 15, it can be seen that the resonant frequency (1.79196875 GHz; (a)) of the conventional folded antenna is different from that of the patch antenna of the third embodiment (1.575 GHz; (b)). In order to make the existing folded patch antenna have a characteristic of a resonance frequency of 1.575 GHz, it is understood that the patch size of the existing folded patch antenna must be larger than that of the third embodiment of the present invention.

Meanwhile, in FIG. 11, the second dielectric layer 140 has a thickness smaller than the thickness of the first dielectric layer 130. For example, if the thickness of the first dielectric layer 130 is 3.2 mm, the thickness of the second dielectric layer 140 is about 0.8 mm. Through holes 112 are also formed in the second dielectric layer 140. Resonance frequency decreases as the thickness of the dielectric layer located at the upper part becomes thicker at a predetermined thickness. For the purpose of miniaturization, in the third embodiment, the thickness of the first dielectric layer 130 located at the upper part of the second dielectric layer 140 is located. It was thicker than thickness.

In the third embodiment, the dielectric constant of the second dielectric layer 140 is higher than the dielectric constant of the first dielectric layer 130. Although the dielectric constant of the said 1st dielectric layer 130 and the 2nd dielectric layer 140 may be made the same, it is preferable to make it different. The reason is to further downsize the patch antenna. In other words, the physical length of the surface of the lower patch 120 formed in parallel with the ground plate 150 is increased to increase the relative dielectric constant of the second dielectric layer 140, thereby obtaining the effect of lengthening the antenna further. This is because it can be miniaturized. In addition, the gain characteristics have an advantage compared to the existing structure that implements miniaturization while increasing the relative dielectric constant.

Then, the thickness of the existing patch antenna that is the sum of the thicknesses of the first dielectric layer 130 and the second dielectric layer 140.

The ground plate 150 is formed with a through hole 112 having a larger diameter than that of a feed line (not shown). A feed line (not shown) connected to a feed point (not shown) of the upper patch 110 is inserted through the through hole 112. One end of the inserted feed line (not shown) is connected to a feed point (not shown) of the upper patch 110, and the other end of the feed line (not shown) passes through the through hole 112 of the ground plate 150. Typically connected to a PCB substrate (not shown).

For example, the size of the patch antenna and the patch antenna according to the third embodiment is 25 * 25 * 4mm, and the relative dielectric constant of the patch antenna is 20 and the patch antenna according to the third embodiment is When the relative dielectric constant is 4.6 (that is, the relative dielectric constant of the first dielectric layer 130 and the second dielectric layer 140 is equal to 4.6), the existing patch antenna weighs approximately 9.5 g, and the third embodiment According to the patch antenna weighs approximately 5.1g.

When comparing the gain characteristics of the patch antenna of the third embodiment with the gain characteristics of the existing patch antenna, as shown in FIG. 16, the gain characteristics (see (b)) of the patch antenna of the third embodiment are the existing patch antennas. It is somewhat inferior to the gain characteristic of (see (a)). However, compared with the conventional folded patch antenna, as shown in FIG. 17, the gain characteristic (see (a)) of the conventional folded patch antenna is -0.09 dBi and the gain characteristic of the patch antenna according to the third embodiment. (see (b)) is 2.97 dBi, with a difference in gain characteristics of approximately 3 dBi. Therefore, according to the patch antenna of the third embodiment, it can be seen that the problem of deterioration of radiation characteristics in the conventional folded antenna is improved.

On the other hand, the present invention is not limited only to the above-described embodiment, but can be modified and modified within the scope not departing from the gist of the present invention, the technical idea to which such modifications and variations are also applied to the claims Must see

As described in detail above, the present invention has the following effects.

In the first embodiment, by forming a plurality of holes by punching in a low dielectric constant dielectric layer consisting of a single thin film to implement the antenna, it is much easier to manufacture the antenna than the conventional dielectric lamination method, but also a large amount of low-cost manufacturing process Production is possible.

In the second embodiment, holes are formed in the patch and the dielectric layer of low dielectric constant, and then connected to the patch using metal pins, etc., without plating the respective holes, so that a small sized and low cost patch antenna can be produced in large quantities. do.

In the third embodiment, the patch is composed of a plurality of perforated upper patches and lower patches, two low dielectric constant dielectric layers, and slots in the lower patches, which radiate efficiency and gain in comparison with conventional folded patch antennas. The characteristics are excellent, and the size is smaller than the conventional folded patch antenna.

In the first to third embodiments, an antenna having the same resonant frequency characteristics as that of a conventional high dielectric constant antenna can be implemented even when the dielectric layer is a low dielectric constant dielectric.

In addition, unlike the patch antenna using the high dielectric constant, the first to third embodiments can use the low dielectric and change the resonance frequency and the miniaturization ratio through the holes / slots, thereby satisfying the desired size and frequency. It is possible to manufacture a miniaturized antenna.

Claims (15)

delete delete delete delete delete delete delete Upper patch; A lower patch separated into a plurality of patch groups, each patch group separated into a plurality of patch flakes by a plurality of slots; A first dielectric layer disposed between the upper patch and the lower patch; A second dielectric layer provided on the bottom of the lower patch; And A ground plate installed at a bottom of the second dielectric layer, And the upper patch and the lower patch are electrically connected to each other by a hole passing through the first dielectric layer. The method according to claim 8, The hole is a patch antenna, characterized in that formed through the edge portion of the upper patch and the lower patch and the first dielectric layer. The method according to claim 8 or 9, Patch antenna, characterized in that the conductive material is inserted into the hole. The method according to claim 8 or 9, The inner surface of the hole is a patch antenna, characterized in that the plated with a metal material. The method according to claim 8, The plurality of patch groups of the lower patch is a patch antenna, characterized in that formed in a shape in which the opposite patch groups are symmetrical. The method according to claim 8, The patch antenna, characterized in that the thickness of the first dielectric layer and the second dielectric layer is different. The method according to claim 8, And a dielectric constant of the first dielectric layer and the second dielectric layer is different. The method according to claim 14, A patch antenna, wherein the dielectric constant of the second dielectric layer is higher than that of the first dielectric layer.

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