KR100787456B1 - Method for driving plasma display panel and x driver driving common electrode of the plasma display panel - Google Patents

Abstract

A method for driving a plasma display panel and an X driver driving a common electrode of the plasma display panel are provided to suppress an EMI(ElectroMagnetic Interference) due to an abrupt current change by preventing a driving voltage from being increased or decreased in a step-wise manner. During a rising period of a reset address pulse, an energy recovery circuit(408) is activated so that a driving voltage applied to a common electrode is prevented from being increased in a step-wise manner. Before a reset address voltage is applied to the common electrode by turning on first and second transistors(Xe1,Xe2), a rising-period transistor(Xr) in the ERC(Energy Recovery Circuit) is turned on so that a resonance occurs among a panel capacitor(Cp), a resonance inductor(Lx), and a charging capacitor(Cx) and the potential of the panel capacitor is gradually increased. When charges are supplied from the charging capacitor to the panel capacitor through the rising-period transistor, a rising period diode(Dr), and the resonance inductor, the driving voltage is gradually increased.

Description

Method for driving plasma display panel and X driver driving common electrode of the plasma display panel

BRIEF DESCRIPTION OF THE DRAWINGS In order to understand the drawings referred to in the detailed description of the invention, a brief description of each drawing is provided.

1 is a diagram illustrating waveforms of driving voltages applied to a common electrode, a scan electrode, and a data electrode of a plasma display panel.

FIG. 2A is a diagram illustrating a driving device of a plasma display panel, and FIG. 2B illustrates waveforms of driving voltages applied to the common electrode X and the scan electrode Yn in the reset period R and the address period A, respectively. It is a figure shown in detail.

3 is a view for explaining a method of driving the common electrode X in the reset period R and the address period A according to a preferred embodiment of the present invention.

4A and 4B are diagrams illustrating an X driver for driving the common electrode X of the plasma display panel according to an exemplary embodiment of the present invention.

5 is a view for explaining the effect of driving the common electrode X according to the present invention.

<Description of Reference Number in Drawing>

402: reset address voltage supply

404: sustain voltage supply

406: ground voltage supply

408: energy recovery circuit

The present invention relates to a method of driving a plasma display panel and an X driver for driving a common electrode of the plasma display panel. In particular, the present invention suppresses the step-up or step-down of the driving voltage applied to the common electrode in the reset period and the address period, thereby generating electromagnetic interference (EMI) due to a sudden current change. It relates to a technique for reducing the.

Plasma display panels are one of the flat panel display devices that are in the spotlight in recent years. The plasma display panel includes a plurality of discharge cells formed by separating the space between two substrates on which a plurality of electrodes are formed by partition walls. Each discharge cell corresponds to each pixel of the plasma display panel. When a driving voltage is applied to each of the discharge cells through the plurality of electrodes, vacuum ultraviolet rays due to discharge are generated in each discharge cell. The vacuum ultraviolet rays excite the phosphor formed in a predetermined pattern to generate visible light, and the plasma display panel uses the visible light to display a screen corresponding to the input image data.

1 is a diagram illustrating waveforms of driving voltages applied to a common electrode, a scan electrode, and a data electrode of a plasma display panel. Typically, the three-electrode type plasma display panel includes a common electrode X, a scan electrode Yn, and a data electrode Am.

The plasma display panel displays a screen in units of frames. One unit frame is divided into a plurality of sub frames SF1, SF2, SF3, SF4, ... in order to realize time division gray scale display. Each subframe SF is further divided into a reset section R, an address section A, and a sustain section S.

In the reset section R, reset discharge is performed between the common electrode X and the scan electrode Yn to uniformly initialize the states of all the discharge cells. In the reset period R, the scan electrode Yn includes the first reset voltage Vsch, the second reset voltage Vset + Vsch, the first reset voltage Vsch, and the third reset voltage from the ground voltage Vg. To Vnf), a reset pulse is gradually applied. In the address period A, a scan pulse having an address voltage Vscl is applied to the scan electrode Yn for a predetermined time period, and a data pulse for selecting a discharge cell is applied to the data electrode Am to select a specific discharge cell. Will be. In the sustain period S, display discharge is performed for the discharge cells selected in the address period A by the number of times corresponding to the gray level assigned to each subframe SF. For display discharge between the common electrode X and the scan electrode Yn, the sustain voltage Vs and the ground voltage Vg are alternately applied to the common electrode X and the scan electrode Yn.

The driving voltages applied to the common electrode X in the reset period R and the address period A will be described. In the reset period R and the address period A, a reset address pulse is applied to the common electrode X. The reset address pulse raises the waveform from the ground voltage Vg to the reset address voltage Ve during the reset period R, and drops from the reset address voltage Ve to the ground voltage Vg at the end of the address period A. To have a pulse.

However, as shown in FIG. 1, hard switching occurs in the rising section of the reset address pulse and the falling section of the reset address pulse. That is, when the driving voltage applied to the common electrode X is raised from the ground voltage Vg to the reset address voltage Ve, the drive voltage is raised step by step by hard switching. In addition, when the driving voltage applied to the common electrode X is lowered from the reset address voltage Ve to the ground voltage Vg, the drive voltage is stepped down by hard switching.

The occurrence of hard switching is accompanied by a sharp current change. Rapid current changes can cause electromagnetic interference (EMI) in other nearby electronics, causing malfunctions of other nearby electronics. Accordingly, there is a need for a driving method of a plasma display panel that can avoid hard switching.

The present invention provides a driving method of a plasma display panel that suppresses hard switching and reduces the occurrence of electromagnetic interference (EMI), and an X driver for driving the plasma display panel by executing the driving method. To provide.

A method of driving the plasma display panel by applying a driving voltage having a waveform divided into a reset period, an address period, and a sustain period to a plasma display panel having a common electrode and a scan electrode, the method comprising: The driving method includes: a reset address pulse rising from the ground voltage to the reset address voltage during the reset period to the common electrode in the reset period and the address period, and then falling from the reset address voltage to the ground voltage at the end of the address period. Applies a voltage, but operates an energy recovery circuit (ERC) using LC resonance in the rising period of the reset address pulse, such that the driving voltage applied to the common electrode rises stepwise. At restraint Turn on.

In addition, the driving method of the plasma display panel according to the present invention operates the energy recovery circuit ERC even in the falling section of the reset address pulse so that the driving voltage applied to the common electrode falls step by step. Can be suppressed.

In one embodiment of the present invention, the common electrode is raised from the ground voltage to the reset address voltage during the reset period to maintain the reset address voltage, and after having a potential of the floating state for a predetermined period, A driving voltage rising from the potential of the floating state to the reset address voltage at the beginning of the address period may be applied. In this case, the energy recovery circuit ERC is operated even in a section in which the driving voltage applied to the common electrode rises from the floating state potential to the reset address voltage, so that the driving voltage applied to the common electrode is stepwise. Step type rising can be suppressed.

A ground voltage supply unit applying a ground voltage to a common electrode of the plasma display panel, a reset address voltage supply unit supplying a reset address voltage to the common electrode, and an energy recovery circuit (ERC) that accumulates or provides charge using LC resonance. The X driver according to the present invention, wherein the X driver according to the present invention is configured to reset the waveform to a common electrode in the reset section and the address section when the waveform of the driving voltage is divided into a reset section, an address section, and a sustain section. Applying a reset address pulse rising from the ground voltage to the reset address voltage during the period and falling from the reset address voltage to the ground voltage at the end of the address period, in the rising period of the reset address pulse, the reset address voltage Than supply department The energy recovery circuit is first operated to suppress the step type rising of the driving voltage applied to the common electrode.

In addition, the X driver according to the present invention operates the energy recovery circuit before the ground voltage supply unit in the falling section of the reset address pulse, so that the driving voltage applied to the common electrode falls step by step. ) Can be suppressed.

In the reset section and the address section, the common electrode is raised from the ground voltage to the reset address voltage during the reset section to maintain the reset address voltage, and then has a potential of a floating state for a predetermined section. At the start of the address period, the voltage rises from the floating state potential to the reset address voltage and maintains the reset address voltage. Then, at the end of the address period, a driving voltage is lowered from the reset address voltage to the ground voltage. In this case, the X driver according to the present invention operates the energy recovery circuit earlier than the reset address voltage supply unit in a period in which a driving voltage applied to the common electrode rises from the floating state potential to the reset address voltage. , Common The driving voltage applied to the electrode can be suppressed to rise (step rising type) to step formula.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In describing the present invention, if it is determined that the detailed description of the related well-known configuration or function may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

Prior to explaining the present invention, first look at Figures 2a and 2b.

2A is a diagram illustrating a driving device of a plasma display panel.

The driving apparatus of the plasma display panel may include a Y driver for driving the scan electrode Yn, an X driver for driving the common electrode X, and an A driver for driving the data electrode Am. Each discharge cell included in the plasma display panel may be equivalently modeled by the panel capacitor Cp as illustrated in FIG. 2A. In FIG. 2A, the Y driver and the X driver are shown. The circuit shown on the left side of the panel capacitor Cp corresponds to the Y driver, and the circuit shown on the right side of the panel capacitor Cp corresponds to the X driver.

The Y driver scans the first reset voltage Vsch, the second reset voltage Vsch + Vset, the third reset voltage Vnf, the address voltage Vscl, the sustain voltage Vs, and the ground voltage Vg. Is applied to (Yn). The X driver applies the reset address voltage Ve, the sustain voltage Vs, the ground voltage Vg, and the like to the common electrode X.

The reset address voltage Ve is applied to the common electrode X through the transistor Xe1 and the transistor Xe2. The sustain voltage Vs is applied to the common electrode X through the transistor Xs, and the ground voltage Vg is applied to the common electrode X through the transistor Xg. The diode Ds and the diode Dg clamp the driving voltage applied to the common electrode X, so that the driving voltage applied to the common electrode X in the sustain period S is the sustain voltage Vs and the ground voltage Vg. Have a voltage value between. The resonance inductor Lx, the charging capacitor Cx, the rising section transistor Xr, the rising section diode Dr, the falling section transistor Xf, and the falling section diode Df are energy recovery circuits (ERC). Circuit). The rising section current Ixr is a panel via a transistor Xe1 and a transistor Xe2 from a power supply for supplying the reset address voltage Ve in a section in which the driving voltage applied to the common electrode X rises to the reset address voltage Ve. The current flowing through the capacitor Cp. The falling section current Ixf is a current flowing from the panel capacitor Cp to the ground voltage Vg terminal through the transistor Xg in the section in which the driving voltage applied to the common electrode X falls to the ground voltage Vg. . Hereinafter, a case in which the rising section current Ixr or the falling section current Ixf suddenly changes will be described with reference to FIGS. 2A and 2B.

FIG. 2B is a detailed view illustrating waveforms of driving voltages applied to the common electrode X and the scan electrode Yn in the reset period R and the address period A, respectively.

During the reset period R, when the transistor Xg is turned off in FIG. 2A and the transistor Xe1 and the transistor Xe2 are turned on, the driving voltage applied to the common electrode X is hard switched. Step type rises from the ground voltage Vg to the reset address voltage Ve by switching. In this case, the rising period current Ixr flowing through the transistors Xe1 and Xe2 to the panel capacitor Cp changes abruptly due to hard switching. At the end of the address period A, when the transistors Xe1 and Xe2 are turned off and the transistors Xg are turned on in FIG. 2A, the driving voltage applied to the common electrode X is The step type falls from the reset address voltage Ve to the ground voltage Vg by hard switching. In this case, the falling section current Ixf flowing from the panel capacitor Cp to the terminal of the ground voltage Vg through the transistor Xg changes abruptly due to hard switching. If the rising section current Ixr changes abruptly or the falling section current Ixf changes abruptly, electromagnetic interference EMI may occur to disturb the operation of other nearby electronic products.

As shown in FIG. 2B, the reset period R may be divided into a wall charge forming period TR1 and a wall charge erasing period TR2. In FIG. 2B, the driving voltage applied to the common electrode X has a potential of the floating state during the predetermined period T_floating during the wall charge erase period TR2. If the potential difference between the scan electrode Yn and the common electrode X is reduced by floating the common electrode X during the predetermined period T_floating in the wall charge erasing period TR2, the state of the plurality of discharge cells is equally even. The wall charge erasing operation of erasing a part of the wall charges in the discharge cells can be effectively executed so as to be initialized.

However, when the transistor Xe1 and the transistor Xe2 are turned on in FIG. 2A at the start of the address period A after the elapse of the predetermined period T_floating in which the common electrode X is in a floating state, the common electrode ( The driving voltage applied to X) is step type rising from the potential in the floating state to the reset address voltage Ve by hard switching. Even in this case, the rising section current Ixr flowing through the transistors Xe1 and Xe2 to the panel capacitor Cp changes abruptly due to hard switching, resulting in electromagnetic interference EMI.

The present invention is to reduce the electromagnetic interference (EMI) by suppressing the hard switching (Hard Switching) as described above. Hereinafter, a method of suppressing hard switching according to the present invention will be described with reference to FIGS. 3, 4A, and 4B.

3 is a view for explaining a method of driving the common electrode X in the reset period R and the address period A according to a preferred embodiment of the present invention. 3 illustrates a driving voltage applied to the common electrode X, a voltage applied to the gate terminals of the transistors Xe1 and Xe2 in FIGS. 4A and 4B and a gate terminal of the rising period transistor Xr in FIGS. 4A and 4B. The voltage applied to the gate terminal of the transistor Xg in FIGS. 4A and 4B and the voltage applied to the gate terminal of the falling section transistor Xf in FIGS. 4A and 4B are illustrated.

4A and 4B are diagrams illustrating an X driver for driving the common electrode X of the plasma display panel according to an exemplary embodiment of the present invention. 4A and 4B, a sustain voltage (Vs) having a panel capacitor (Cp), a transistor (Xe1) and a transistor (Xe2), a reset address voltage supply unit (402) for supplying a reset address voltage (Ve), a transistor (Xs), and a diode (Ds). ) Is provided with a sustain voltage supply 404 for supplying a transistor, a transistor Xg and a diode Dg, and a ground voltage supply 406 for supplying a ground voltage Vg, and an energy recovery circuit for accumulating or providing charge using LC resonance. (ERC. 408) is shown. The energy recovery circuit 408 receives charges from the panel capacitor Cp, the resonance inductor Lx causing the LC resonance, and the panel capacitor Cp, and accumulates or provides the accumulated charge to the panel capacitor Cp. A capacitor Cx, a rising section transistor Xr, a rising section diode Dr, a falling section transistor Xf, and a falling section diode Df are provided.

As shown in FIG. 3, in the common electrode X in the reset section R and the address section A, the address rises from the ground voltage Vg to the reset address voltage Ve during the reset section R. At the end of the section A, a reset address pulse is applied, which drops from the reset address voltage Ve to the ground voltage Vg. A wall for erasing wall charges so that the reset period R is formed so that the wall charge forming section TR1 for forming wall charges due to reset discharges in the plurality of discharge cells and the states of the plurality of discharge cells are evenly initialized. In the case of dividing into the charge erase section TR2, the driving voltage applied to the common electrode X rises from the ground voltage Vg to the reset address voltage Ve at the start of the wall charge erase section TR2.

In the present invention, the energy recovery circuit (ERC. 408) using LC resonance is operated in the rising section T_rising1 of the reset address pulse so that the driving voltage applied to the common electrode X is stepped. Suppress it. That is, in the rising period T_rising1 of the reset address pulse, the energy recovery circuit ERC 408 is operated before the reset address voltage supply unit 402 so that the driving voltage applied to the common electrode X rises stepwise. Suppress it. In FIG. 4A, the energy recovery circuit ERC is turned on before turning on the transistors Xe1 and Xe2 (see the voltages applied to the gates of Xe1 and Xe2 in FIG. 3) to apply the reset address voltage Ve to the common electrode X. 408 turns on the rising period transistor Xr (see the voltage applied to the gate of Xr in FIG. 3) to form an LC between the panel capacitor Cp, the resonance inductor Lx and the charging capacitor Cp. Resonance occurs and the potential of the panel capacitor Cp gradually rises. In the rising period T_rising1 of the reset address pulse, as shown in FIG. 4A, the charge accumulated in the charging capacitor Cx passes through the rising period transistor Xr, the rising period diode Dr, and the resonance inductor Lx. When provided to the panel capacitor Cp, the driving voltage applied to the common electrode X is gradually increased as shown in FIG. 3 without being step type rising. Accordingly, the electromagnetic wave interference EMI can be reduced by suppressing a sudden change in the rising section current (Ixr in FIG. 4A) in the rising section T_rising1 of the reset address pulse.

In FIG. 3, the reset address pulse rises from the ground voltage Xg to the reset address voltage Ve during the reset period R to maintain the reset address voltage Ve, and then the potential of the floating state during the predetermined period T_floating. After that, the voltage rises from the floating state potential to the reset address voltage Ve at the beginning of the address section A.

In the present invention, the energy recovery circuit ERC.408 is operated by operating the energy recovery circuit ECR 408 even in the period T_rising2 in which the driving voltage applied to the common electrode X rises from the potential in the floating state to the reset address voltage Ve. It is suppressed that the driving voltage applied to the step) rises step by step type. That is, in the period T_rising2 in which the driving voltage applied to the common electrode X rises from the potential in the floating state to the reset address voltage Ve, the energy recovery circuit ERC 408 is formed more than the reset address voltage supply unit 402. The operation is first performed to suppress the drive voltage applied to the common electrode X from rising stepwise. As shown in FIG. 3, if the rising section transistor Xr is turned on after the predetermined floating section T_floating has elapsed before the transistors Xe1 and Xe2 are turned on, a sudden change in the rising section current (Ixr in FIG. 4A) is performed. Can be suppressed and the driving voltage applied to the common electrode X can be gradually increased.

Further, in the present invention, the energy recovery circuit ERC 408 is also operated in the falling section T_falling of the reset address pulse so that the driving voltage applied to the common electrode X falls step by step. Suppress That is, in the falling section T_falling of the reset address pulse, the energy recovery circuit ERC 408 is operated before the ground voltage supply unit 406 so that the driving voltage applied to the common electrode X falls in stepwise fashion. Suppress The falling section of the energy recovery circuit ERC 408 before turning on the transistor Xg in FIG. 4B (see the voltage applied to the gate of Xg in FIG. 3) and applying the ground voltage Vg to the common electrode X. When the transistor Xf is turned on (see the voltage applied to the gate of Xf in FIG. 3), LC resonance occurs between the panel capacitor Cp, the resonance inductor Lx, and the charging capacitor Cp so that the panel capacitor The potential of (Cp) gradually falls. In the falling section T_falling of the reset address pulse, as shown in FIG. 4B, the charge accumulated in the panel capacitor Cp is charged through the resonance inductor Lx, the falling section diode Df, and the falling section transistor Xf. When distributed to the capacitor Cx, the driving voltage applied to the common electrode X is gradually lowered as shown in FIG. 3 without stepping down. Therefore, in the falling section T_falling of the reset address pulse, an abrupt change in the falling section current (Ixf in FIG. 4B) can be suppressed to reduce the electromagnetic interference EMI.

In this manner, the rising period T_rising1 of the reset address pulse, the period in which the driving voltage applied to the common electrode X rises from the potential in the floating state to the reset address voltage Xe, and the falling period of the reset address pulse At (T_falling), if the energy recovery circuit (ERC. 408) is operated to avoid hard switching, the sudden change of the rising section current Ixr and the falling section current Ixf is suppressed to prevent electromagnetic interference (EMI). Can be reduced.

5 is a view for explaining the effect of driving the common electrode X according to the present invention.

In the upper portion of FIG. 5, a driving voltage applied to the common electrode X and a scan electrode Yn during any one subframe SF divided into a reset period R, an address period A, and a sustain period S are shown. The driving voltage applied to) and the driving voltage applied to the data electrode Am are shown. In the lower part of FIG. 5, the rising section current Ixr1 when the present invention is not applied, the falling section current Ixf1 when the present invention is not applied, the rising section current Ixr2 when the present invention is applied, and The falling section current Ixf2 in the case of applying the present invention is shown.

Looking at the rising period (rear corresponding to T_rising1 in FIG. 3) of the reset address pulse in FIG. 5, the rising period current Ixr1 when the present invention is not applied changes rapidly due to hard switching. However, it can be seen that the rise section current Ixr2 slowly changes when the present invention is applied. Further, even in a section in which the driving voltage applied to the common electrode X rises from the potential in the floating state to the reset address voltage Ve (the section corresponding to T_rising2 in FIG. 3), the rising section in the case of applying the present invention The current Ixr2 changes slowly compared to the rising section current Ixr1 when the present invention is not applied. Also, in the falling section of the reset address pulse (section corresponding to T_falling in FIG. 3), the falling section current Ixf2 when the present invention is applied as compared to the falling section current Ixf1 when the present invention is not applied. Changes slowly. As described above, in the present invention, abrupt changes in the rising section current Ixr and the falling section current Ixf can be suppressed to reduce the occurrence of electromagnetic interference EMI.

In the above described the present invention with reference to the specific embodiment shown in the drawings, but this is only an example, those of ordinary skill in the art to which the present invention pertains various modifications and variations therefrom. Therefore, the protection scope of the present invention should be interpreted by the claims to be described later, and all the technical ideas within the equivalent and equivalent ranges should be construed as being included in the protection scope of the present invention.

According to the present invention, by suppressing the driving voltage applied to the common electrode in the reset period and the address period stepped up or down stepped, the generation of electromagnetic interference (EMI) due to a sudden current change Can be reduced.

Claims (12)

A method of driving the plasma display panel by applying a driving voltage having a waveform divided into a reset period, an address period, and a sustain period to a plasma display panel including a common electrode and a scan electrode, The common electrode in the reset period and the address period, During the reset period, the reset address voltage is raised from the ground voltage to maintain the reset address voltage, and then has a potential in a floating state for a predetermined period, and then rises from the potential in the floating state to the reset address voltage again. After maintaining the voltage, at the end of the address period is applied a reset address pulse that falls from the reset address voltage to the ground voltage, An energy recovery circuit (ERC) using LC resonance is operated in a section in which the reset address pulse rises from the floating state potential to the reset address voltage so that a driving voltage applied to the common electrode is stepwise. Suppressing step type rising Method of driving a plasma display panel, characterized in that. The method of claim 1, The energy recovery circuit ERC is operated in a section in which the reset address pulse rises from the ground voltage to the reset address voltage, thereby suppressing step type rising of a driving voltage applied to the common electrode. do or, The energy recovery circuit ERC is operated in a section in which the reset address pulse falls from the reset address voltage to the ground voltage, thereby suppressing step type falling of a driving voltage applied to the common electrode. And a plasma display panel driving method. The method of claim 1, The wall charge forming section for forming a wall charge by reset discharge in the plurality of discharge cells provided in the plasma display panel and the wall charges so that the state of the plurality of discharge cells are uniformly initialized. In the case of dividing into the wall charge erasing interval for erasing, The driving voltage applied to the common electrode rises from the ground voltage to the reset address voltage at the start of the wall charge erase period. Method of driving a plasma display panel, characterized in that. delete delete A ground voltage supply unit applying a ground voltage to a common electrode of the plasma display panel, a reset address voltage supply unit supplying a reset address voltage to the common electrode, and an energy recovery circuit (ERC) that accumulates or provides charge using LC resonance. In the X driver having: When the waveform of the driving voltage is divided into a reset section, an address section and a sustain section, The common electrode in the reset period and the address period, During the reset period, the reset address voltage is raised from the ground voltage to maintain the reset address voltage, and then has a potential in a floating state for a predetermined period, and then rises from the potential in the floating state to the reset address voltage again. After maintaining the voltage, at the end of the address period is applied a reset address pulse that falls from the reset address voltage to the ground voltage, In the period in which the reset address pulse rises from the floating state potential to the reset address voltage, the energy recovery circuit ERC is operated before the reset address voltage supply unit so that the driving voltage applied to the common electrode is stepwise. Suppressing step type rising X driver characterized by. The method of claim 6, In the period in which the reset address pulse rises from the ground voltage to the reset address voltage, the energy recovery circuit ERC is operated before the reset address voltage supply unit so that the driving voltage applied to the common electrode rises stepwise. (step type rising), or In the section in which the reset address pulse falls from the reset address voltage to the ground voltage, the energy recovery circuit ERC is operated before the ground voltage supply unit so that the driving voltage applied to the common electrode falls stepwise. suppressing step type falling) X driver characterized by. delete delete The method of claim 6, The energy recovery circuit (ERC), A resonant inductor for generating LC resonance with a panel capacitor equivalently modeling a discharge cell included in the plasma display panel; A charging capacitor that receives and accumulates charges from the panel capacitors or provides accumulated charges to the panel capacitors; A rising period transistor turned on in a rising period of a driving voltage applied to the common electrode; A rising period diode configured to control a direction of a current in a rising period of a driving voltage applied to the common electrode; A falling section transistor that is turned on in a falling section of a driving voltage applied to the common electrode; And A falling period diode controlling a direction of current in a falling section of a driving voltage applied to the common electrode; X driver comprising a. The method of claim 10, In the case of suppressing step type rising of the driving voltage applied to the common electrode, Providing charge accumulated in the charging capacitor to the panel capacitor through the rising period transistor, the rising period diode, and the resonance inductor. X driver characterized by. The method of claim 10, In the case where the driving voltage applied to the common electrode is suppressed from step type falling, And the charge stored in the panel capacitor is distributed to the charging capacitor via the resonance inductor, the falling section diode, and the falling section transistor.

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