KR100787261B1 - Formation of a relaxed useful layer from a wafer with no buffer layer - Google Patents

Abstract

The present invention relates to a process for forming the useful layer 6 from the wafer 10. The wafer 10 includes a support substrate 10 and a strained layer 2 each selected from crystalline materials. The process comprises the steps of (a) forming a perturbation region (3) in the supporting substrate (1) capable of forming structural perturbation at a defined depth; (b) supplying energy to cause relative relaxation of at least elastic deformation in the strained layer 2; (c) removing a portion of the wafer 10 on the opposite side with respect to the relaxed strained layer 2 'so that the useful layer 6 becomes a remaining portion of the wafer 10.

Wafer, useful layer

Description

FORMATION OF A RELAXED USEFUL LAYER FROM A WAFER WITH NO BUFFER LAYER

The present invention relates to a method of forming a useful layer from a wafer, the wafer comprising a strained layer and a substrate, respectively, selected from crystalline materials for use in microelectronics, optical or optoelectronics.

In the present specification, a layer is referred to as "relaxed" when the crystalline material constituting it has the same lattice parameter as its nominal lattice parameter, where the nominal lattice parameter refers to the lattice parameter of the balanced bulk material. Say.

In contrast, a "strained" layer is a crystalline material in which the crystal structure elastically deforms by tension or compression during crystal growth, such as epitaxial growth, the lattice parameter of which is nominal lattice parameter. Refers to any layer of material that is required to be different from .

In the same wafer, forming a first crystalline material layer on a substrate of a second crystalline material, each having a different nominal lattice parameter, while maintaining at least partially relaxed crystal structure and / or without an excessive number of crystallographic defects It is often useful or desirable to do so.

For this purpose, it is known to insert a buffer layer between the substrate and the formation layer.

In this configuration, a "buffer layer" is understood to mean a transition layer that matches the lattice parameters of the formation layer with that of the substrate.

For this purpose, the buffer layer can have a composition that changes gradually over thickness, wherein the gradual change in the components of the buffer layer is directly related to the gradual change in the lattice parameters of the buffer layer between each lattice parameter of the substrate and the forming layer. .

It may also have more complex forms such as compositional changes of various components, inversion in the presentation of the components, or discontinuous stepwise changes in the composition.

The formation of these various compositions takes a long time and is often complex to implement.

In addition, in order to minimize the density of crystallographic defects, the thickness of the buffer layer is usually thick, usually 1 to several microns.

Therefore, the manufacture of the buffer layer is often a long term, difficult and expensive process.

Another technique for mitigating elastic deformation in a forming layer that gives results similar to those requiring fewer processes is described by B. Hollander et al., "Strain relaxation of pseudomorphic Si _1-x Ge _x / Si (100) heterostructures after hydrogen or helium ion implantation for virtual substrate fabrication "(in Nuclear and Instruments and Methods in Physics Research B 175-177 (2001) 357-367).

The above process relates to the relaxation of the strained SiGe layer upon compression, which layer is formed on the Si substrate.

The technique used involves implanting hydrogen or helium ions into the Si substrate at a predetermined thickness through the surface of the strained layer.

Crystalline perturbation formed by ion implantation and located in the Si substrate layer present between the implantation region and the SiGe layer causes specific relaxation of the SiGe layer under heat treatment.

Thus, this technique enables the fabrication of a relaxed or pseudo-relaxed forming layer in the intermediate buffer layer by simple atomic or molecular injection into the substrate.

Therefore, this technique appears to be less time consuming, easier to implement, and less expensive than techniques involving buffer layer formation.

It may be interesting to use the technique to continuously integrate the relaxed or relaxed layer into a structure for the fabrication of components, in particular for electronics or optoelectronics.

The object of the present invention is, according to the first aspect, to form a useful layer from a wafer comprising a strained layer and a support substrate, respectively, selected from crystalline materials for application in microelectronics, optical or optoelectronics (a By providing a process comprising the steps of (c) to (c), it is successful to carry out the integration of this layer:

(a) forming a perturbation region at a predetermined depth capable of forming structural perturbation in the support substrate;

(b) supplying energy to cause at least relative relaxation of the elastic strain in the strained layer;

(c) removing a portion of the wafer on the opposite side of the relaxed strained layer, wherein the useful layer is the remainder of the wafer.

Another preferred aspect of the recycling process according to the invention is those given in claims 2 to 34.

According to a second aspect, the object of the present invention is the application of the removal process of claim 35.

According to a third aspect, the object of the present invention is a source wafer and structure which imparts a thin layer by the separation given in claims 36-39.

Further features, objects, and advantages of the invention will become more apparent upon reading the detailed description with reference to the following figures:

1 shows various steps of the process according to the invention.

2 shows a wafer according to the invention in which the useful layer will be separated.

3 shows another wafer according to the invention in which the useful layer will be separated.

The present invention,

A source wafer, wherein the useful layer is

  A support substrate, and

  A strained layer on the supporting substrate

   A source wafer comprising a, and

A receiving substrate forming a support for the formation of the useful layer.

In the present specification, generally, "useful layer" refers to a portion of a source wafer formed on a receiving substrate.

The basic object of the present invention consists in forming a relaxed or relaxed useful layer on the receiving substrate from the source wafer, the useful layer being at least partly included in the strained layer of the source wafer.

The strained layer has been previously relaxed or relaxed without a buffer layer.

1A is a source wafer 10 according to the present invention.

The wafer 10 consists of a support substrate 1 and a strained layer 2.

In the first configuration of the supporting substrate 1, the latter has an upper layer made of a crystalline material, such as a semiconductor material, having an interface with the strain layer 2 and having a first lattice parameter at the interface with the strain layer 2. It is a pseudo-substrate containing (not shown in FIG. 1).

The first lattice parameter of the top layer is preferably the nominal lattice parameter of the material constituting it, so that the material is in a relaxed state.

In addition, the upper layer has a sufficiently thick thickness so that its lattice parameter can be imparted on the overlying strained layer 2 without the latter having a substantial effect on the crystal structure of the upper layer of the supporting substrate 1.

In the second configuration of the supporting substrate 1, the latter consists only of a crystalline material having a first lattice parameter.

In another preferred configuration, the support substrate 1 is a single-crystal substrate.

Whatever configuration is selected for the supporting substrate 1, the latter preferably has a crystal structure having a low density of structural defects such as dislocations.

In the first configuration of the strained layer 2, the latter consists only of a single layer of crystalline material, such as a semiconductor material.

The material selected to form this strained layer 2 has a second nominal lattice parameter different from the first lattice parameter.

Subsequently, the strained layer 2 formed is elastically deformed by compression or tension by the supporting substrate 1, which has a lattice parameter different from the nominal lattice parameter of the material constituting it, so that the lattice parameter is close to the first lattice parameter. It is said to be forced to have parameters.

Preferably, the material selected for forming the strained layer 2 has a second nominal lattice parameter that is larger than the first lattice parameter and is deformed upon compression.

In addition, the strained layer 2 preferably has a constant composition of atomic elements.

In the second configuration of the strained layer 2, the latter consists of layers of materials having different thicknesses , each layer consisting of a crystalline material such as a semiconductor material.

In addition, each layer of the material of the strained layer 2 preferably has a constant composition of atomic elements.

The layer of material of the strained layer 2 directly adjacent to the interface with the supporting substrate 1 has the same physical properties as that of the strained layer 2 according to the first configuration.

The advantage of having a thin, relaxed material in the strained layer 2 will be at least one of the following:

It constitutes at least a portion of the useful layer formed on the receiving substrate to achieve specific material properties;

It constitutes a stop layer during the selective removal of the material carried out by selective material removal means, such as a selective chemical etching carried out by the etching solution, in particular to protect the adjacent layer from the removal material;

This has the possibility of more removal of the material carried out by the selective material removal means, such as selective etching, than the adjacent layer, the latter showing a stop layer during the selective material removal to protect against material removal.

The layer of relaxed material can also combine many of these functions and have other functions.

In all cases, the strained layer 2 has a general structure made of the material being strained, but it can also comprise one or more layers of relaxed material having a much smaller cumulative thickness than that of the strained layer 2. The latter maintains the entire deformed state.

Whatever the configuration chosen for the strained layer 2, the latter is preferably supported by crystal growth, such as epitaxial growth, using known techniques such as, for example, CVD (chemical vapor deposition) and MBE (molecular beam epitaxy) techniques. It is formed on (1).

In order to obtain the strained layer 2 without an excessive number of crystallographic defects such as, for example, point defects or extended defects such as dislocations, the supporting substrate 1 and the strained layer 2 ( The crystalline materials constituting the support substrate 1) are preferably selected so that there is a sufficiently small difference between their first and second respective nominal lattice parameters.

For example, the difference in lattice parameters is typically about 0.5% to about 1.5%, but may have a higher value.

For example, for IV-IV materials, Ge has a nominal lattice parameter about 4.2% greater than that of Si, so SiGe containing 30% Ge has a nominal lattice parameter about 1.15% greater than that of Si.

It is also desirable that the strained layer 2 has a substantially constant thickness so that it has a certain inherent property and / or can be bonded to the receiving substrate 5 in the future (shown in FIG. 1C).

In order for the strained layer 2 to be relaxed or no internal stresses of plastic type appear, the thickness of the strained layer should also be kept below the critical elastic strain thickness.

The critical elastic strain thickness basically depends on the above-described difference in the lattice parameters with the support substrate 1 and the material selected for the strain layer 2.

One skilled in the art will investigate the technique to know the value of the critical elastic strain thickness of the material he will use for the strained layer 2 formed on the material used for the support substrate 1.

Thus, once the strained layer is formed, the strained layer 2 has a lattice parameter similar to that of its growth substrate 1, whereby it has elastic deformation inside by compression or tension.

With reference to FIG. 1B, once the wafer 10 including the strained layer 2 is manufactured, a perturbation region 3 is formed in the support substrate 1 to a predetermined depth, and the transition layer 4 is perturbed. It is rebounded by the region 3 and the strained layer 2.

The perturbation zone 3 is defined as a zone with internal deformations that can form structural perturbations at the periphery.

The perturbation region 3 is preferably formed over the entire surface of the support substrate 1 in practice.

The perturbation region 3 is preferably formed throughout in parallel with the surface of the support substrate 1.

One process for forming the perturbation region 3 includes implanting atomic species into the support substrate 1 at the predetermined depth described above with a predetermined implantation energy and a predetermined amount of atomic species.

In one particular method of performing the implantation, the implanted atomic species comprise hydrogen and / or helium.

Thus, the perturbation region 3 formed by implantation has internal deformation or even crystallographic defects made by atomic species implanted on the crystal lattice adjacent to the perturbation region 3.

Thus, these internal strains can form crystallographic perturbations in the portion above the wafer 10.

Especially for this purpose, it is desirable to carry out the following appropriate and suitably parameterized treatments:

Creating the appearance of perturbation in the transition layer 4;

Causing the aforementioned displacement of the perturbation in the transition layer 4 from the perturbation region 3 to the interface with the strained layer 2; And

Causing at least relative relaxation of the strained layer 2 after the appearance and displacement of the perturbation.

Therefore, the main purpose of the treatment is to cause at least relative relaxation of the strain in the strained layer 2 to form a strained strained layer 2 '.

Therefore, heat treatment is preferably performed, if properly parameterized, to supply sufficient energy to cause the above-mentioned structural deformation.

This latter heat treatment must be carried out at a temperature or a plurality of temperatures, in particular below a critical temperature, above a temperature at which a large number of implanted atomic species are degassed.

Thus, local crystallographic perturbation is formed from internal strain in the perturbation region 3.

Basically, for reasons of minimizing the elastic energy in the strained layer 2, these perturbations are displaced towards the interface between the transitional layer 4 and the strained layer 2 along a path defined by a particular crystallographic plane. , In the transition layer 4.

Upon arrival at the interface between the transition layer 4 and the strained layer 2, these perturbations then lead to at least relative relaxation of the elastic strain in the strained layer 2, these relaxed strains predominantly of the strained layer 2. There is a lattice mismatch deformation between each nominal lattice parameter of the material and the material of the support substrate 1.

Alleviation of the elastic deformation in the strained layer 2 described above is mostly carried out by the appearance of crystalline perturbations around the strained layer 2, which are for example at the atomic level and at the interface at the free surface. It may be in the form of a potential having a parameter difference variation of.

However, relaxation of the strained layer 2 may also be performed by the appearance of inelastic crystal defects in the thickness of the layer, such as traversing dislocations.

Appropriate treatment can then be performed to reduce the number of these defects.

For example, suitable treatment may be performed such that the density of dislocations is increased between two limiting values, where the two limiting values define a range of dislocation densities at least some of the dislocations disappear.

For this purpose, heat treatment may preferably be carried out to suit the material used as used to form the perturbation in the transition layer 4 described above.

In all cases, the resultant is the relaxed or relaxed layer 2 ', whose nominal lattice parameters differ from the nominal lattice parameters of the growth substrate 1 without the intermediate buffer layer.

However, one or more layers of elastically deformable material can be found in the relaxed strained layer 2 '.

These layers of material were included in the strained layer 2 prior to the elastic relaxation of this layer, which had different lattice parameters than the rest of the strained layer 2.

The layer of material has been intrinsically relaxed as described above, for example, in the description of the second configuration of the strained layer 2.

During the overall relaxation of the strained layer 2, the layers of these materials undergo elastic deformations made by the relaxation of the surrounding material and are thus deformed.

However, the layers of these materials must have a much smaller cumulative thickness than that of the strained layer 2, so that the latter remains in a full relaxed or relaxed state after the elastic relaxation step.

In connection with FIG. 1C, the receiving substrate 5 is disposed on the wafer 10 surface on the side with the relaxed strained layer 2 ′.

The receiving substrate 5 constitutes a mechanical support strong enough to support the formed useful layer and to protect it from possible mechanical stresses from the outside.

This receiving substrate 5 may be made of, for example, silicon or quartz or another kind of material.

The receiving substrate 5 may be attached by bringing it into close contact with the wafer 10 and performing a bonding operation, where there is preferably a wafer bonding (molecular adhesion) between the receiving substrate 5 and the wafer 10. .

This combining technique is combined with alternatives such as Q.Y. It is described in Tong and U. Gosele and Wiley in "Semiconductor Wafer Bonding" (Science and Technology, Interscience Technology).

If necessary, the bonding is carried out by a suitable prior art treatment of each surface to be bonded and / or by the supply of thermal energy.

Thus, for example, the heat treatment performed during bonding allows the strength of the bond to be increased.

The bond can also be strengthened by a bonding layer inserted between the wafer 10 and the receiving substrate 5.

This bonding layer is applied to at least one of the two surfaces to be bonded.

Silicon oxide (also referred to as silica or SiO ₂ ) is a material that can be selected to make the bonding layer, which can be prepared by oxide deposition or thermal oxidation or any other technique.

Before and / or after bonding, surface finishing operations such as, for example, etching, chemical-mechanical polishing CMP, heat treatment or any other smoothing operation may be performed.

Once the receiving substrate 5 is bonded, a portion of the wafer 10 on the opposite side of the relaxed strained layer 2 'is removed, where the useful layer 6 is the remainder of the wafer 10.

Many known techniques for material removal can be used.

(Smart-Cut

)이라고 하는, 제1 물질 제거 기술은 하기 사항을 포함한다:So-called smart-cuts, known to those skilled in the art (and those that can be found in many tasks dealing with wafer reduction techniques).

Smart-Cut

The first material removal technique, called), includes the following:

Injection of atomic species (such as hydrogen or helium ions) before bonding with the receiving substrate 5 to form a weak region at a depth close to the implantation depth;

Then supplying energy, such as heat and / or mechanical treatment or another energy supply, to the soft region after bonding, in order to cause separation of the wafer 10 in two portions of the soft region.

Preferably, to further weaken the weak areas, the wafer 10 is heat treated during or after implantation.

In the first method of performing the material removal, the weak region is formed between the support substrate 1 and the relaxed strained layer 2 'or on the relaxed strained layer 2'.

In the second method of performing this material removal, the weak region is formed in the support substrate 1.

The weak region may be formed during or after the formation of the perturbation layer 3.

In the particular case of the second method of performing material removal, and in the case of the formation of the transition layer 4 by the formation of the perturbation region 3, the weak region has a predetermined energy and a predetermined amount of atomic species. By performing the same technique as the implantation of the atomic species, it can be formed at the same position as the perturbation region 3.

In this particular case, the weak region may be formed at the same time as the perturbation region 3 is formed.

Before or after implantation, the wafer 10 can also be subjected to a heat treatment having two functions, namely, further weakening the weak areas and alleviating the strained layer 2.

Therefore, the weak region is formed to have two functions therein: the function of weakening the supporting substrate 1 and the function of alleviating the strained layer 2.

The second material removal technique includes the following steps:

As described in document EP 0 849 788 A2, the wafer 10 may be formed by forming in at least one porous layer by anodization, by implanting atomic species, or by any other pore forming technique. Formation of soft interfaces;

Supplying energy to the soft layer, such as mechanical treatment, or another energy supply, to separate the wafer 10 in two portions within the soft layer.

In the first method of performing this material removal, the weak layer is formed between the support substrate 10 and the relaxed strained layer 2 'or in the relaxed strained layer 2'.

In the second method of performing this material removal, a weak layer is formed on the support substrate 1.

In order to form a weak layer in the supporting substrate 1, a porous layer is preferably formed on the piece of single crystal material, and then the second growth of the layer of nonporous crystalline material having the same lattice parameters as that of the piece. Performed on the porous layer, the supporting substrate 1 consists of the slice, the porous layer and the non-porous Si layer.

The first and second non-limiting material removal techniques allow a large portion of the wafer 10 to be removed collectively quickly.

These techniques also allow the removed portion of the wafer 10 to be reused in another process, such as the process according to the present invention.

Thus, the strained layer 2 and possibly some of the support substrate 1 and / or other layers can be reformed, preferably after the surface of the support substrate 1 is polished.

A third known technique consists in using chemical and / or chemical-mechanical removal processes.

For example, optional selective etching of the donor wafer 10 material to be removed may be performed using a "etch-back" type of process. This technique consists in etching the wafer 10 "from the back" for the purpose of retaining said portion of the wafer 10 that is to be held on the receiving substrate 5, where "from the back" is used. Means from the free surface of the support substrate 1.

Wet etching may be performed using an etching solution that may cause the material to be removed.

Also, in order to remove the material, dry etching such as plasma etching or sputtering may be performed.

In addition, the etching operation or operations may be only chemical or electrochemical or photoelectrochemical.

The etching operation or operations may be performed by or before the mechanical attack of the wafer 10, such as lapping, polishing, mechanical etching or sputtering of atomic species.

Etching operations or operations may optionally be performed by mechanical attack, such as polishing, in combination with mechanical abrasive in a CMP process.

Thus, the portion of wafer 10 to be removed can be removed entirely by chemical or chemical-mechanical means only.

In a first method of performing this material removal, an etching operation or operations are performed to protect at least a portion of the relaxed strained layer 2 'on the wafer 10.

In a second method of performing this material removal, the etching operation or operations are performed to protect the support substrate 1 and a part of the relaxed strained layer 2 'on the wafer 10.

The third technique makes it possible in particular to maintain the high surface quality and thickness uniformity of the strained layer 2 which can be obtained during its crystal growth.

These three techniques are proposed as examples in the present literature, but they do not constitute a limitation in any way, and the present invention is any type of technique capable of removing material from the wafer 10 in accordance with the process according to the invention. Is extended to.

Whatever material removal technique is selected from these three techniques or other known techniques, surface treatment techniques, such as optionally selective chemical etching, CMP polishing, heat treatment or any other smoothing operation, are performed on the useful layer .

In certain cases where a portion of the support substrate 1 remains after one of these techniques has been performed, and if the residual layer of the support substrate 1 is not desired to remain, it is supported against the relaxed strained layer 2 '. It may be desirable to perform a processing step that includes selective etching of the remaining portions of the substrate 1.

In the latter particular case, the relaxed strained layer 2 'is often subjected to mechanical polishing, such as a work-hardened region, so that the thickness is uniform, and / or has a good surface finish. It can be obtained so that a significant number of defects do not appear.

Further, by performing selective etching on the relaxed strained layer 2 ', it is possible to obtain a portion of the relaxed strained layer 2' having a constant thickness and / or good surface finish, where the latter is performed Stop layer for etching.

If it is desired to obtain very thin relaxed strained layers 2 'at the end, the latter two finishing operations with selective etching are particularly preferred.

In all cases, the last one obtained is a structure 20 comprising a receiving substrate 5, a useful layer 6 and any intervening bonding layer.

In the first method of performing material removal, only at least part of the relaxed strained layer 2 'is preserved.

The useful layer 6 consists of at least part of the relaxed strained layer 2 '.

In a second method of performing material removal, only at least a portion of the relaxed strained layer 2 'is preserved.

The useful layer 6 consists of a preserved portion of the support substrate 1 and the relaxed strained layer 2 '.

In this case, the remaining portion of the support substrate 1 may be deformed at least in part by the underlying relaxed strain layer 2 '.

In one particular method of using structure 20, one or more crystal growth operations may be performed on structure 20.

Once the final structure is achieved, a finishing step, such as a finishing process, such as an annealing operation to further strengthen the bonding interface between the useful layer 6 and the receiving substrate 5, may optionally be performed.

In one particular method of using structure 20, no matter what structure 20 is obtained, one or more epilayers may be grown on wafer 10.

In particular, layers made of materials of Si and SiGe will be tested.

As described above, SiGe containing 30% Ge has a nominal lattice parameter about 1% larger than that of Si.

The strained layer 2 of SiGe formed on the Si support substrate 1 with a constant Ge concentration may be suitable for carrying out the process of the present invention.

Preferred processes for forming the useful layer according to the present invention are shown in the following examples.

Example 1 Reference is made to FIG. 1A. This means that the wafer 10

Si support substrate 1; And

It relates to a case made of SiGe having a predetermined Ge concentration and comprising a strained layer 2 having a thickness smaller than the critical end-of-strain thickness (mentioned above).

The strained SiGe layer 2 has a typical Ge concentration of greater than 15%.

The strained SiGe layer 2 preferably has a defect density less than about 10 ⁷ cm ⁻² , such as dislocation.

Typical thicknesses of each of the strained layer 2 containing 15% Ge and the strained layer 2 containing 30% Ge are about 250 nm and about 100 nm, followed by their respective critical elastic strain ends remaining below ( critical end-of-elastic-strain thickness.

Referring to FIG. 1B, the perturbation region 3 is formed inside the Si support substrate 1 by injecting atomic species such as H or He.

The H or He implantation energy used is typically in the range of 12 to 25 keV.

The H or He dose injected is typically 10 ¹⁴ to 10 ¹⁷ cm ⁻² .

Thus, for example, for strained layer 2 containing 15% Ge, it is preferable to use H with an amount of about 3 × 10 ¹⁶ cm ⁻² at an energy of about 25 keV for implantation. something to do.

Thus, for example, for strained layer 2 containing 30% Ge, it is preferable to use He with an amount of about 2.0 × 10 ¹⁶ cm ⁻² at an energy of about 18 keV for implantation. something to do.

The implantation depth of atomic species is typically between 50 nm and 100 nm.

After the perturbation zone 3 is formed, a suitable heat treatment is carried out, in particular in order to replace the perturbation in the transition layer 4 and to eliminate dislocations in the relaxed strained layer 2 '.

The heat treatment is carried out in an inert atmosphere.

However, the heat treatment may also be carried out in other atmospheres such as, for example, an oxidative atmosphere.

Thus, the particular heat treatment performed on this type of wafer 10 is typically performed in a temperature range of 600 ° C. to 1000 ° C., typically in a time range of about 5 minutes to about 15 minutes.

For further details of this experimental technique, a study conducted by B. Hollander et al, in particular titled "Strain relaxation of pseudomorphic Si _1-x Ge _x / Si (100) heterostructures after hydrogen or helium ion implantation for virtual substrate fabrication" ( in Nuclear and Instruments and Methods in Physics Research B 175-177 (2001) 357-367).

In another case of forming the perturbation zone 3 according to the invention, hydrogen or helium is injected in an amount of about 10 ¹⁷ cm ⁻² .

This particular amount is consistent with the formation of soft areas using a Smart-Cut® type process and allows to form both the perturbation zone 3 and the soft zones.

Thus, such a weak region causes internal deformations that can form crystalline perturbations in the transition layer 4 formed thereon and is soft enough to detach the wafer 10 in two parts after providing energy. It has two functions.

In one particular embodiment, the continuous heat treatment will have two functions to mitigate strain and further weaken the weak areas in the strained layer 2.

Whatever specific implementation method is chosen to form the transition layer 4, the SiGe strain layer 2 is at least partially relaxed to form a SiGe relaxed strain layer 2 '.

Referring to FIG. 1C, the receiving substrate 5 attached to the wafer 10 may be made of any material such as silicon or quartz.

The SiO ₂ bonding layer is preferably interposed between the relaxed strained layer 2 'and the receiving substrate 5, in particular (see FIG. 1D), in particular to produce a structure 20 of SGOI or Si / SGOI type. Possible, where the insulator of interest in the structure 20 is a SiO ₂ layer.

Referring to FIG. 1D, one or more known techniques may be performed to remove material.

In particular, selective etching of Si can be performed using an etching solution having substantial selectivity to SiGe, which solution comprises at least one of the following compounds, as described on page 9 of the document WO 99/53539: It is solution.

: KOH, NH ₄ OH (ammonium hydroxide), TMAH, EDP or HNO ₃ or HNO ₃ , HNO ₂ , H ₂ O ₂ , HF, H ₂ SO ₄ , H ₂ SO ₂ , CH ₃ Solution combining agents such as COOH and H ₂ O.

In the first case, the latter selective etching can remove the remaining portion of the support substrate 1, which is removed for the relaxed strained layer 2 'retained on the structure 2, and is useful after the etching. Layer 6 will consist of a relaxed strained layer 2 '.

In the second case, the Si etch stop layer is located in the support substrate 1, and from the selective chemical etching of the etch-back type, it is possible to preserve the Si layer present on the stop layer, in which case the useful layer 6 A relaxed strained layer 2 'and a Si layer over the stop layer.

The stop layer is made of SiGe, for example, and the selective chemical etching of interest uses any of the above etching solutions.

Referring to FIG. 1D, a structure 20 is obtained that includes a receiving substrate 5 and a useful layer 6.

The useful layer 6 comprises at least a portion of the SiGe relaxed strained layer 2 'and any Si layer remaining in the portion of the support substrate 1 depending on the removal method used.

Example 2 Reference is made to FIG. 2. This embodiment relates to the same wafer 10 as Example 1, but further includes a relaxed Si layer on the strained SiGe layer.

Thus, the strained layer 2 is composed of a strained SiGe layer 2A and a relaxed Si layer 2B.

The strained layer 2 has a thickness smaller than the critical thickness of the SiGe of interest. Above this thickness, SiGe is relaxed.

The strained layer 2A has the same characteristics as the strained SiGe layer 2 of the first embodiment.

The relaxed Si layer 2B has a thickness that is much less than the total strain layer 2 thickness, so that the strain layer 2 retains the overall deformed structural properties.

The relaxed Si layer 2B has a thickness of about several tens of nanometers.

Performing the removal process is the same as that in Example 1.

The additional advantages of the production of the transition layer 4 and of the same heat treatment as in Example 1 have the following effects.

Elastically relaxed the deformed layer 2A to form a relaxed deformed layer 2A '(not shown).

Elastically deforming the relaxed layer 2B to form a modified relaxed layer 2B '(not shown). The latter has a lattice parameter close to that of the lower relaxed SiGe.

After the wafer 10 is bonded to the receiving substrate 5 in the strained relaxed layer 2B 'with or without the intermediate bond layer, the material may be removed using one or more of the above known techniques. .

In the first method of performing the material removal, it is desirable to maintain at least a portion of the relaxed strained layer 2A 'and the strained Si layer 2B', followed by the material removal being the same as described in Example 1 .

Finally obtained is a structure 20 (similar to that shown in FIG. 1D) comprising the receiving substrate 5 and the useful layer 6, wherein the useful layer 6 is a strained Si layer 2B ′ and At least a portion of the relaxed SiGe layer 2A 'and (optionally, the Si layer or the remaining portion of the support substrate 1 according to the removal method used).

In the second method of performing the removal process, it is desirable to maintain only at least a portion of the relaxed Si layer 2B ', followed by additional removal of the additional SiGe layer 2A'. However, it is the same as that described in Example 1.

For this purpose, it can be carried out using a solution for selective etching of SiGe to Si, such as a solution comprising HF: H ₂ O ₂ : CH ₃ COOH (selectivity about 1: 1000).

In the second method of performing the process, the relaxed SiGe layer 2A 'can be sacrificial.

This sacrifice of the relaxed SiGe layer 2A 'may be localized and parametrically deformed, appearing before bonding, near the interface with the transition layer 4 after transfer of perturbation in the transition layer 4. Destroying structural defects, such as dislocations.

Thus, the relaxed SiGe layer 2A 'preserves the strained Si layer 2B' from possible structural defects resulting from the specific relaxation method used in the process according to the present invention.

Thus, this sacrificial technique is particularly suitable for obtaining a strained Si layer 2B 'which has almost no structural defects.

Finally obtained is a structure 20 (similar to that shown in FIG. 1D) comprising the receiving substrate 5 and the useful layer 6, wherein the useful layer 6 is a modified Si layer 2B ′. It is composed.

Example 3: Reference is made to FIG. 3. This embodiment relates to the same wafer 10 as that of Example 2, and further includes a strained SiGe layer on the relaxed Si layer.

The strained layer 2 is composed of a strained SiGe layer 2A, a relaxed Si layer 2B, and a strained SiGe layer 2C.

The strained layer 2 has a thickness smaller than the critical thickness of the SiGe of interest, above which the SiGe is relaxed.

The strained layer 2A has the same characteristics as the strained SiGe layer 2 of the first embodiment.

The thickness of layer 2A will preferably be chosen to be at or above a typical thickness where structural defects appearing near the interface with transition layer 4 after transmission of perturbation in transition layer 4 are likely to be limited to the interior. .

This strained SiGe layer 2A will preserve the strained SiGe layer 2C from any structural defects during the relaxation of the relaxed Si layer 2B and the strained layer 2.

Thus, this sacrificial technique would be particularly suitable for obtaining the Si layer 2B which eventually has few structural defects.

The relaxed Si layer 2B has a thickness that is much smaller than the thickness of the entire strained layer 2, and thus the strained layer 2 retains the overall deformed structural properties.

The relaxed Si layer 2B has a thickness of about several tens of nanometers.

The strained SiGe layer 2C has the same characteristics as the strained SiGe layer 2A.

However, preferably the strained SiGe layer 2C is thicker than the strained SiGe layer 2A.

The strained SiGe layer 2C represents the major part of the strained layer 2 in one particular situation.

Performing the removal process is the same as that in Example 2.

The additional advantages of the production of the transition layer 4 and of the same heat treatment as in Example 1 have the following effects.

Elastically relaxed the deformed layer 2A to form a relaxed strained layer 2A '(not shown).

Elastically deforming the relaxed layer 2B to form a modified relaxed layer 2B '(not shown). The latter has a lattice parameter close to that of the lower relaxed SiGe.

Elastically relaxed the deformed layer 2C to form a relaxed deformed layer 2C '(not shown).

After the wafer 10 is bonded to the receiving substrate 5 in the relaxed strained layer 2C ′ with or without the interlayer, the material may be removed using one or more of the above known techniques. have.

In the first method of performing the material removal, it is desirable to maintain at least a portion of the relaxed strained layer 2A 'and the strained Si layer 2B' and the relaxed SiGe layer 2C ', followed by Same as described in Example 1.

Finally obtained is a structure 20 (similar to that shown in FIG. 1D) comprising the receiving substrate 5 and the useful layer 6, wherein the useful layer 6 is a relaxed SiGe layer 2C ′, At least a portion of the strained Si layer 2B 'and the relaxed SiGe layer 2A' and (optionally the Si layer or the remaining portion of the support substrate 1 depending on the removal method used).

In the second method of performing the dematerialization, it is preferable to preserve only at least a portion of the modified Si layer 2B 'and the relaxed SiGe layer 2C', and then the dematerialization is carried out in the second of the dematerialization performance of Example 2. Same as the method.

Finally obtained is a structure 20 (similar to that shown in FIG. 1D) comprising the receiving substrate 5 and the useful layer 6, wherein the useful layer 6 is a strained Si layer 2B ′ and It consists of at least a portion of the relaxed SiGe layer 2C '.

In a third method of performing the process, it is desirable to retain at least a portion of the relaxed SiGe layer 2C '. Subsequently, the material removal is the same as described in the second method of the above execution, with the additional step of removing the modified Si layer 2B '.

For this purpose, selective etching of modified Si (2B ′) can be performed using a solution comprising at least one of the following compounds: KOH, NH ₄ OH (ammonium hydroxide), TMAH, EDP or HNO ₃ or a solution in combination with agents such as HNO ₃ , HNO ₂ , H ₂ O ₂ , HF, H ₂ SO ₄ , H ₂ SO ₂ , CH ₃ COOH and H ₂ O.

Since the relaxed SiGe layer 2C 'is an etch stop layer, in the end this method makes it possible to obtain a particularly uniform layer at a thickness with low surface roughness.

Therefore, it is possible to have a layer of very small thickness while maintaining good quality of the layer.

Finally obtained is a structure 20 (similar to that shown in FIG. 1D) comprising the receiving substrate 5 and the useful layer 6, wherein the useful layer 6 provides a relaxed SiGe layer 2C ′. Configure.

In one particular method of using structure 20, whatever structure 20 is obtained, the SiGe layers or strained to form epitaxial growth of a SiGe layer or a modified Si layer, or to form a multilayer structure. One or more epilayers may be grown on wafer 10, such as other epilayers in which a series of Si layers are alternately configured.

In the semiconductor layers shown in this document, other constituents such as carbon can be added here, with the carbon concentration in the layer of interest being 50% or less, or in particular 5% or less.

The invention is not limited to the modified SiGe layer 2 and the Si support substrate 1, but can be used using the process according to the invention (secondary, tertiary or quaternary type or higher order type). Of) also extends to other materials, such as III-V or II-VI.

In addition, the final structure obtained after removal is not limited to the structure of SGOI, SOI or Si / SGOI type.

The present invention relates to a method of forming a useful layer from a wafer, wherein the wafer comprises a strained layer and a substrate, respectively, selected from crystalline materials and is used in microelectronics, optical or optoelectronics.

Claims (39)

A process for forming a useful layer 6 from a wafer 10 for application in microelectronics, optics or optoelectronics, wherein the wafer 10 is strained with a support substrate 1 selected from a crystalline material, respectively. Layer 2, (a) forming a perturbation region 3 in the support substrate 1 which can form structural perturbation at a defined depth; (b) supplying energy to cause relaxation or pseudo-relaxation of the elastic strain in the strained layer 2; (c) removing a portion of the wafer 10 on the opposite side with respect to the relaxed strained layer 2 'such that the useful layer 6 becomes a remaining portion of the wafer 10. A step of forming the useful layer 6 from the wafer to be made. The method of claim 1, wherein the relaxation or relaxation of the strained layer 2 during step (b) occurs across the transition layer 4 separating the perturbation region 3 from the strained layer 2. A step of forming the useful layer 6 from the wafer to be used. Process according to claim 1, characterized in that the perturbation zone (3) is formed by implantation of atomic species. 3. Process according to claim 2, wherein the perturbation zone (3) is formed by implantation of atomic species. 5. Process according to claim 3 or 4 , wherein the atomic species to be injected comprise at least partially hydrogen or helium or a combination of hydrogen and helium . The useful layer from the wafer according to any one of claims 1 to 4 , wherein the energy supplied during step (b) further comprises thermal energy, which further helps to mitigate strain in the strained layer (2). (6) forming process. 5. The method of claim 1 , further comprising , prior to step (c), bonding the receiving substrate 5 to the wafer 10 on the side of the strained layer 2. 6. A step of forming the useful layer 6 from the wafer to be used. 8. Process according to claim 7, characterized by applying the bonding layer to at least one of the two surfaces to be joined before the bonding step. 9. The process according to claim 8, wherein the bonding layer is made of silica. 8. Process according to claim 7, further comprising performing a finishing step carried out on the surface of at least one of the two faces to be joined. 8. The process according to claim 7, further comprising a heat treatment to strengthen the bonds. The method according to any one of claims 1 to 4 , Before step (c), the formation of a weak region in the support substrate 1, Step (c) comprises supplying energy into the soft zone to remove the useful layer (6) from the donor wafer (10). 13. A process according to claim 12, wherein the weak region is formed by implantation of atomic species. 14. A process according to claim 13, wherein the atomic species to be implanted at least partially comprise hydrogen, or helium, or a combination of hydrogen and helium . Process according to claim 13, characterized in that the soft and perturbation zones (3) are located in the same place in the wafer (10). 16. The process according to claim 15, wherein the soft zone and the perturbation zone (3) are formed at the same time by the same means. 13. The process according to claim 12, wherein the soft zone is formed by porosification of the layer in the wafer (10). 5. Process according to any one of the preceding claims , wherein step (c) comprises chemical etching of at least a portion of the wafer (10) to be removed. 5. The method according to claim 1 , wherein step (c) comprises performing selective chemical etching of a portion of the support substrate 1 adjacent to the relaxed strained layer 2 ′, wherein said relaxed strain. Layer (2 ') forms a useful layer (6) from the wafer, characterized in that it forms a stop layer for such etching. The relaxed strained layer (2 ') according to any of the preceding claims, wherein the relaxed strained layer (2') comprises a chemical etch stop layer, and step (c) has been relaxed to remove the portion present on top of the stop layer. A process for forming a useful layer (6) from a wafer, comprising performing selective chemical etching of the strained layer (2 '). Process according to any of the preceding claims, wherein the useful layer (6) consists of at least a portion of the relaxed strained layer (2 '). 5. The wafer according to claim 1 , wherein the useful layer 6 consists of a relaxed strained layer 2 ′ and a portion of the support substrate 1 remaining after step (c). 6. Forming the useful layer 6 from the process. 23. The process according to claim 22, wherein the remaining layer of the support substrate (1) is deformed by the relaxed strained layer (2). 5. The process according to claim 1, comprising a finishing step carried out on the surface of the useful layer 6 after step (c). 6. . 5. The method according to claim 1 , wherein after step (c) comprises forming at least one layer on the useful layer 6. 6. fair. 25. The useful layer 6 according to claim 24, wherein at least one thin layer formed on the useful layer 6 has its lattice parameters modified by the relaxed strained layer 2 '. fair. The method of claim 1 , The support substrate 1 is made of silicon; Process for forming the useful layer 6 from the wafer, characterized in that the strained layer 2 consists of silicon-germanium. The method of claim 1 , The supporting substrate 1 is made of silicon, -The deforming layer 2, Some thickness of modified silicon-germanium (2A); A process for forming the useful layer (6) from a wafer, characterized in that it consists of a series of relaxed silicon (2B) of constant thickness. The method of claim 1 , The supporting substrate 1 is made of silicon, -The deforming layer 2, Some thickness of modified silicon-germanium (2A); Some thickness of relaxed silicon 2B; A process for forming a useful layer (6) from a wafer, characterized in that it consists of a series of strained silicon-germanium (2C) of constant thickness. The method of claim 28 or 29 , Step (c) comprises removal of a constant thickness of the strained silicon-germanium (2A) adjacent to the support substrate (1) and relaxed during step (a). Forming process. The method of claim 28 or 29 , Step (c) comprises removing the constant thickness of the relaxed relaxed silicon (2B) during the performance of step (b). delete The process according to any one of claims 1 to 4 , wherein the receiving substrate (5) is made of silicon or quartz. 5. The wafer of claim 1, wherein at least one of the layers used during the process further comprises carbon, wherein the carbon concentration in the at least one layer is less than or equal to 50%. 6. Forming the useful layer 6 from the process. 5. The method of claim 1, wherein at least one of the layers used during this process further comprises carbon, wherein the carbon concentration in the at least one layer is less than or equal to 5%. 6. Process of forming useful layer 6 from wafer. The wafer according to any one of claims 1 to 4, wherein the structure obtained after step (c) is a semiconductor-on-insulator structure, and the layer of semiconductor of the structure includes the formed useful layer. Forming the useful layer 6 from the process. As the wafer 10 used in the process for forming the useful layer 6, A support substrate 1 having a first lattice parameter and an entirely relaxed or temporary-relaxed layer 2 'having a second lattice parameter, comprising no buffer layer and further comprising a soft region. Wafer. 38. The wafer (10) according to claim 37, further comprising a perturbation zone (3) in the support substrate (1). 39. A structure comprising the wafer (10) of claim 37 or 38 and a receiving substrate (5) bonded to the wafer (10) .

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