KR100780764B1 - Method of fabrication recess gate in semiconductor device - Google Patents

Abstract

A method of forming a recess gate of a semiconductor device, wherein a step between a gap fill oxide layer and an active region occurs after the pad layer is removed, and a shadow effect occurs due to the protrusion of the gap fill oxide layer protruding toward the active region due to the clipping of the pad layer. A horn shaped residue occurs at the trench bottom sidewalls. In order to prevent the occurrence of the residue, a buffer film is formed of an SOG thin film or a photoresist film to reduce the step difference between the gap fill oxide film and the active region, the active region is exposed by etching, and a recess gate trench is formed. Since the generation of the horn-type residue generated at the trench lower sidewall edge during the recess gate etching is suppressed, the generation of leakage current is suppressed, thereby improving the yield and reliability of semiconductor device manufacturing.

Recessed gate, horn, shadowing effect, trench

Description

Method of fabrication recess gate in semiconductor device

1A to 1E are cross-sectional views illustrating a method of forming a recess gate of a semiconductor device according to the related art.

FIG. 2 is a SEM photograph showing a planarization process according to the prior art. FIG.

3 is a SEM photograph showing a trench profile after etching a recess gate according to the related art.

4A to 4F are cross-sectional views illustrating a method of forming a recess gate in a semiconductor device according to the present invention.

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<Explanation of symbols for the main parts of the drawings>

200: semiconductor substrate 201: active region

202: pad oxide film 203: pad nitride film

204 trench 205 sidewall oxide film

206: liner nitride film and liner oxide film

207: gap fill oxide film 207a: protrusion

209: buffer film 210: recess gate trench

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method of forming a reset gate of a semiconductor device in which generation of a horn-shaped residue generated at the edge of a trench during the recess gate etching is suppressed. It is about.

Recently, as the degree of integration of semiconductor devices has increased and design rules have sharply decreased, difficulty in securing stable operation of transistors has increased. For example, the trench trench in the shallow trench isolation (STI) region becomes deeper and the space between active regions decreases, making the STI gap fill increasingly difficult, and the channel length between the source and the drain decreasing, so that the short channel of the transistor proceeds rapidly. have. Due to such short channelization, punch through is seriously generated between the source and the drain of the transistor, and such punch through is recognized as a major cause of transistor device malfunction. In addition, the doping concentration of the substrate increases, and the increased doping concentration causes an increase in the electric field and the junction leakage current, so that it is not easy to secure sufficient data retention time in the case of memory devices such as DRAM. It became. In order to overcome this short channel effect, various methods have been studied to secure the channel length even though the design rule is reduced. In particular, there are many attempts to form a MOS transistor having a recessed gate as a structure that extends the channel length for a limited gate line width and recesses the semiconductor substrate under the gate to extend the channel length. It is done.

A method of forming a recess gate of a general semiconductor device will be described in brief. In order to implement a channel recessed in an active region of a semiconductor substrate having an active region defined by a trench isolation layer, the semiconductor substrate may be etched to a predetermined depth. Form. Next, a gate insulating film is formed over the entire surface, and a gate conductive film is formed over the entire surface to fill the trench. Next, a metal silicide film and an insulating capping film are sequentially formed on the gate conductive film, and a gate gate pattern is performed to form a recess gate stack.

In such a recess gate structure, the channel is formed along the profile of the trench, that is, along the bottom and sidewalls of the trench, so that the channel has an extended length longer than the line width of the recess gate stack. . Therefore, the effective channel length (L _eff ) is increased, the doping concentration and the electric field of the storage node area are reduced, thereby reducing the junction leakage current and consequently increasing the data retention time.

1A to 1E are cross-sectional views illustrating a method of forming a recess gate of a semiconductor device according to the related art.

First, referring to FIG. 1A, a pad oxide film 102 is deposited on an active region 101 of a semiconductor substrate 100, and a pad nitride film 103 is sequentially deposited thereon. After the patterning process is performed on the pad nitride layer 103, the patterned pad nitride layer 103 is etched using an etch mask, and the semiconductor substrate 100 is etched to a predetermined depth to form the device isolation layer trench 104. Form.

Then, the side wall oxide film 105 and the liner film 106 are sequentially formed on the inner wall of the device isolation film trench 104 to protect the inner wall of the device isolation film trench 104, and then the device isolation film trench 104 is formed. The gap fill oxide film 107 is buried in high density plasma (HDP) deposition so as to be sufficiently filled as shown in Fig. 1A.

Next, as shown in FIG. 1B, the gap fill oxide film 107 is planarized.

After the planarization, the pad nitride film 103 is removed as shown in FIG. 1C. In this case, it can be seen that the step between the gap fill oxide film 107 and the active region 101 is generated by the removal of the pad nitride film 103. In particular, the gap region of the gap fill oxide film 107 is caused by the clipping phenomenon of the pad nitride film 103. The protrusion 107a which slightly protrudes toward 101 remains.

Therefore, as shown in FIG. 1D, when the trench etching process is performed to form the recess gate, the etching rate of the active region 101 and the gap fill oxide film 107 due to the etching gas is different. As the 108 is formed, a horn-shaped residue 108a is generated toward the edge of the bottom side wall of the trench 108 that is covered by the protrusion 107a of the gap fill oxide film 107.

2 is a SEM photograph showing a planarization process according to the prior art. Referring to FIG. 2, the pad nitride film 103 is removed to generate a step between the gap fill oxide film 107 and the active region 101, and the clipping of the pad nitride film 103 causes the active area 101 to be formed in the gap fill oxide film 107. It can be seen that the protrusion 107a which slightly protrudes toward the side remains.

3 is a SEM photograph showing a trench profile after etching a recess gate according to the related art. Referring to FIG. 3, it can be seen that a horn-shaped residue 108a is generated toward the edge of the bottom of the active region 101.

This horn shaped residue 108a is affected by the clipping phenomenon in the device isolation film formation and the gap fill oxide film formation process. That is, when the clipping phenomenon of the pad nitride layer 103 becomes severe, the shadowing effect due to the gap fill oxide layer 107 increases during the recess gate etching, and the residue 108a remains large.

Residue 108a due to such a shadowing effect has a problem of causing leakage current.

SUMMARY OF THE INVENTION The present invention provides a leakage current by suppressing generation of a horn-type resistor generated at an edge of a recess gate trench during etching of a recess gate. It is to provide a method for forming a reset gate of a semiconductor device that can suppress the increase in yield and improve the reliability of the device.

According to another aspect of the present invention, there is provided a method of forming a recess gate in a semiconductor device, the method including: forming a pad film on an active region of a semiconductor substrate; Forming a device isolation layer trench by etching the semiconductor substrate using the pad layer as a mask; Filling a gapfill oxide layer in the device isolation trench; Planarizing the gapfill oxide film so that the pad film is exposed; Removing the pad layer; Forming a buffer film on the semiconductor substrate from which the pad film is removed; Etching the buffer layer and the gapfill oxide layer to expose an active region; And forming a recess gate trench on the semiconductor substrate in the active region.

In addition, the buffer film may be formed of an SOG thin film or a photoresist film.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below.

4A to 4F are cross-sectional views illustrating a method of forming a recess gate of a semiconductor device according to the present invention, and FIG. 5 is a trench profile after a recess gate is etched as in FIG. 4F in the method of forming a recess gate of FIG. 4. This is a SEM picture.

First, referring to FIG. 4A, a trench isolation layer is first formed to define the active region 201 of the semiconductor substrate 200.

To this end, a pad oxide film and a pad nitride film are deposited on the active region 201 of the semiconductor substrate 200 as a pad film. First, the pad oxide film 202 is deposited on the active region 201 of the semiconductor substrate 200, and the pad nitride film 203 is sequentially deposited thereon. After the patterning process is performed on the pad nitride layer 203, the pad oxide layer 203 is etched using the patterned pad nitride layer 203 as an etching mask to expose the device isolation region, and then the semiconductor substrate 200 is exposed to a predetermined depth. Etching to form an isolation layer trench 204 for the isolation layer.

Then, in order to protect the inner wall of the device isolation film trench 204, the side wall oxide film 205, the liner nitride film, and the liner oxide film 206 are sequentially formed on the inner wall of the trench, and then, as shown in FIG. 4A. As shown, a gap fill oxide film 207 is buried in the device isolation trench 204 by high density plasma (HDP) deposition to sufficiently fill the device isolation trench 204.

At this time, in order to secure a gap fill margin of the high density plasma deposition process, a clipping phenomenon occurs in a portion of the upper layer of the pad nitride film 203, so that the cross section of the pad nitride film 203 is not shown as shown in FIGS. 4A and 4B. It becomes trapezoidal shape whose width is narrower than the lower base.

Next, as shown in FIG. 4B, the gap fill oxide film 207 is planarized by CMP (Chemical Mechanical Polishing) polishing.

After planarizing the gap fill oxide film 207 by the CMP polishing, the pad nitride film 203 is removed by a strip process as shown in FIG. 4C.

At this time, the gap between the gap fill oxide film 207 and the active region 201 is generated by the removal of the pad nitride film 203. In particular, the gap between the gap fill oxide film 207 protrudes toward the active region 201 due to the clipping phenomenon of the pad nitride film 203. The protruding portion 207a is left.

A buffer layer 209 is first formed as shown in FIG. 4D to protect the active region 201 in the next etching step, which is a next process step. The buffer film 209 is formed by applying spin on glass (SOG) or photoresist.

If the entire surface is etched in the next process without forming the buffer layer 209, the active region 201 is damaged by etching, resulting in deterioration of device characteristics, and chemicals used in wet etching. Since the sidewall oxide film 205, the liner nitride film, and the liner oxide film 206 formed on the inner wall of the trench are also damaged, it is not preferable to proceed with the entire surface etching without forming the buffer film 209.

After the buffer layer 208 is formed, it is active by the front etch as shown in FIG. 4E to reduce the step difference between the gap fill oxide film 207 and the active region 201 and to remove the protrusion 207a of the gap fill oxide film 207. The buffer layer 208 and the gap fill oxide layer 207 are etched until the region is exposed.

The front side etching may be performed by general wet etching using chemical or dry etching using plasma.

The step between the gap fill oxide layer 207 and the active region 201 is now reduced, and the protrusion 207a that protrudes toward the active region 201 in the gap fill oxide layer 207 is removed by the clipping of the pad nitride layer 203. It became. As a result, no shadowing effect occurs and horn formation is prevented in the trench for the recess gate. Therefore, the recess gate trench 210 is etched now as shown in FIG. 4F. The horn-shaped residue is not formed on the bottom special wall of the recess gate trench 210.

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As described above, according to the method of forming the recess gate of the semiconductor device according to the present invention, after removing the pad film, the protrusion between the gap fill oxide film and the active region is reduced and the protrusion protruding toward the active area from the gap fill oxide film due to the clipping of the pad film. The shadow effect prevents the occurrence of a horn shaped residue on the lower sidewall of the trench for the recess gate. Therefore, the generation of leakage current is suppressed, thereby providing the advantage that the yield and reliability of semiconductor device manufacturing are improved.

Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the technical spirit of the present invention. Do.

Claims (3)

Forming a pad film over the active region of the semiconductor substrate; Forming a device isolation layer trench by etching the semiconductor substrate using the pad layer as a mask; Filling a gapfill oxide layer in the device isolation trench; Planarizing the gapfill oxide film to expose the pad film; Removing the pad layer; Forming a buffer film on the semiconductor substrate from which the pad film is removed; Etching the buffer layer and the gapfill oxide layer to expose an active region; And And forming a recess trench on the semiconductor substrate in the active region. The method of claim 1, wherein the buffer layer is formed of an SOG thin film. The method of claim 1, wherein the buffer film is formed of a photoresist film.

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