KR100771781B1 - Resistor embeded-type emi filter - Google Patents

Abstract

An embedded resistor-type EMI filter is provided to maintain the EMI filter of the high reliability in a humid and hot atmosphere by embedding a resistor, an inductor, and a capacitor in the EMI filter. An embedded resistor-type EMI(ElectroMagnetic Interference) filter includes a dielectric body, at least one inductance pattern(32), at least one resistor pattern(35), at least one inner ground pattern(33), and at least one capacitance pattern(34). Plural dielectric sheets are laminated on the dielectric body, on which an input electrode, an output electrode, and a ground electrode are formed. The inductance pattern is formed inside the dielectric body. The resistor pattern is series-coupled with the inductance pattern. The inner ground pattern is connected to the ground electrode. The capacitance pattern is formed inside the dielectric body and arranged to be close to the inner ground pattern such that a capacitive coupling is formed between the capacitance pattern and the ground pattern. One end of the capacitance pattern is connected to the output electrode. Both ends of the inductance pattern and the resistor pattern are coupled with the input and output electrodes, respectively.

Description

EMI filter with built-in resistor {RESISTOR EMBEDED-TYPE EMI FILTER}

1A and 1B are exploded perspective views and equivalent circuit diagrams of a conventional RC resonant filter.

2 is an external perspective view of an EMI filter according to a preferred embodiment of the present invention.

3A and 3B are an internal exploded perspective view and equivalent circuit diagram of an EMI filter according to a preferred embodiment of the present invention.

4 is an exploded perspective view of a symmetric inductance pattern embedded in an EMI filter according to an embodiment of the present invention.

5 is an external perspective view of an EMI filter according to another embodiment of the present invention.

6A and 6B are an internal exploded perspective view and equivalent circuit diagram of an EMI filter according to another embodiment of the present invention.

7 is a graph showing attenuation characteristics different from the frequency of an EMI filter according to an embodiment of the present invention.

<Code Description of Main Parts of Drawing>

21: dielectric body 32: inductance pattern

33: ground pattern 34: capacitance pattern

35: resistance pattern 36: via hole

27: input electrode 28: output electrode

29: ground electrode

The present invention relates to a filter used in a mobile communication device, and more particularly, to a filter in which a resistor (R), an inductor (L), and a capacitor (C) are embedded in a ceramic body at the same time.

As digital related devices such as mobile phones and information communication terminals become smaller and lighter, the trend toward miniaturization of electronic components is also accelerating. In addition, the demand for new characteristics and functions corresponding to high frequency and high speed circuits is increasing.

As a result, the demand for noise countermeasure parts that can effectively prevent electronic malfunctions such as clock harmonics generated in various electronic devices, and prevent countermeasures against device malfunction, radiation to the outside, and intrusion from the outside increases. have. In most mobile communication devices, high frequency EMI suppression filters are used to remove noise between components.

1A and 1B are an exploded perspective view and an equivalent circuit diagram of a RC combined EMI filter according to the prior art.

1A and 1B, the RC combined EMI filter includes a plurality of dielectric sheets 11a, 11b, and 11c in which a resistance pattern 12, a ground pattern 13, and a capacitance pattern 14 are formed, respectively. .

The resistance pattern 12 may be formed by printing nickel (Ni) on a chip surface in a thin film by an arbitrary method to form a resistance (R), and forming an insulating protective film with epoxy on the nickel layer to ensure product reliability. It is designed to be. Both ends 12a and 12b of the resistor are provided to the input and output ends of the signal, respectively.

The ground pattern 13 is formed in a wide rectangular shape to minimize the DC resistance.

One end of the capacitor pattern 14 is connected to the resistor, and capacitive coupling with the ground pattern 13 implements a capacitance value.

In the structure of such a filter, as shown in FIG. 1B, a resistor R is formed between an input terminal and an output terminal, and a capacitor C is connected in parallel with the resistor.

In the prior art, since a nickel alloy is formed on a chip surface by a thin film printing method to form a resistance, a high cost for thinning and a separate process for post plasticity are required, and thus manufacturing cost increases.

In addition, since the resistance electrode is exposed to the chip surface, there is a possibility of deterioration of characteristics due to moisture penetration through the defective part of the contact surface under a high temperature and high humidity climate environment.

Due to the characteristics of the RC resonant low pass filter, the waveform has a wider range of change than the LC resonant filter.

In order to solve the above problems, the present invention implements a high reliability product without deterioration of electrical characteristics according to the surrounding environment by embedding a resistor inside the ceramic body, and can adjust the resistance value for effective attenuation of low frequency noise levels. It is an object of the present invention to provide a low pass filter.

According to an aspect of the present invention, there is provided a dielectric body including a plurality of dielectric sheets stacked on at least one input electrode, an output electrode, and a ground electrode, at least one inductance pattern formed inside the dielectric body, At least one resistance pattern formed therein and connected in series with the inductance pattern, at least one internal ground pattern formed in the dielectric body and connected to the ground electrode, and formed in the dielectric body; And at least one capacitance pattern disposed adjacent to the internal ground pattern to cause capacitive coupling with the internal ground pattern, and one end of which is connected to the output electrode, and both ends of the inductance pattern and the resistance pattern series connection structure EMI with a resistor embedded, characterized in that connected to the input electrode and the output electrode, respectively Provide a foundation.

In the inductance pattern and the resistance pattern series connection structure, one end of the inductance may be connected to the input electrode, and one end of the resistance pattern may be connected to the output electrode.

Preferably, the inductance patterns have conductive patterns formed on different planes, and the conductive patterns formed on the different planes are electrically connected to each other through via holes.

The inductance pattern may be a spiral pattern and is preferably a symmetric inductance pattern.

It is preferable that the inductance pattern has a resistance value of less than 50 mA.

The inductance pattern, the internal ground pattern, and the capacitance pattern may be formed on different stacking surfaces, and the internal ground pattern and the capacitance pattern may be formed in parallel with each other.

The dielectric body may have four input electrodes and an output electrode. In this case, the EMI filter may include a first inductance pattern and a first resistor connected in series to one region, and a predetermined distance from the one region. And a first dielectric layer having a second inductance pattern and a second resistor connected in series, and a third inductance pattern and a third resistor positioned below the first dielectric layer and connected in series with one region to form the first dielectric layer. A second dielectric layer having a fourth inductance pattern and a fourth resistor connected in series spaced apart from each other by a predetermined interval, and between the first dielectric layer and the second dielectric layer, at least one internal ground electrode and each output electrode It may include a third dielectric layer having a plurality of capacitance patterns connected thereto.

The first and second dielectric layers may include a first dielectric sheet on which a portion of an inductance pattern is formed, a portion of an inductance pattern and a resistance of the inductance pattern connected through a via hole and a portion of the inductance pattern formed on the first dielectric sheet. And a second dielectric sheet to be formed.

Preferably, in the first dielectric layer, the first dielectric sheet is stacked on top of the second dielectric sheet, and in the second dielectric layer, the second dielectric sheet is stacked on top of the first dielectric sheet. Do.

The third dielectric layer may be formed by alternately stacking at least one dielectric sheet having an internal ground electrode and at least one dielectric sheet having a capacitance pattern.

Hereinafter, the present invention will be described in detail with reference to the drawings.

2 is a perspective view showing the external structure of the EMI filter according to the present invention. 3A and 3B are exploded perspective views and equivalent circuit diagrams showing the internal structure of the EMI filter according to the present invention.

Referring to FIG. 2, the EMI filter 20 of the present invention includes a dielectric body 21, an external ground electrode 29 formed on an outer surface of the dielectric body 21 and connected to ground, and the dielectric body ( And input and output electrodes 27 and 28 that are formed on the surface of the substrate 21 to input and output signals.

Referring to FIG. 3A, the EMI filter of the present invention includes a plurality of dielectric sheets 31a to 31e, an inductance pattern 32, a resistance pattern 35, an internal ground pattern 33, and a capacitance pattern 34 constituting a dielectric body. ).

The dielectric body of the present invention may be formed by forming the inductance pattern, the ground pattern, the capacitance pattern, and the like on the plurality of dielectric sheets, respectively, and stacking the same. The dielectric sheet may be manufactured using a ceramic slurry. Inductance components and capacitance components determined by the inductance pattern, the capacitance pattern, etc. are determined by the dielectric constant of the dielectric.

The inductance pattern 32 may be implemented in a straight line, meander line shape, or helical shape to have a predetermined length.

In the present embodiment, the inductance pattern 32 is formed in a spiral pattern on different dielectric sheets 31d and 31c in the dielectric body 31, and then electrically connected through the conductive via hole 36. Is implemented. In this case, the required inductance component can be realized through a smaller area, thereby reducing the size of the device. The generated inductance component may be calculated from the length of the inductance pattern 32, the dielectric constant of the dielectric body 31, and the like.

In this embodiment, a resistance pattern is formed separately from the inductance pattern. One end 32a of the inductance pattern 32 is connected to the input electrode 27 of the signal and provided as an input terminal of the signal, and the other end thereof is connected in series with the resistance pattern 35.

One end of the resistance pattern 35 is connected to the output electrode 28 and provided as an output end of the signal.

The inductance pattern 32 and the resistance pattern 35 may be formed by a thin film printing method on the dielectric sheet using a conductive paste. The conductive paste may be a mixture of conductive powder and glass components. As the conductive powder is preferably used in the RuO _2.

The resistance value of the conductive pattern to be printed may be adjusted by adjusting the mixing ratio of the conductive powder and the glass component. The inductance pattern or the resistance pattern may be determined according to the difference in the resistance value. That is, it is preferable that the inductance pattern 32 has a small electrical resistance component, and the resistance pattern 35 preferably has a predetermined resistance value.

For example, the inductance pattern 32 is preferably manufactured with a conductive paste so that a resistive component of less than about 50 mA.

In the present invention, the inductance pattern and the resistance pattern are formed separately by changing the resistance value of the conductive pattern as described above, and by implementing a structure connected in series, there is an advantage that the attenuation characteristic of the filter can be adjusted according to the resistance value of the resistance pattern. .

In addition, by forming the resistance pattern inside the dielectric body, it is possible to implement a high reliability product without deterioration of electrical characteristics under high temperature and high humidity environment.

The internal ground pattern 33 is connected to the ground electrode 29 formed outside. The internal ground pattern 33 and the capacitance pattern 34 below provide a capacitance component by capacitive coupling. In addition, the ground pattern 33 may spatially and electrically block the inductance pattern 32 and the capacitance pattern 34 to prevent unnecessary mutual interference between the inductance pattern and the resistance pattern and the capacitance patterns.

One end 34a of the capacitance pattern 34 is connected to the output electrode 28.

The capacitance pattern 34 generates a predetermined capacitance component through capacitive coupling between the internal ground patterns 33 adjacent to each other in parallel. The generated capacitance component is the area of the capacitance pattern 34 facing the internal ground pattern 33, the distance between the internal ground pattern 33 and the capacitance pattern 34, and the dielectric constant of the dielectric body 31. It can calculate through such.

Although one capacitance pattern is formed in the present embodiment, the capacitance pattern may be implemented in various ways as long as one end is connected to the output electrode and the capacitor is coupled to the ground pattern.

Preferably, a plurality of dielectric sheets on which the capacitance pattern is formed and dielectric sheets on which the ground pattern is formed may be alternately formed.

EMI filter according to a preferred embodiment of the present invention implemented as described above may be represented as shown in Figure 3b.

Referring to FIG. 3B, an inductor L and a resistor R are connected in series with an input terminal IN through which an electrical signal of a predetermined frequency and voltage is input, and an output terminal OUT through which the signal is output. A capacitor C is formed between OUT and ground GND to form an RLC resonant circuit.

That is, the inductor L and the resistor R connected in series between the input terminal IN and the output terminal OUT are connected, and the capacitor C connected in parallel with the resistor R and the inductor L is connected. Connected.

By such a circuit configuration, RL series resonance, LC parallel resonance, and RC parallel resonance circuits are implemented between the input stage and the output stage. The EMI filter implemented with such a plurality of resonant circuits has a plurality of resonant frequencies. In addition, since the resistance (R) value can be adjusted, insertion loss can be adjusted sensitively.

4 is an exploded perspective view of a symmetric inductance pattern embedded in an EMI filter according to an embodiment of the present invention.

Referring to FIG. 4, the symmetrical inductance pattern according to another embodiment of the present invention has one end 42a connected to the input terminal and connected in series to the inductance pattern 42 and the inductance pattern 42 having a symmetrical structure. 45a) includes a resistance pattern 45 connected to the output terminal.

The symmetrical inductance pattern 42 includes a plurality of looped lead portions and a connecting lead portion.

The loop-shaped lead portion is composed of a plurality of pairs of conductors symmetric with each other and forming a loop shape. Although the plurality of loops are different in size from each other, their center points are the same, and are formed at regular intervals from each other.

Each of the loops may be divided into a plurality of conductive lines symmetrical to each other based on an A line, which is an imaginary line, and the plurality of conductive lines maintain a constant distance in parallel to each other.

One end 42a of the loop lead wire formed on the outermost layer is connected to the input electrode 27 formed on the surface of the dielectric body, and the other end thereof is connected to the resistance pattern 45. One end 45a of the resistance pattern 45 is connected to an output electrode 28 formed on the dielectric body surface.

The plurality of loops are formed on the same plane or the other surface of the loop and constitute one inductance pattern formed by continuous conductors connected to the loop through the via hole 46. The inductance pattern Is symmetric about the virtual line A.

By constructing the filter in such a symmetric type inductance type, the magnetic flux generated by the current flowing through the inductor is coupled in a direction in which they are reinforced with each other, thereby having a high inductance and goodness.

5 is a perspective view showing an external structure of an EMI filter according to another embodiment of the present invention. 6A and 6B are exploded perspective views and equivalent circuit diagrams showing an internal structure of an EMI filter according to another embodiment of the present invention.

Referring to FIG. 5, an EMI filter 50 according to another embodiment of the present invention includes a dielectric body 51 and an external ground electrode 59 formed on an outer surface of the dielectric body 51 and connected to ground. And four pairs of input and output electrodes 57 and 58 formed on the surface of the dielectric body 51 to input and output signals.

Referring to Fig. 6A, the EMI filter of the present embodiment includes a plurality of dielectric sheets 61a to 61i, a plurality of inductance patterns 62-1 to 62-4, and a plurality of resistance patterns 65-1 to 65-4. ), A plurality of ground patterns 63-1 and 63-2, and a plurality of capacitance patterns 64-1 and 64-2.

The plurality of dielectric sheets are stacked to form a dielectric body.

Two inductance patterns 62-2 and 62-4 are formed on the dielectric sheet 61a at predetermined intervals. One end of each of the inductance patterns 62-2 and 62-4 is connected to different input terminals IN2 and IN4.

On the dielectric sheet 61b, a partial region of the inductance pattern connected through the inductance patterns 62-2 and 62-4 and the via holes 66-2 and 66-4 and a resistance pattern 65-2 connected in series with the inductance patterns 62-2 and 62-4. 65-4). One end of each of the resistance patterns 65-2 and 65-4 is connected to different output terminals OUT2 and OUT4.

Two inductance patterns 62-1 and 62-3 are formed on the dielectric sheet 61h at predetermined intervals. One end of each of the inductance patterns 62-1 and 62-3 is connected to different input terminals IN1 and IN3.

On the dielectric sheet 61g, a partial region of the inductance pattern connected through the inductance patterns 62-1 and 62-3 and the via holes 66-1 and 66-3 and a resistance pattern 65-1 connected in series with the inductance patterns 62-1 and 62-3. 65-3) is formed. One end of each of the resistance patterns 65-1 and 65-3 is connected to different output terminals OUT1 and OUT4.

As in the present embodiment, when the resistance pattern and the inductance pattern are implemented on different dielectric sheets, when the dielectric sheets are stacked to form a dielectric body, the dielectric sheets on which the resistance patterns are formed are further stacked inward. This is to prevent cracks that may occur in the dielectric body during lamination and firing.

Internal ground patterns 63-2 and 63-1 are formed on the dielectric sheets 61d and 61f so as to be connected to the external ground electrodes 59, and the respective output electrodes OUT1 are formed on the dielectric sheets 61c and 61e. To OUT4), a plurality of capacitance patterns 64-2 and 64-1 having one end connected thereto are formed, and the dielectric sheet having the internal ground pattern and the dielectric sheet having the capacitance pattern are alternately stacked.

The plurality of internal ground patterns electrically block the first and third inductance patterns and the second and fourth inductance patterns to minimize interference effects that may occur between the plurality of internal ground patterns.

In addition, in order to minimize mutual interference between adjacent inductance patterns, the first inductance pattern, the third inductance pattern, the second inductance pattern, and the fourth inductance pattern are formed on the same plane, but are spaced apart from each other by a predetermined interval.

Fig. 6B is an equivalent circuit of Fig. 6A.

6B has four input terminals and an output terminal, and a resistor R and an inductor L are connected in series between the input and output terminals, and a capacitor C is connected between the output terminal and ground GND. Structure.

7 illustrates attenuation characteristics according to a change in resistance value in the EMI filter with built-in resistor according to an embodiment of the present invention.

Referring to FIG. 7, it can be seen that as the resistance value increases from 50 kHz to 300 kHz, the characteristics of the primary resonance and the secondary resonance are apparent, and the resonance frequency is also changed.

In this way, by adjusting the resistance value it is possible to effectively attenuate the low-frequency noise components generated in the mobile communication terminal set.

In the conventional RC resonant circuit, it is difficult to implement a sensitive insertion loss characteristic because the slope of the attenuation curve is wide, but according to the present embodiment, the first and second resonance points are formed by simultaneously expressing the RC resonance and the LR parallel resonance. It is possible to realize sensitive insertion loss characteristics even in the low frequency region.

In addition, the present embodiment exhibits attenuation characteristics of 20 dB or more over a wide band of 600 MHz to 3000 MHz. In particular, the GSM band exhibits an attenuation of about 48.5 dB, which is about 24 dB improved compared to the conventional RC filter.

As such, the present invention is not limited by the above-described embodiment and the accompanying drawings. That is, an array of dielectric sheets on which conductive patterns are formed, capacitance patterns, ground patterns, and the like may be variously implemented. It is intended that the scope of the invention be defined by the appended claims, and that various forms of substitution, modification, and alteration are possible without departing from the spirit of the invention as set forth in the claims. Will be self-explanatory.

According to the present invention, a resistor, an inductor, and a capacitor are all included in the EMI filter to obtain an effective attenuation characteristic of a low frequency noise level, and a high reliability EMI filter without deterioration of electrical characteristics can be obtained even in a high temperature and high humidity environment.

Claims (14)

A dielectric body in which a plurality of dielectric sheets are stacked and at least one input electrode, an output electrode, and a ground electrode are formed on a surface thereof; At least one inductance pattern formed in the dielectric body; At least one resistance pattern formed in the dielectric body and connected in series with the inductance pattern; At least one internal ground pattern formed in the dielectric body and connected to the ground electrode; Is formed inside the dielectric body, disposed adjacent to the inner ground pattern to cause capacitive coupling with the inner ground pattern, and includes at least one capacitance pattern, one end is connected to the output electrode, And both ends of the inductance pattern and the resistance pattern series connection structure are connected to the input electrode and the output electrode, respectively. The method of claim 1, The inductance pattern and the resistance pattern series connection structure, One end of the inductance is connected to the input electrode, the resistance built-in EMI filter, characterized in that one end of the resistance pattern is connected to the output electrode. The method of claim 1, The inductance pattern has a conductive pattern is formed on a different plane, respectively, and the conductive embedded EMI filter, characterized in that the conductive patterns formed on the different plane are electrically connected to each other through via holes. The method of claim 1, The inductance pattern, EMI resistance built-in filter, characterized in that the spiral pattern. The method of claim 1, The inductance pattern, EMI resistance built-in filter, characterized in that the symmetric inductance pattern. The method of claim 1, The inductance pattern is, EMI filter with a built-in resistance, characterized in that the resistance value is less than 50Ω. The method of claim 1, And the inductance pattern, the internal ground pattern, and the capacitance pattern are formed on different stacked surfaces. The method of claim 1, And the internal ground pattern and the capacitance pattern are formed parallel to each other. The method according to any one of claims 1 to 8, The dielectric body, EMI filter with built-in resistance characterized in that it has four input electrodes and output electrodes. The method of claim 9, The resistance built-in EMI filter, A first dielectric layer formed with a first inductance pattern and a first resistor connected in series to one region, and spaced apart from the one region with a second inductance pattern and a second resistor connected in series; A third inductance pattern and a third resistor disposed under the first dielectric layer and connected in series to one region, and a fourth inductance pattern and a fourth resistor connected in series with a predetermined distance from the one region; 2 dielectric layers; And A third dielectric layer disposed between the first dielectric layer and the second dielectric layer, the third dielectric layer having at least one internal ground pattern and a plurality of capacitance patterns having one end connected to each of the output electrodes; filter. The method of claim 10, The first and second dielectric layers, A first dielectric sheet on which a portion of the inductance pattern is formed; And a second dielectric sheet having a resistance pattern and a partial region of an inductance pattern formed through the via hole and a portion of the inductance pattern formed on the first dielectric sheet. The method of claim 11, The first dielectric layer, EMI filter according to claim 1, wherein the first dielectric sheet is laminated on the second dielectric sheet. The method of claim 11, The second dielectric layer is, EMI filter according to claim 1, wherein the second dielectric sheet is stacked on top of the first dielectric sheet. The method of claim 10, The third dielectric layer is, At least one dielectric sheet having an internal ground pattern and at least one dielectric sheet having a capacitance pattern formed by alternately stacking the EMI filter.

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