KR100771598B1 - Method generating walsh code and generator therefor - Google Patents

Abstract

The present invention relates to a mobile communication system, and more particularly, to a Walsh code generation method and apparatus therefor. Such a Walsh code generation method according to the present invention comprises the steps of determining the minimum repetition interval length of the sequence corresponding to the index using the Walsh index; Obtaining a partial sequence (seed) corresponding to the minimum repetition length; Applying the partial sequence to a Walsh code generator; Shifting the applied partial sequence to generate a Walsh code.

Walsh Index, Walsh Code Seed

Description

Method generating walsh code and generator therefor}

1 illustrates a Walsh code generator according to the prior art.

2 is a flowchart illustrating a procedure for obtaining a Walsh code sequence seed in a minimum repetition interval according to the present invention.

3 is a block diagram illustrating a Walsh code generator in accordance with the present invention.

The present invention relates to a mobile communication system, and more particularly, to a Walsh code generation method and apparatus therefor.

In general, a large number of Walsh code generators are used in a communication system. A large Walsh code generator is implemented in complex hardware. In this case, if a simple Walsh code generator for a low Walsh index can be implemented, the complexity of the system can be reduced.

1 illustrates a Walsh code generator according to the prior art.

Referring to FIG. 1, the conventional Walsh code generator is composed of an N-bit binary counter 101, AND gates 102, and XOR gates 103.

When a clock is applied to the N-bit binary counter and a Walsh index is applied to the AND gates 102, a Walsh code sequence is output from the XOR gates 103.

As the Walsh code length increases, the number of AND gates and XOR gates and the number of bits in the binary counter increase, which increases the complexity of the system.

Accordingly, the present invention has been made in view of the above-mentioned problems of the prior art, and provides a method and apparatus for generating a Walsh code having a simple system implementation.

The present invention also provides a method for generating a Walsh code and a device therefor according to a minimum repetition period of the Walsh code.

According to an aspect of the present invention for achieving the above object, the Walsh code generation method using the Walsh index to determine the minimum length of the repeat interval of the sequence corresponding to the index; Obtaining a partial sequence (seed) corresponding to the minimum repetition length; Applying the partial sequence to a Walsh code generator; Shifting the applied partial sequence to generate a Walsh code.

Preferably, the first bit of the sequence corresponding to the Walsh index is set to 0, the first bit, a value in which the Walsh index is shifted right by the number of shift taps, and a 'AND' of 1. The partial sequence is obtained by excluding the operation values. The shift tap number is a number that increases from 0 to the maximum number of shift register taps required to generate a Walsh code corresponding to the Walsh index.

According to another feature of the present invention for achieving the above object, the minimum repetition interval length of the sequence corresponding to the index is determined using the Walsh index, and the partial sequence (seed) corresponding to the minimum repetition length is applied. At least one mux, each enabled, to multiplex this partial sequence; And at least one flip-flop for shifting the multiplexed partial sequence.

Preferably, the flip flop is implemented as a D flip flop.

Hereinafter, a configuration and an operation according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

Equation 1 shows a Hadamard matrix having a Walsh code length of 4.

=

=

)인 경우에는 1, 인덱스가 1인 경우에는 2, 인덱스가 2,3인 경우에는 4가 된다. 즉, 인덱스가 0인 경우에는 '0'이 계속 반복되고, 인덱스가 1인 경우에 는 '01'이 계속 반복되고, 인덱스가 2인 경우에는 '0011'이 인덱스가 3인 경우에는 '0110'이 각각 반복된다. In Equation 1, when the minimum repetition interval in each Walsh code is found, the index is 0 (

), 1 for an index of 1, 2 for an index of 1, and 4 for an index of 2, 3. That is, if the index is 0, '0' is repeated repeatedly, if the index is 1, '01' is repeated repeatedly, and if the index is 2, '0011' is '0110' if the index is 3 This is repeated for each.

As described above, the method for obtaining the minimum repetition interval according to the Walsh index uses the first algorithm.

This first algorithm is an example of the case where the Walsh code length MAX_WALSH_LEN is 64 and the Walsh index WALSH_INDEX is 2.

First algorithm

a. Walsh code length = 64, Walsh index = 2 (WALSH_LEN 64, WALSH_INDEX 2)

b. Sets the maximum number of shift register taps (MAXShiftTap) to their initial values (MAXShiftTap = 0).

c. The Walsh index is used to determine the required number of shift register taps.

c-1. While the Walsh index is shifted right by the maximum number of shift register taps, the initialized maximum number of shift register taps is increased by one.

c-2 determines the minimum repetition period, which is the number of shift register taps required when the index is shift written by the maximum number of shift registers.

For example, when Walsh index = 2, Walsh code length = 64, and the maximum number of shift register taps: 2 according to the first algorithm, the required number of shift register taps, that is, the minimum repetition period, is four.                     

The minimum repetition interval according to each Walsh index according to the first algorithm is shown in Table 1 below. At this time, the Walsh code length is equal to 64.

index Repetition interval 0 One One 2 2 ~ 3 4 4 ~ 7 8 8-15 16 16-31 32 32-63 64

2 is a flowchart illustrating a procedure for obtaining a Walsh code sequence seed in a minimum repetition interval according to the present invention.

For example, if the Walsh code length is 4 and the index is 1, using the first algorithm, the minimum repetition interval is 2, the maximum number of shift register taps is 1, and the required number of shift register taps is 2.

Intuitively, it can be seen that the Walsh sequence seed at the minimum repetition interval is '01'.

Where the maximum number of shift register tabs and the index are variables. This maximum shift register tap number is 1 obtained by the first algorithm, and the index is also 1 as the Walsh index when this tap number is obtained. 2 shows a process of obtaining a Walsh code sequence seed in a minimum repetition period.

Referring to FIG. 2, the index and the maximum number of shift register taps are first initialized to 1, and the variables i (the required number of shift register taps) and m (index of bits constituting the Walsh code) are initialized to 0. If i is smaller than the maximum number of shift register taps (S11), i is incremented by 1, and k (reference bit index tm for obtaining Walsh code seeds) is initialized to 0 (S12). )

을 구한다. 그리고, 1로부터 i만큼 쉬프트 라이트된 값이 증가된 k보다 큰 가를 다시 판단하여

을 구한다. 여기서,

는

으로부터 다음과 같이 구할 수 잇다. 즉,

에 의해서 구할 수 있다. It is determined whether the value shifted by 1 from i is larger than k (S13), and when it is large, m and k are each increased by 1,

Obtain Then, it is determined again whether the value shifted from 1 to i is larger than the increased k.

Obtain here,

Is

Can be obtained from In other words,

Can be obtained by

In addition, the S _idx is This value is obtained by shift writing the number of shift register taps required for the Walsh index. That is, S _idx may be expressed as W _index >> shiftTap.

In step S13, when the value shifted from 1 to i is not greater than k, the index is shifted by 1 to determine whether the value is smaller than the maximum number of shift register taps (S11).

If this value is smaller than the maximum number of shift register taps by shift-writing the index by 1, the processes of S12 to S14 are repeatedly performed to find the Walsh code sequence seed in the minimum repetition interval. However, if the value is not smaller than the maximum number of shift register taps by shift writing the index by 1, the process of obtaining the Walsh code seed in the minimum repetition interval is terminated.

는 다음 수학식 2와 같 다. That is, the Walsh code having an index of 3 in Equation 1

Is the same as Equation 2 below.

은 다음 수학식 3과 같이 표현될 수 있다. The first bit (MSB) of all Walsh codes is always zero. if so

May be expressed as Equation 3 below.

로, 이하 수학식 4와 같이 구할 수 있다. The second bit of the seed of the least repeating Walsh sequence, '1'

As shown in Equation 4 below.

는 XOR 연산, 'and(&)'는 AND 연산을 의미하며, S_idx는 수학식 5와 같다. here,

Denotes an XOR operation, 'and (&)' denotes an AND operation, and S _idx is represented by Equation 5.

S _idx = W _index >> shiftTap

Here, '>>' means shift right operation, and W _index means Walsh index. Equation 5 means that the shift write operation of the Walsh index by sihftTap. ShiftTap operates in the range of Equation 6.

0 ≤shiftTap ≤MaxShiftTap-1

The MaxShiftTap is a value obtained from the first algorithm, and becomes 1 so that Equation 6 is expressed as Equation 7.

0 ≤shiftTap ≤0

은 상기 도 2를 통해

임을 알 수 있고, 결국

= 1임을 알 수 있다. That is, shiftTap becomes 0 and S _idx becomes 1.

Through the above Figure 2

I can see that, after all

It can be seen that = 1.

As confirmed above, the Walsh code is affected by the Walsh index.

By using the correlation between the Walsh code and the Walsh index, a simple Walsh code generator can be implemented for the low Walsh index.

That is, after finding the minimum repetition section of the Walsh code in which the same pattern is continuously repeated, the hardware complexity can be reduced by repeating the minimum repetition section as it is.

The following is an execution result according to the procedures of FIGS. 1 and 2 for a Walsh index of 2 and Walsh code lengths of 64, 128, 256, and 512. FIG.

That is, if the Walsh index is 2, the Walsh code length is 64, and the required shift register is 4, the minimum repetition interval is 0011.                     

If the Walsh index is 2, the Walsh code length is 128 and the required shift register is 4, the minimum repetition interval is 0011.

If the Walsh index is 2, the Walsh code length is 256 and the required shift register is 4, then the minimum iteration is 0011.

If the Walsh index is 2, the Walsh code length is 512, and the required shift register is 4, the minimum repetition interval is 0011.

As can be seen from above, for the same Walsh index, even if the Walsh code length increases, the minimum repetition interval and the number of required shift registers are the same. Therefore, if the small Walsh index is used for the Walsh code, the number of shift registers required can be reduced.

3 is a block diagram illustrating a Walsh code generator in accordance with the present invention.

Referring to FIG. 3, the Walsh code generator consists of D flip flops and muxes.

Thus, when the Walsh code generator is initialized (when a clock is applied to the D flip flocs and the mux is load enabled), the Walsh code in the minimum repetition interval according to the Walsh index obtained according to FIGS. 1 and 2 above. Seed is applied to the muxes.

In this case, the Walsh code seed is input with a Walsh code for a minimum repetition interval in the first algorithm.

Once the Walsh code seed is input, the muxes are disabled, the D flip-flops operate as shift registers, and a Walsh code sequence is output from the last D flip-flop.

As described above, the present invention is simple, unlike the conventional Walsh code generator, which increases the complexity of the system by increasing the number of AND gates and XOR gates and the number of bits of the binary counter as the Walsh code length increases even for a low Walsh index. You can implement a Walsh code generator to reduce system complexity.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

Claims (5)

Determining a minimum repetition interval length of a sequence corresponding to the corresponding index using the Walsh index; Obtaining a partial sequence (seed) corresponding to the minimum repetition length; Applying the partial sequence to a Walsh code generator; And generating a Walsh code by shifting the applied partial sequence. The method according to claim 1, wherein the first bit of the sequence corresponding to the Walsh index is set to 0, the first bit, a value in which the Walsh index is shifted right by the number of shift taps, and a 'end' of 1. And) the partial sequence is obtained by exclusively adding the AND) 'operation value. The Walsh code generation method of claim 2, wherein the shift tap number is a number that increases from 0 to a maximum shift register tap number required to generate a Walsh code corresponding to the Walsh index. The minimum repetition interval length of the sequence corresponding to the index is determined by using the Walsh index, and when a partial sequence (seed) corresponding to the minimum repetition length is applied, each of the at least one of multiplexing the partial sequence is enabled. Mux; And at least one flip-flop for shifting the multiplexed partial sequence. 5. The Walsh code generator of claim 4, wherein the flip-flop is implemented as a D flip-flop.

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