KR100767367B1 - A liquid crystal display - Google Patents

Abstract

The liquid crystal display includes a plurality of data lines defining a pixel area, a plurality of gate lines, a data pad connected to one end of the data line, and a gate line, and a plurality of data pads in which data pads and gate pads are clustered. A first insulating substrate facing the first insulating substrate, the first insulating substrate having a dummy wiring formed in parallel with at least one of the sub and gate pad portions, the data line and the gate line, and crossing the other to define a dummy pixel region; A second insulating substrate on which a black matrix covering the dummy pixel region and a color filter formed in a region corresponding to the pixel region are formed; a pixel electrode and a common electrode respectively formed on the first insulating substrate and the second insulating substrate; And a data driving integrated circuit connected to the data line and supplying an image signal. A gate driving circuit including a gate driving integrated circuit connected to the data driving circuit and the gate line and supplying a scan signal, and electrically connected to the dummy wiring and supplying signals to the data driving circuit and the gate driving circuit at a predetermined timing; It includes an LCD controller.

Dummy pixel area, black matrix, driving integrated circuit, dummy wiring, LCD controller

Description

Liquid crystal display device {A LIQUID CRYSTAL DISPLAY}

1 is a plan view of a substrate of a liquid crystal display according to a first embodiment of the present invention;

FIG. 2 is a cross-sectional view taken along line II-II 'of FIG. 1,

3 is a plan view of a substrate of a liquid crystal display according to a second exemplary embodiment of the present invention;

4 is a plan view of a substrate of a liquid crystal display according to a third exemplary embodiment of the present invention;

5 is a plan view of a substrate of a liquid crystal display according to a fourth exemplary embodiment of the present invention;

6 is a plan view of a substrate of a liquid crystal display according to a fifth exemplary embodiment of the present invention;

7 is a plan view of a substrate of a liquid crystal display according to a sixth exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display device.

In a liquid crystal display (LCD), an alignment layer is sequentially formed on an upper substrate on which a common electrode, a color filter, and the like are formed, and a lower substrate on which a thin film transistor and a pixel electrode are formed, respectively, between the alignment layers. Injecting liquid crystal into the liquid crystal and applying different potentials to the pixel electrode and the common electrode to form an electric field to change the arrangement of the liquid crystal molecules, thereby controlling the light transmittance through which the image is expressed.

In general, a manufacturing process of a liquid crystal display device includes a data wiring for applying a data signal on a glass substrate, a gate wiring for applying a scan signal, a thin film transistor serving as a pixel switch, a pixel electrode for applying an image voltage to a liquid crystal, and the like. A thin-film transistor array substrate manufacturing process for forming an image, a color filter of R (red), G (green), and B (blue) in which an image is driven, and a non-pixel region other than a display region for displaying an image in various colors. A color filter substrate manufacturing process for forming a matrix, an alignment process, a rubbing process for liquid crystal alignment, a liquid crystal cell process for encapsulating liquid crystals between spacers and opposing glass substrates, and a driver integrated circuit It is classified into the module process which performs the attachment, back light installation, etc. of this.

However, in such a liquid crystal display device and a method of manufacturing the same, foreign matter is present on the surface of the alignment film depending on the type of alignment film and the step of the alignment film formed on the thin film transistor array substrate and the color filter substrate. This foreign matter acts as a cause of the generation of ions, which results in an image defect in which one corner portion of the display area is brightly displayed when a dark color is displayed on the liquid crystal display.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a liquid crystal display having a structure for improving image defects.

In order to solve this problem, in the present invention, a dummy pixel region is formed in the non-pixel region under the black matrix in parallel with the gate line or the data line, and the dummy gate wiring or the dummy data wiring of the dummy pixel region is gated. It is connected to the dummy output terminal of the driving integrated circuit or the data driving circuit. Alternatively, the dummy data wiring in the dummy pixel region is directly connected to the output terminal of the dummy lead wire of the LCD controller.

According to the present invention, a liquid crystal display device includes a plurality of data lines, a plurality of gate lines crossing the plurality of data lines to define a pixel area, data pads and gate pads connected to one end of the data line and the gate line, respectively; A plurality of data pads, a plurality of gate pads in which gate pads are clustered, and dummy wirings that are in parallel with at least one of the data lines and the gate lines and cross the other to define a dummy pixel region are formed on the first insulating substrate. . On the second insulating substrate facing the first insulating substrate, a black matrix covering at least the dummy pixel region and a color filter formed in a region corresponding to the pixel region are formed. The pixel electrode and the common electrode are formed on the first insulating substrate and the second insulating substrate, respectively. The liquid crystal display includes a data driving circuit including a data driving integrated circuit connected to a data line and supplying an image signal, a gate driving circuit including a gate driving integrated circuit connected to a gate line and supplying a scan signal and a data driving. And an LCD controller which supplies a signal to the circuit and the gate driving circuit at a predetermined timing and is electrically connected to the dummy wiring.                     

In this case, the driving integrated circuit may be mounted in the tape carrier package or formed in the gate pad part and the data pad part, respectively.

In this case, the dummy wire is parallel to the data line and may be connected to the LCD controller through a dummy pin of the data driving integrated circuit.

Alternatively, the dummy wiring may be connected to the LCD controller through a conductive path formed in a tape carrier package in which a data driver integrated circuit is mounted in parallel with the data line.

The voltage controller may further include a voltage level shifter having an input terminal connected to the dummy lead wire of the LCD controller and an output terminal connected to the dummy wire.

Alternatively, the dummy wiring line is parallel to the data line, and a polarity reverse signal may be used as the common electrode signal.

In this case, the dummy wire may be parallel to the gate line and may be connected to the LCD controller through a dummy pin of the gate driving integrated circuit.

Alternatively, the dummy wire may be parallel to the gate line and connected to the gate driving circuit.

In this case, the dummy wiring includes a dummy wiring parallel to the gate line and a dummy wiring parallel to the data line, and the gate dummy wiring and the data dummy wiring are connected to the LCD controller through the dummy pin of the gate driving integrated circuit and the dummy pin of the data driving integrated circuit, respectively. Can be.

Then, the liquid crystal display device according to the exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings so that a person skilled in the art may easily implement the present invention.

First, a schematic structure of a liquid crystal display according to a first exemplary embodiment of the present invention will be described with reference to FIGS. 1 and 2.

1 is a plan view of a substrate of a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line II-II ′ of FIG. 1.

As shown in FIG. 1 and FIG. 2, the liquid crystal display according to the first exemplary embodiment of the present invention is formed around two substrates 10 and 12 facing each other and outside the display area 20, and the two substrates 10 are separated from each other. And a sealant 11 supporting 12 and confining a liquid crystal (not shown) injected between two substrates 10 and 12.

The upper substrate 10 is provided with a black matrix 22 (hatched portion) having an opening defining a display area 20 composed of a plurality of pixel sets and covering a non-pixel area other than the display area 20. Here, color filters (not shown) of R (red), G (green), and B (blue) are repeatedly formed in each pixel region 18 of the display region 20, and the black matrix 22 is It has a function of blocking unnecessary light outside the display area 20.

In the lower substrate 12 facing the upper substrate 10, a plurality of gate lines 14 for applying a scan signal are formed in a horizontal direction, and the pixel regions 18 are defined by crossing the gate lines 14. A plurality of data lines 16 are formed in the vertical direction for applying a data signal. In each pixel region 18, a thin film transistor (not shown) and a pixel electrode 19 are formed. Although not shown, the gate electrode of the thin film transistor is connected to the gate line 14, and the drain electrode is connected to the data line 16. In addition, the source electrode of the thin film transistor is connected to the pixel electrode 19 formed in the pixel region 18.

Outside the display area 20 of the lower substrate 12, a plurality of gate pad portions 28 and upper portions of the data lines 16, in which gate pads (not shown) connected to the left end of the gate line 14 are clustered. The data pads 30 (not shown) connected to the ends form a plurality of data pads 30, which are grouped together.

The gate driving circuit 32 and the data driving circuit 34 are disposed on the upper and left outer portions of the substrate 12, and the gate driving circuit 32 and the data driving circuit 34 include the driving integrated circuit 36 and Lead wires (not shown) connected thereto are electrically connected to the gate pad portion 28 and the data pad portion 30 by tape carrier packages (TCP) 38 mounted thereon. In this case, the driving integrated circuit 36 may be formed in the gate pad part 28 and the data pad part 30 of the thin film transistor array substrate 12, respectively. That is, the gate driving circuit 32, the data driving circuit 34, and the driving integrated circuit 36 may be formed on the same substrate 12. An FPC film 40 is formed between the gate driving circuit 32 and the data driving circuit 34, and between the lower substrate 12 and the gate driving circuit 32. The data drive circuit 34 is equipped with an LCD controller 42. The LCD controller 42 transfers the signals to the gate driving circuit 32 and the data driving circuit 34 respectively according to a predetermined timing. That is, a gate start signal and a timing signal are transmitted to the gate driving circuit 32 through the lead wire 44, and a predetermined clock signal 43 is transmitted to the data driving circuit 34 through the lead wire 43.

The common electrode 24 and the pixel electrode 19 are formed on the two substrates 10 and 12, respectively, and an alignment layer for arranging the molecules of the liquid crystal in a predetermined direction on the common electrode 24 and the pixel electrode 19. 26 are formed, respectively, and the liquid crystal (not shown) is inject | poured between these alignment films 26. As shown in FIG.

Here, foreign substances are present on the surfaces of the alignment layer 26 formed on the two substrates 10 and 12, respectively, and these foreign substances act as ions in the rubbing direction (arrow direction) of the alignment layer 26. They move and collect at the end of the orientation, and these ions cause the image to appear brightly at one corner when displaying a dark color. In order to solve this problem, the substrate of the liquid crystal display according to the exemplary embodiment of the present invention has a dummy pixel region parallel to the data line 16 and intersecting with the gate line 14 at the edge where the ions stop. Dummy data wirings 17 defining 23 are formed. Here, the dummy pixel region 23 is disposed in the non-pixel region under the black mattress 22. The thin film transistor and the pixel electrode are formed in the dummy pixel area 23 similarly to the pixel area of the display area 20. Here, the gate electrode of the thin film transistor is connected to the gate line 14, and the drain electrode is connected to the dummy data line 17. The source electrode is connected to the pixel electrode, and the liquid crystal cell is connected to the common electrode 24. In this case, the dummy data line 17 is connected to the dummy output terminal 45 ′ of the data driving integrated circuit 36. Here, the dummy output terminal 45 ′ of the data driving integrated circuit 36 is electrically connected to the lead wire 45 of the LCD controller 42. Here, a voltage capable of driving on and off is applied to the liquid crystal cell of the dummy pixel region 23.

As described above, in the first exemplary embodiment of the present invention, the dummy data wirings 17 defining the dummy pixel regions 23 are formed in parallel with the data lines 16, and the dummy wirings 17 are formed as the data driving integrated circuits. It is not connected to the data line output terminal of 36, but is connected to the dummy output terminal 45 'of the data driving integrated circuit 36 so that the image defective area 21 due to ions is moved to the non-pixel area under the black matrix 22. Can be induced.

Here, although the dummy data line 17 of the dummy pixel region 23 outputs a dummy signal through the dummy output terminal 45 'of the data driving integrated circuit 36, the dummy signal line 17 may transmit the dummy signal without passing through the dummy output terminal 45'. It may be.

The substrate structure of the liquid crystal display according to the second and third embodiments of the present invention will be described with reference to FIGS. 3 and 4.

First, the substrate structure of the liquid crystal display according to the second exemplary embodiment of the present invention will be described with reference to FIG. 3.

3 is a plan view of a substrate of a liquid crystal display according to a second exemplary embodiment of the present invention.

The substrate structure of the liquid crystal display according to the second embodiment of the present invention is also substantially the same as that of the first embodiment. However, the gate electrode of the dummy pixel region 23 is connected to the gate line 14, and the drain electrode is connected to the dummy data line 17. At this time, the dummy data wire 17 is directly connected to the output end 45 "of the lead wire 45 of the LCD controller 42 without passing through the dummy output end of the data driving integrated circuit 36. Here, the dummy output end 45 Is formed in the conductive path formed in the tape carrier package 38 on which the data driving integrated circuit 36 is mounted.

Also in the second embodiment of the present invention, as in the first embodiment of the present invention, the dummy data wiring 17 of the dummy pixel region 23 is directly connected to the output terminal 45 " of the lead wire 45 of the LCD controller 42. The image defect area 21 due to the ions may be connected to the non-pixel area under the black matrix 22 to cover it.

Next, the substrate structure of the liquid crystal display according to the third exemplary embodiment of the present invention will be described with reference to FIG. 4.

4 is a plan view of a substrate of a liquid crystal display according to a third exemplary embodiment of the present invention.

The substrate structure of the liquid crystal display according to the third embodiment of the present invention is also substantially the same as that of the first embodiment. However, the dummy data wiring 17 is connected to a voltage level shifter 47 through the dummy lead wire 45 of the LCD controller 42. That is, the output terminal 45 "of the voltage level shifter 47 is connected to the dummy data wire 17, and the input terminal of the voltage level shifter 47 is connected to the dummy lead wire 45 of the LCD controller 42. Here, the voltage level shifter 47 serves as a voltage distributor for arranging the output terminal voltage of the dummy lead wire 45 of the LCD controller 42 to a certain value, in which a separate external drive is performed in addition to the voltage level shifter 47. The circuit may be connected to the dummy data line 17 of the dummy pixel region 23.

In the third embodiment of the present invention, the voltage from the LCD controller 42, which is changed due to noise or the like, by using the voltage level shifter 47 or the like is arranged up to a predetermined value so that the dummy data wirings of the dummy pixel region 23 ( By applying a dummy signal to 17, the image defective area 21 due to the ions can be guided to the non-pixel area under the black matrix 22.

Here, the lead wire 45 of the LCD controller 42 is not connected to the dummy data line 17 of the dummy pixel region 23 via the dummy output terminal 45 'or the dummy output terminal 45' of the data driving integrated circuit 36. Although the dummy signal is directly connected to the output terminal 45 "or the voltage level shifter 47 is added, the dummy signal may be transmitted by applying a polarity inversion signal to the common electrode 24. The voltage of the common electrode 24 may be transferred. When the polarity is inverted together with the data gray scale voltage, the liquid crystal of the dummy pixel region 23 can be driven even at a low voltage of 5 V or less, which is a voltage causing the change in the light transmittance of the liquid crystal and the voltage of the pixel electrode 19. Since it is determined by the relative difference from the common electrode 24 on the opposite side, periodically inverting the voltage of the common electrode 24 together with the image signal can drive the liquid crystal of the dummy pixel region 23 even at a low voltage of 5 V or less. have This polarity inversion signal may use the LCD controller 42 or the voltage level shifter 47. Therefore, the polarity inversion signal is used for the common electrode 24 to drive the liquid crystal in the dummy pixel region 23 to the ions. Image defective area 21 can be led to a non-pixel area under the black matrix 22.

Here, the image defective area 21 is guided to the black matrix 22 using the dummy data line 17 of the dummy pixel area 23, but the image is obtained using the dummy gate line 15 of the dummy pixel area 23. The defective area 21 may be led to a non-pixel area under the black matrix 22.

Next, the substrate structure of the liquid crystal display will be described with reference to FIGS. 5 to 7.

First, the substrate structure of the liquid crystal display according to the fourth exemplary embodiment of the present invention will be described with reference to FIG. 5.

5 is a plan view of a substrate of a liquid crystal display according to a fourth exemplary embodiment of the present invention.

The substrate of the liquid crystal display according to the fourth embodiment of the present invention is also substantially the same as that of the first embodiment. However, the dummy gate wiring 15 defining the dummy pixel region 23 is formed in parallel with the gate line 14. The drain electrode of the dummy pixel region 23 is connected to the data line 16, and the gate electrode is connected to the dummy gate wiring 15. At this time, the dummy gate wiring 15 is connected to the dummy output terminal 49 'of the gate driving integrated circuit 36, and the dummy output terminal 49' of the gate driving integrated circuit 36 is a dummy of the LCD controller 42. It is connected to the lead wire 49.

Also in the fourth exemplary embodiment of the present invention, the dummy gate wiring 15 defining the dummy pixel region 23 is formed in parallel with the gate line 14 as in the first embodiment, and the dummy gate wiring 15 is It is not connected to the gate output terminal of the gate driving integrated circuit 36, but is connected to the dummy output terminal 49 ′ of the gate driving integrated circuit 36 so that the image defect area 21 caused by ions is disposed under the black matrix 22. To non-pixel regions.

Next, the substrate structure of the liquid crystal display according to the fifth exemplary embodiment of the present invention will be described with reference to FIG. 6.                     

6 is a plan view of a substrate of a liquid crystal display according to a fifth exemplary embodiment of the present invention.

The substrate structure of the liquid crystal display according to the fifth embodiment of the present invention is also substantially the same as that of the first embodiment. In the dummy pixel region 23, the drain electrode is connected to the data line 17 and the gate electrode is connected to the dummy gate line 15. In this case, the dummy gate wiring 15 is directly connected to the gate driving circuit 32 without passing through the gate driving integrated circuit 36. In this case, the gate driving circuit 32 applies an operating voltage to the gate electrode of the dummy pixel region 23 to keep the dummy pixel region 23 always on.

According to the fifth exemplary embodiment of the present invention, since the dummy gate wiring 15 of the dummy pixel region 23 is directly connected to the gate driving circuit 32, the dummy pixel region 23 is always kept on. do. Therefore, the image defective area 21 can be led to the non-pixel area under the black matrix 22.

Here, the image defective region 21 is guided to the non-pixel region under the black matrix 22 by using the dummy data wiring 17 or the dummy gate wiring 15 of the dummy pixel region 23. However, the image defective area 21 may be guided to the non-pixel area under the black matrix 22 by using the dummy data line 17 and the dummy gate line 15 of the dummy pixel area 23.

Next, the substrate structure of the liquid crystal display according to the sixth exemplary embodiment will be described with reference to FIG. 7.

7 is a plan view of a substrate of a liquid crystal display according to a sixth exemplary embodiment of the present invention.

The substrate structure of the liquid crystal display according to the sixth embodiment of the present invention is also substantially the same as that of the first embodiment. However, the dummy data wiring 17 and the dummy gate wiring 15 defining the dummy pixel region 23 are formed in the non-pixel region under the black matrix 22. At this time, the drain electrode and the gate electrode of the dummy pixel region 23 are connected to the dummy data line 17 and the dummy gate line 15. Here, the dummy data line 17 is connected to the dummy output terminal 45 ′ of the data driving integrated circuit 36, and the dummy gate line 15 is connected to the dummy output terminal 49 ′ of the gate driving integrated circuit 36. It is connected.

In the sixth exemplary embodiment of the present invention, the dummy data line 17 and the dummy gate line 15 of the dummy pixel region 23 have the dummy output terminal 45 of the gate and the data driving integrated circuit 36 as in the first embodiment. And '49' to guide the image defect area 21 to the non-pixel area under the black matrix 22.

As described above, according to the present invention, a dummy pixel area is formed in the non-pixel area under the black matrix in parallel with the gate line or the data line, and the dummy gate wire or the dummy data wire of the dummy pixel area is connected to the dummy output terminal of the driving integrated circuit. The image defective area is blacked by directly connecting the lead line of the LCD controller with the output terminal of the dummy gate wiring or the dummy data wiring through the conductive path formed in the tape carrier package in which the driving integrated circuit is mounted, without going through the dummy output of the driving integrated circuit. It can be guided and masked into the non-pixel region below the matrix. Therefore, the image quality of a liquid crystal display device can be improved.

Claims (10)

First insulating substrate, A plurality of data lines formed in the horizontal direction on the first insulating substrate, A plurality of gate lines formed on the first insulating substrate and crossing the data lines to define pixel regions; A data pad and a gate pad connected to one end of each of the data line and the gate line; A plurality of data pads and gate pads in which the data pads and the gate pads are clustered; A dummy wiring formed on the first insulating substrate and defining a dummy pixel area parallel to at least one of the data line and the gate line and crossing the other one; A second insulating substrate facing the first insulating substrate, A black matrix formed on the second insulating substrate and covering at least the dummy pixel region; A color filter formed in the second insulating substrate and formed in a region corresponding to the pixel region; A pixel electrode and a common electrode respectively formed on the first insulating substrate and the second insulating substrate; A data driving circuit connected to the data line and including a data driving integrated circuit for supplying an image signal; A gate driving circuit connected to the gate line and including a gate driving integrated circuit supplying a scan signal; An LCD controller which supplies a signal to the data driving circuit and the gate driving circuit at a predetermined timing and is electrically connected to the dummy wiring Liquid crystal display comprising a. In claim 1, And a drive integrated circuit mounted on the tape carrier package. In claim 1, And the driving integrated circuit is formed in the gate pad portion and the data pad portion, respectively. In claim 1, And the dummy wiring line is parallel to the data line and connected to the LCD controller through a dummy pin of the data driving integrated circuit. In claim 4, And the dummy wiring line is parallel to the data line and connected to the LCD controller through a conductive path formed in a tape carrier package in which the data driving integrated circuit is mounted. In claim 5, And a voltage level shifter having an input terminal connected to the dummy lead wire of the LCD controller and an output terminal connected to the dummy wire. In claim 6, And the dummy wiring is parallel to the data line and uses a polarity opposite signal as the common electrode signal. In claim 1, And the dummy wiring line is parallel to the gate line and is connected to the LCD controller through a dummy pin of the gate driving integrated circuit. In claim 1, And the dummy wiring line is parallel to the gate line and connected to the gate driving circuit. In claim 1, The dummy wiring includes a dummy wiring parallel to the gate line and a dummy wiring parallel to the data line, and the gate dummy wiring and the data dummy wiring respectively include a dummy pin of the gate driving integrated circuit and a dummy pin of the data driving integrated circuit. A liquid crystal display device connected to the LCD controller through the.

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