KR100761392B1 - Method of fabricating capacitor with hafnium - Google Patents
Method of fabricating capacitor with hafnium Download PDFInfo
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Abstract
본 발명은 반도체 소자의 캐패시터 제조방법에 관한 것으로 특히, HfO2를 캐패시터의 유전체로 사용하는 경우에, HfO2 유전체를 PECVD법과 LPCVD 법을 이용하여 2단계로 형성하여 공정시간을 단축한 발명이다. 이를 위한 본 발명은 기판상에 하부전극을 형성하는 단계; 상기 하부전극을 열처리하는 단계; 상기 하부전극 상에 PECVD법을 이용하여 제 1 HfO2 유전체를 형성하는 단계; 상기 제 1 HfO2 유전체 상에 LPCVD법을 이용하여 제 2 HfO2 유전체를 형성하는 단계; 상기 제 1 및 제 2 HfO2 유전체를 열처리하는 단계; 및 상기 제 2 HfO2 유전체 상에 상부전극을 형성하는 단계를 포함하여 이루어진다.
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device. In particular, when HfO 2 is used as the dielectric of a capacitor, the HfO 2 dielectric is formed in two steps using PECVD and LPCVD to reduce the process time. The present invention for this purpose is to form a lower electrode on the substrate; Heat-treating the lower electrode; Forming a first HfO 2 dielectric on the lower electrode by PECVD; Forming a second HfO 2 dielectric on the first HfO 2 dielectric by LPCVD; Heat treating the first and second HfO 2 dielectrics; And forming an upper electrode on the second HfO 2 dielectric.
캐패시터, 하프늄, 이산화하프늄, 화학기상증착법, 원자층증착법Capacitor, Hafnium, Hafnium Dioxide, Chemical Vapor Deposition, Atomic Layer Deposition
Description
도1a 내지 도1e는 본 발명의 일실시예에 따른 반도체 소자의 하프늄 캐패시터 제조방법을 도시한 공정순서도.
1A to 1E are process flowcharts illustrating a method of manufacturing a hafnium capacitor in a semiconductor device according to an embodiment of the present invention.
*도면의 주요부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *
11 : 기판11: substrate
12 : 하부전극12: lower electrode
13 : PECVD 법으로 형성된 이산화하프늄 유전체13: Hafnium Dioxide Dielectric Formed by PECVD
14 : LPCVD 법으로 형성된 이산화하프늄 유전체14: Hafnium Dioxide Dielectric Formed by LPCVD
15 : 이산화하프늄 유전체15: hafnium dioxide dielectric
16 : 상부전극
16: upper electrode
본 발명은 반도체 소자의 캐패시터 제조방법에 관한 것으로 특히, 이산화하프늄(이하, HfO2 라 한다)을 캐패시터의 유전체로 사용하는 경우에, PECVD 법으로 HfO2 막을 일부 증착하여 폴리실리콘 하부전극과 HfO2 막과의 계면특성을 향상시키고, 후속으로 LPCVD 법으로 HfO2 막을 증착하여 단차피복성(step coverage)를 향상시켜 캐패시터의 전기적인 특성향상과 공정시간(Throughput) 단축을 이룬 발명이다.The present invention relates to a capacitor manufacturing method of semiconductor devices in particular, dioxide, hafnium (hereinafter, HfO 2 quot;) for the case of using a dielectric material of a capacitor, HfO 2, the polysilicon lower electrode and HfO partially deposited film 2 by PECVD method The present invention is to improve the interfacial properties with the film, and subsequently to deposit step HfO 2 film by LPCVD method to improve the step coverage (impedance) to improve the electrical characteristics of the capacitor and to reduce the processing time (Throughput).
현재, 반도체 메모리 소자에 있어서 그 집적도는 계속 증가하고 있는 추세이며, 기가(giga) 비트급의 메모리 소자에 대한 연구도 활발히 이루어지고 있으며 256Mb 급 메모리는 점차로 상용화 되어가고 있다.At present, the degree of integration of semiconductor memory devices continues to increase, and studies on gigabit memory devices are being actively conducted, and 256Mb memory is gradually commercialized.
이와 같이 메모리 소자의 집적도가 높아짐에 따라 단위 셀의 면적도 점점 작아지게 되어 단위 셀을 구성하는 캐패시터의 면적도 더불어 감소하고 있다. 하지만 정보를 저장해야 하는 메모리 소자의 캐패시터는, 메모리 소자의 안정적인 동작이 보장되도록 일정정도 이상의 전하량을 저장할 수 있어야 한다.As the degree of integration of the memory device increases, the area of the unit cell is gradually reduced, and the area of the capacitor constituting the unit cell is also decreasing. However, a capacitor of a memory device that needs to store information should be able to store a certain amount of charge or more to ensure stable operation of the memory device.
미세화되는 캐패시터에서 종래와 같은 저장능력을 확보하기 위해서 캐패시터의 단면적을 증가시키거나 유전물질을 새로운 물질로 대체하려는 방법이 제안되고 있다. 캐패시터의 단면적을 증가시키는 방법으로 가장 가능성이 높은 방법은 캐패시터의 높이(height)를 높이는 방법이다. 하지만, 이 방법은 식각공정을 진행하기가 어렵기 때문에 아직까지 소자적용에 어려움이 있었다.In order to secure a storage capacity as in the conventional miniaturized capacitor, a method of increasing the cross-sectional area of the capacitor or replacing the dielectric material with a new material has been proposed. The most likely way to increase the cross-sectional area of the capacitor is to increase the height of the capacitor. However, since this method is difficult to proceed with the etching process, it has been difficult to apply the device so far.
또한, 현재 캐패시터의 유전물질로는 Ta2O5 막을 사용하고 있으나, Ta2O 5 막 은 열적 안정성과 유전상수가 적기때문에 정전용량을 확보하는데 어려움이 있었으며, 이에 대응하기 위해 최근 캐패시터의 유전물질로 HfO2 에 대한 연구가 활발히 이루어지고 있다.In addition, Ta 2 O 5 membrane is currently used as the dielectric material of the capacitor. However, Ta 2 O 5 membrane has difficulty in securing capacitance due to its low thermal stability and low dielectric constant. As a result, HfO 2 is being actively researched.
HfO2 막은 Ta2O5 막에 비해 유전상수도 크며, 열적 안정성 및 누설전류 특성이 우수하기 때문에 캐패시터 높이의 증가 없이도 정전용량을 확보할 수 있는 장점이 있다. 이러한 HfO2 막을 캐패시터의 유전체로 증착하는 방법으로, 종래에는 원자층 증착법(Atomic Layer Deposition : ALD)이 많이 사용되었다.The HfO 2 film has a larger dielectric constant than the Ta 2 O 5 film and has excellent thermal stability and leakage current characteristics, and thus has an advantage of ensuring capacitance without increasing a capacitor height. As a method of depositing such an HfO 2 film as a dielectric of a capacitor, conventional Atomic Layer Deposition (ALD) has been used.
ALD 법의 경우, 단차피복성(step coverage)이 좋고 박막 내에 불순물이 거의 존재하지 않기 때문에, 가장 좋은 증착방법 중의 하나이지만, 공정진행상의 시간이 많이 걸리기 때문에 쓰루풋(Throughput)에 관한 문제가 있었다. 여기서 쓰루풋(Throughput)이란, 한 공정의 시작에서 종료까지 완료되는 시간을 말하며, 이와같은 원자층 증착법을 이용하여 HfO2 막을 증착하는 경우에는 많은 시간이 소요되기 때문에 생산성이 감소하는 단점이 있었다.
The ALD method is one of the best deposition methods because the step coverage is good and there are few impurities in the thin film, but there is a problem regarding throughput because it takes a long time to process. Throughput refers to a time that is completed from the beginning to the end of a process, and when the HfO 2 film is deposited using such an atomic layer deposition method, it takes a lot of time, and thus there is a disadvantage in that productivity is reduced.
본 발명은 상기한 종래의 문제점을 해결하기 위한 것으로, PECVD 법과 LPCVD 법을 이용하여 HfO2 유전체를 형성함으로써 종래의 문제점을 해결한 캐패시터 제조방법을 제공함을 그 목적으로 한다.SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an object thereof is to provide a method for manufacturing a capacitor that solves the conventional problems by forming an HfO 2 dielectric using PECVD and LPCVD methods.
상기한 목적을 달성하기 위한 본 발명은, 기판상에 하부전극을 형성하는 단계; 상기 하부전극을 열처리하는 단계; 상기 하부전극 상에 PECVD법을 이용하여 제 1 HfO2 유전체를 형성하는 단계; 상기 제 1 HfO2 유전체 상에 LPCVD법을 이용하여 제 2 HfO2 유전체를 형성하는 단계; 상기 제 1 및 제 2 HfO2 유전체를 열처리하는 단계; 및 상기 제 2 HfO2 유전체 상에 상부전극을 형성하는 단계를 포함하여 이루어진다.The present invention for achieving the above object, forming a lower electrode on the substrate; Heat-treating the lower electrode; Forming a first HfO 2 dielectric on the lower electrode by PECVD; Forming a second HfO 2 dielectric on the first HfO 2 dielectric by LPCVD; Heat treating the first and second HfO 2 dielectrics; And forming an upper electrode on the second HfO 2 dielectric.
본 발명은 HfO2 막을 유전체로 하는 캐패시터 제조시에, 플라즈마 여기 화학기상증착법(Plasma Enhanced Chemical Vapor Deposition : PECVD)과 저압 화학기상증착법(Low Pressure Chemical Vapor Deposition : LPCVD)을 이용하여 2단계로 HfO2 유전체를 형성함으로써, 인접막간의 계면특성을 향상시키고 단차피복성을 향상시킴과 동시에 쓰루풋도 감소시킨 발명이다.
The invention HfO 2 film during the capacitor manufacturing a dielectric, plasma-enhanced chemical vapor deposition process (Plasma Enhanced Chemical Vapor Deposition: PECVD) and low pressure chemical vapor deposition method: using a (Low Pressure Chemical Vapor Deposition LPCVD) HfO 2 in two steps By forming a dielectric, the invention improves the interfacial properties between adjacent films, improves the step coverage, and reduces the throughput.
전술한 바와같이, 원자층 증착법을 이용하여 HfO2 유전체를 형성하는 방법은 종래에 많이 사용되어 왔던 방법이다. 원자층 증착법을 이용하여 형성된 HfO2 막은 단차피복성이 좋으며 또한 막 내에 불순물이 거의 존재하지 않은 장점이 있지만 공정진행상의 시간이 많이 걸리는 단점이 있다. As described above, the method of forming the HfO 2 dielectric using atomic layer deposition is a method that has been widely used in the past. HfO 2 film formed using atomic layer deposition method has the advantage of good step coverage and little impurities in the film, but it takes a long time in process progress.
이에 따라 본 발명에서는, 쓰루풋에 관한 문제점이 없는 PECVD 법과 LPCVD 법을 조합하여 사용함으로써 종래의 문제점을 해결하였다.Accordingly, in the present invention, the conventional problem is solved by using a combination of the PECVD method and the LPCVD method, which have no problems regarding throughput.
즉, 본 발명의 일실시예에서는 단차피복성은 불량하나 조밀한 막질을 얻을 수 있는 PECVD 법을 이용하여 HfO2 막을 일부두께 형성하고 다음으로 단차피복성이 좋은 LPCVD 법을 이용하여 나머지 HfO2 막을 형성함으로써 종래의 문제점을 해결하였다.That is, in one embodiment of the present invention, the HfO 2 film is partially formed by using a PECVD method, which is poor in step coverage, but has a dense film quality, and then the remaining HfO 2 film is formed by using a LPCVD method having good step coverage. This solves the conventional problem.
일반적으로 PECVD 법으로 형성된 HfO2 막은 LPCVD 법으로 형성된 HfO2 막 보다 막질이 더 조밀하기 때문에, 폴리실리콘과 HfO2 막의 계면 특성을 향상시켜 소자의 전기적인 특성을 향상시키지만 단차피복성이 불량한 단점이 있다. 따라서 이 같은 단점을 보완하기 위하여, 먼저 일정두께의 HfO2 막을 PECVD법으로 증착하고, 다음으로 상대적으로 단차피복성이 양호한 LPCVD 법으로 나머지 HfO2 막을 증착하여 계면특성과 단차피복성이 우수한 HfO2 막을 얻는다. LPCVD 법과 PECVD 법은 모두 트루풋에 관한 문제가 없다.In general, the HfO 2 film formed by PECVD has a denser film quality than the HfO 2 film formed by the LPCVD method, thereby improving the interfacial properties of the polysilicon and HfO 2 films, thereby improving the electrical properties of the device, but having a disadvantage of poor step coverage. have. Therefore, in order to make up for this drawback, first, a HfO 2 film having a certain thickness is deposited by PECVD method, and then the remaining HfO 2 film is deposited by a LPCVD method having a relatively high step coverage and HfO 2 having excellent interfacial properties and step coverage. Get the act. Both LPCVD and PECVD have no problems with throughput.
이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부된 도면을 참조하여 설명한다.Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention.
도 1a 내지 도1e는 본 발명의 일실시예에 따른 HfO2 캐패시터 형성방법을 도시한 공정순서로서 이를 참조하여 본 발명의 일실시예를 설명하면 먼저, 도 1a 에 도시된 바와같이 반도체 기판(11) 상에 폴리실리콘 하부전극(12)을 형성한다. 폴리 실리콘 하부전극(12) 형성후, 폴리실리콘 하부전극(12) 표면의 자연산화막 또는 불순물을 제거하기 위한 세정공정이 수행되는데, 세정공정은 HF 또는 HF + NH4OH를 이용하여 수행된다. 1A to 1E illustrate a process sequence showing a HfO 2 capacitor forming method according to an embodiment of the present invention. Referring to the embodiment of the present invention with reference to this, first, as shown in FIG. The polysilicon
다음으로 산소분위기에서의 후속 고온 열공정에 하부전극인 폴리실리콘이 산화되는 것을 억제하기 위해, 도1a에 도시된 바와같은 RTN 처리 또는 NH3 플라즈마 처리가 수행되는데 그 처리공정은 다음과 같이 수행된다.Next, in order to suppress oxidation of the polysilicon as a lower electrode in a subsequent high temperature thermal process in an oxygen atmosphere, an RTN treatment or NH 3 plasma treatment as shown in FIG. 1A is performed, and the treatment process is performed as follows. .
먼저, RTN(Rapid Thermal Nitridation : 이하 RTN ) 처리는 NH3 가스를 사용하여 수행되며, 사용되는 NH3 가스의 양은 1 ∼ 20 slm 로 유지한다. 또한, 공정온도는 500 ∼ 800℃ 로 유지하며, 상압(Atmosphere Pressure)에서 60 내지 180초 정도 동안 어닐링(annealing)한다.First, RTN (Rapid Thermal Nitridation: less RTN) process is maintained at 1 ~ 20 slm amount of the NH 3 gas is performed by using the NH 3 gas, in use. In addition, the process temperature is maintained at 500 ~ 800 ℃, annealing (annealing) for about 60 to 180 seconds at atmospheric pressure (Atmosphere Pressure).
NH3 플라즈마 처리의 경우, 사용되는 NH3 가스의 양은 10 ∼ 1000 sccm 으로 하며, 플라즈마 여기를 위한 RF 파워는 50 ∼ 400 Watt 로 한다. 그리고 0.1 ∼ 2.0 torr 의 압력에서 30 ∼ 300 초 동안 NH3 플라즈마 처리가 수행된다.In the case of NH 3 plasma treatment, the amount of NH 3 gas used is 10 to 1000 sccm, and the RF power for plasma excitation is 50 to 400 Watts. And NH 3 plasma treatment is performed for 30 to 300 seconds at a pressure of 0.1 to 2.0 torr.
이와같이 하부전극 산화를 억제하기 위한 공정 수행된 이후에 도 1 b 에 도시된 바와같이 HfO2 막(13, 14)이 증착되는데, 본 발명에서는 PECVD 법과 LPCVD 법을 이용하여 HfO2 막이 차례로 증착된다.After the process for suppressing lower electrode oxidation is performed, as shown in FIG. 1B, HfO 2 films 13 and 14 are deposited. In the present invention, HfO 2 films are sequentially deposited by using PECVD and LPCVD methods.
PECVD 법과 LPCVD 법에서 사용되는 소스(source)로는 HfCl4, Hf(NO3)4, Hf(NCH2C2H5)4, Hf(OC2H5)4 등이 사용되며 먼저, PECVD 법을 이용하여 일정두께의 HfO2 막(13)을 증착하는 방법에 대해 설명한다.As a source used in PECVD and LPCVD, HfCl 4 , Hf (NO 3 ) 4 , Hf (NCH 2 C 2 H 5 ) 4 , Hf (OC 2 H 5 ) 4, etc. are used. The method of depositing the HfO 2 film 13 having a constant thickness by using the above-described method will be described.
먼저, 전술한 소스는 기화기에서 기화된 후 챔버로 유입되어 HfO2 막(13) 증착에 사용되며, 챔버내의 압력은 0.1 ∼ 10 torr 로 유지되고, 반도체 기판을 가열시키기 위한 서브히터(sub heater)의 온도는 200 ∼ 400℃ 로 유지한다. 플라즈마 여기를 위한 RF 파워는 50 ∼ 400 Watt 로 하며 이때, 서브 히터를 접지단으로 하고 샤워헤드(shower head)를 전극(electrode)으로 하여 RF 파워를 인가한다. 반응가스로는 O2 또는 N2O 가 사용되며 그 양은 10 ∼1000 sccm 으로 한다.First, the above-mentioned source is vaporized in the vaporizer and then introduced into the chamber to be used for depositing the HfO 2 film 13, and the pressure in the chamber is maintained at 0.1 to 10 torr, and a sub heater for heating the semiconductor substrate. The temperature of is maintained at 200 to 400 ° C. RF power for plasma excitation is 50 to 400 Watts, and RF power is applied using the sub heater as the ground terminal and the shower head as the electrode. As the reaction gas, O 2 or N 2 O is used and the amount is 10 to 1000 sccm.
다음으로, LPCVD 법으로 나머지 HfO2 막(14)을 증착하는 방법에 대해 설명하면, 전술한 소스를 기화기에서 기화시킨 후 다음과 같이 수행된다. 반응챔버 내의 압력은 0.1 ∼ 10 torr 로 유지되며, 서브 히터의 온도를 200 ∼ 400℃ 로 유지한다. 그리고 반응개스로 O2 또는 N2O 가 사용되며, 가스의 양은 10 ∼1000 sccm 으로 한다.Next, a method of depositing the remaining HfO 2 film 14 by the LPCVD method will be described as described above after vaporizing the aforementioned source in a vaporizer. The pressure in the reaction chamber is maintained at 0.1 to 10 torr, and the temperature of the sub heater is maintained at 200 to 400 ° C. And O 2 or N 2 O is used as the reaction gas, the amount of gas is 10 to 1000 sccm.
이와같이 PECVD 법과 LPCVD 법을 이용하여 차례로 HfO2 막(13, 14))을 형성한 이후에, HfO2 막(15)내에 존재하는 불순물 및 산소공핍을 제거하기 위한 열처리를 수행한다. 이를 도 1c 에 도시하였다. After the HfO 2 films 13 and 14 are sequentially formed by using the PECVD method and the LPCVD method as described above, a heat treatment for removing impurities and oxygen depletion present in the HfO 2 film 15 is performed. This is shown in Figure 1c.
도 1c 에 도시된 열처리는 200 ∼ 400℃ 의 온도범위와 0.1 ∼ 10 torr 의 압력에서 수행되며, O2 또는 N2O 가스에 플라즈마를 여기시켜 수행된다. 플라즈마를 여기시키기 위한 파워로는 50 ∼ 400 Watt의 R.F 파워를 사용한다.The heat treatment shown in FIG. 1C is performed at a temperature range of 200 to 400 ° C. and a pressure of 0.1 to 10 torr, and is performed by exciting plasma with O 2 or N 2 O gas. As the power for exciting the plasma, RF power of 50 to 400 Watts is used.
여기서, 도 1a 내지 도 1c에 도시된 공정은 인시츄(in-situ)공정으로 진행된다.Here, the process illustrated in FIGS. 1A to 1C proceeds as an in-situ process.
다음으로 도 1d 에 도시된 바와같은 고온 열처리가 수행되는데, 이는 HfO2 유전체(15)의 유전율을 향상시키기 위한 열처리이다. HfO2 유전체(15)의 유전율을 향상시키기 위한 열처리는 400 ∼ 800℃ 의 고온에서 5 ∼ 30 분 동안 O2 또는 N2O 를 이용한 퍼니스(furnace) 열처리로 수행된다. 또는, 이러한 퍼니스 열처리 대신에 RTN2O(Rapid Thermal N2O) 또는 RTO(Rapid Thermal Oxidation)를 실시하여 HfO2 유전체(15)의 유전율을 향상시킬 수도 있다.Next, a high temperature heat treatment as shown in FIG. 1D is performed, which is a heat treatment for improving the dielectric constant of the HfO 2 dielectric 15. The heat treatment to improve the dielectric constant of the HfO 2 dielectric 15 is carried out by furnace heat treatment using O 2 or N 2 O at a high temperature of 400 to 800 ° C. for 5 to 30 minutes. Alternatively, by performing such a heat treatment furnace instead of (Rapid Thermal N 2 O) or a RTO (Rapid Thermal Oxidation) 2 O in the RTN it may improve the dielectric constant of HfO 2 dielectric (15).
다음으로 도1e에 도시된 바와같이, HfO2 유전체(15) 상에 TiN 과 폴리실리콘을 이용한 상부전극(16)을 형성함으로써 캐패시터를 완성한다.Next, as shown in FIG. 1E, the capacitor is completed by forming the
본 발명에서는 PECVD 법과 LPCVD법을 이용하여 HfO2 막을 차례로 형성함으로써 종래에 원자층증착법에서 문제되던 쓰루풋 문제를 해결하였으며 또한, 단차피복성은 불량하나 계면특성을 향상시킬 수 있는 PECVD 법을 먼저 적용하여 일정두께의 HfO2 막을 형성하고, 단차피복성이 좋은 LPCVD 법을 나중에 적용하여 나머지 HfO2 막을 형성함으로써 계면특성이 향상되고 단차피복성이 좋은 HfO2 캐패시터를 형성하 였다. In the present invention, the HfO 2 film is formed by using the PECVD method and the LPCVD method in order to solve the throughput problem that is conventionally encountered in the atomic layer deposition method. Also, the step coverage is poor but the PECVD method is first applied to improve the interfacial properties. An HfO 2 film having a thickness was formed, and the LPCVD method with good step coverage was later applied to form the remaining HfO 2 film, thereby forming an HfO 2 capacitor having improved interfacial properties and good step coverage.
이상에서 설명한 바와 같이 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명이 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능함이 본 발명이 속하는 기술분야에서 통상의 지식을 가진자에게 있어 명백할 것이다.
As described above, the present invention is not limited to the above-described embodiments and the accompanying drawings, and the present invention may be variously substituted, modified, and changed without departing from the spirit of the present invention. It will be apparent to those of ordinary skill in the art.
본 발명을 HfO2 캐패시터의 제조방법에 적용하면, 쓰루풋의 저하없이 계면특성과 단차피복성이 향상된 캐패시터를 얻을 수 있는 효과가 있다.When the present invention is applied to the method for producing the HfO 2 capacitor, there is an effect that a capacitor having improved interfacial properties and step coverage can be obtained without lowering throughput.
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| KR20020002596A (en) * | 2000-06-30 | 2002-01-10 | 박종섭 | Method for manufactruing capacitor in semiconductor memory device |
| KR20020034520A (en) * | 2000-11-02 | 2002-05-09 | 윤종용 | Capacitor in semiconductor device and method for manufacturing thereof |
| KR20040059807A (en) * | 2002-12-30 | 2004-07-06 | 주식회사 하이닉스반도체 | Method for forming hafnium oxide layer in semiconductor device |
| US6835658B2 (en) | 2002-12-27 | 2004-12-28 | Hynix Semiconductor Inc. | Method of fabricating capacitor with hafnium |
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| KR20020034520A (en) * | 2000-11-02 | 2002-05-09 | 윤종용 | Capacitor in semiconductor device and method for manufacturing thereof |
| US6835658B2 (en) | 2002-12-27 | 2004-12-28 | Hynix Semiconductor Inc. | Method of fabricating capacitor with hafnium |
| KR20040059807A (en) * | 2002-12-30 | 2004-07-06 | 주식회사 하이닉스반도체 | Method for forming hafnium oxide layer in semiconductor device |
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