KR100759692B1 - Organic light emitting display device and method of manufacturing the same - Google Patents

Abstract

An organic light emitting display device and a manufacturing method thereof are provided to improve the electric characteristic and reliability of an organic light emitting device by preventing the variation of the electric characteristic of a transistor. An organic light emitting display device includes an insulating substrate(100), a semiconductor layer(102), a gate electrode(104), an interlayer insulating film(105), a source and drain electrode(106a,106b), a planarization film(107), a first electrode, an organic thin film layer(110), and a second electrode. The semiconductor layer(102) is formed on the insulating substrate(100), and includes a source and drain area(102a,102b). The gate electrode(104) is formed on the semiconductor layer(102), and is insulated from the semiconductor layer(102). The interlayer insulating film(105) is formed on the whole upper surface including the gate electrode(104), and has a contact hole to expose the source and drain area(102a,102b). The source and drain electrode(106a,106b) is connected with the source and drain area(102a,102b) through the contact hole. The planarization film(107) is formed on the whole upper surface including the source and drain electrode(106a,106b), and has a via hole to expose the source and drain electrode(106a,106b). The first electrode is connected with the source and drain electrode(106a,106b) through the via hole. The organic thin film layer(110) is formed on the first electrode. The second electrode is formed on the organic thin film layer(110). The interlayer insulating layer(105) has a double layer structure and includes a fluorocarbon film.

Description

Organic light emitting display device and method of manufacturing the same

1 is a cross-sectional view illustrating a conventional organic light emitting display device.

2 is a cross-sectional view for explaining an organic light emitting display device according to the present invention.

3A to 3F are cross-sectional views illustrating a method of manufacturing an organic light emitting display device according to the present invention.

<Explanation of symbols for main parts of the drawings>

10, 100: substrate 11, 101: buffer layer

12, 102: semiconductor layer

12a and 12b, 102a and 102b: source and drain regions

12c and 102c: channel region 13 and 103: gate insulating film

14 and 104: gate electrodes 15 and 105: interlayer insulating film

16a and 16b, 106a and 106b: source and drain electrodes

17, 107: planarization layer 18, 108: anode electrode

19, 109: pixel defining layers 20, 110: organic thin film layers

21, 111: cathode electrode 105a: carbon fluoride film

105b: silicon nitride film 105c: TEOS film

The present invention relates to an organic electroluminescent device and a method of manufacturing the same, and more particularly, to an organic electroluminescent device and a method of manufacturing the same so as to prevent the deterioration of the electrical characteristics of the device due to the penetration of impurities.

Organic light emitting devices are next-generation display devices with self-luminous characteristics.They are organic light emitting devices that have a viewing angle, contrast, response speed, and power consumption compared to liquid crystal display devices (LCDs). Has excellent properties.

The organic light emitting device is composed of an anode electrode, an organic thin film layer and a cathode electrode, and when a predetermined voltage is applied to the anode electrode and the cathode electrode, holes injected through the anode electrode and electrons injected through the cathode electrode are recombined in the light emitting layer. In this process, light is emitted by the energy difference generated by this process.

Such an organic light emitting display device has a passive matrix method in which a pixel is connected between a scan line and a signal line to form a pixel, and a thin film transistor in which an operation of each pixel serves as a switch. It may be configured in an active matrix manner controlled by a film transistor (TFT).

1 is a schematic cross-sectional view for describing a conventional organic light emitting display device including a thin film transistor.

The buffer layer 11 is formed on the substrate 10, and the semiconductor layer 12 including the source and drain regions 12a and 12b and the channel region 12c is formed on the buffer layer 11. The gate electrode 14 insulated from the semiconductor layer 12 by the gate insulating layer 13 is formed on the semiconductor layer 12, and the source and drain regions 12a and An interlayer insulating film 15 in which contact holes are formed to expose 12b) is formed. Source and drain electrodes 16a and 16b connected to the source and drain regions 12a and 12b are formed on the interlayer insulating layer 15, and the entire upper surface including the source and drain electrodes 16a and 16b. A planarization film 17 having via holes formed therein is formed to expose the source or drain electrodes 16a or 16b. On the planarization layer 17, the pixel defining layer 19 for exposing a predetermined portion of the anode electrode 18 to define an anode electrode 18 and a light emitting region connected to the source or drain electrode 16a or 16b through a via hole. ) Is formed, and the organic thin film layer 20 and the cathode electrode 21 are formed on the anode electrode 18.

In the conventional organic light emitting display device configured as described above, the interlayer insulating film 15 is formed of a silicon nitride film (SiNx) or a TEOS (Tetra Ethyl-Ortho Silicate) film. However, when the interlayer insulating film 15 is formed of a silicon nitride film (SiNx) or a TEOS film, impurities such as organic materials, inorganic materials, moisture, and the like generated in subsequent heat treatment processes penetrate into the active region of the semiconductor layer 12, and temperature and humidity In high use environments, the penetration of moisture changes the electrical characteristics of the transistors, reducing the reliability of the device.

SUMMARY OF THE INVENTION An object of the present invention is to provide an organic electroluminescent device and a method of manufacturing the same, in which impurities can be prevented from penetrating into the active region so that a change in electrical characteristics of the device can be prevented.

An organic electroluminescent device according to an aspect of the present invention for achieving the above object is an insulating substrate, a semiconductor layer formed on the insulating substrate and including a source and drain regions, formed on the semiconductor layer and the semiconductor layer and A gate electrode insulated, an interlayer insulating film formed on an entire upper surface including the gate electrode, and having a contact hole formed to expose the source and drain regions, a source and drain electrode connected to the source and drain regions through the contact hole, A planarization layer formed on the entire upper surface including the source and drain electrodes and formed with a via hole to expose the source or drain electrode, a first electrode connected to the source or drain electrode through the via hole, and formed on the first electrode An organic thin film layer, and a second electrode formed on the organic thin film layer, wherein the interlayer Film is formed by at least two-ply structure, and comprises a fluorinated carbon film.

According to another aspect of the present invention, there is provided a method of manufacturing an organic light emitting display device, the method including: forming a semiconductor layer including a source and a drain region on an insulating substrate, and an entire upper surface including the semiconductor layer; Forming a gate insulating film on the gate insulating film on the gate insulating film on the semiconductor layer; forming an interlayer insulating film including a carbon fluoride film on at least an entire upper surface including the gate electrode; Forming a contact hole in the interlayer insulating layer so that the source and drain regions are exposed; forming a source and drain electrode to be connected to the source and drain regions through the contact hole; After forming the planarization film on the entire upper surface including the source or drain electrode Forming a via hole in the planarization layer to form a first electrode to be connected to the source or drain electrode through the via hole; forming an organic thin film layer on the first electrode; Forming two electrodes.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided to those skilled in the art to fully understand the present invention, and may be modified in various forms, and the scope of the present invention is limited to the embodiments described below. no.

2 is a cross-sectional view for explaining an organic light emitting display device according to a preferred embodiment of the present invention.

A buffer layer 101 is formed on a substrate 100 made of a transparent or opaque insulator, and a semiconductor layer 102 including source and drain regions 102a and 102b and a channel region 102c is formed on the buffer layer 101. Is formed. A gate electrode 104 insulated from the semiconductor layer 102 is formed on the semiconductor layer 102 by the gate insulating layer 103, and the source and drain regions 102a and the upper surface of the semiconductor layer 102 are formed on the entire upper surface including the gate electrode 104. An interlayer insulating film 105 is formed in which contact holes are formed to expose 102b). Source and drain electrodes 106a and 106b connected to the source and drain regions 102a and 102b are formed on the interlayer insulating layer 105, and the entire upper surface including the source and drain electrodes 106a and 106b. The planarization film 107 is formed in the via hole so that the source or drain electrodes 106a or 106b are exposed. On the planarization layer 107, a pixel defining layer 109 for exposing a portion of the anode electrode 108 to define a light emitting region and an anode electrode 108 connected to the source or drain electrode 106a or 106b through a via hole. The organic thin film layer 110 and the cathode electrode 111 are formed on the anode electrode 108.

The interlayer insulating film 105 is formed in a multilayer structure of two or more layers and includes a fluorocarbon film. For example, as an example of the multilayer structure, as shown in the figure, the carbon fluoride film 105a, the silicon nitride film 105b, and the TEOS film 105c are sequentially formed, or the silicon nitride film 105b is formed. The carbon fluoride film 105a and the TEOS film 105c may be sequentially stacked. Alternatively, as an example of the two-layer structure, the fluorocarbon film 105a and the TEOS film 105c may be stacked.

Next, a method of manufacturing an organic light emitting display device according to an exemplary embodiment of the present invention configured as described above will be described with reference to FIGS. 3A to 3F.

Referring to FIG. 3A, a semiconductor layer 102 including source and drain regions 102a and 102b and a channel region 102c is formed on a substrate 100. The substrate 100 may be a substrate made of an opaque material in the case of a top emission structure, and may be a substrate made of a transparent material such as glass in the case of the bottom emission structure. At this time, in order to prevent damage of the substrate 100 due to heat and to prevent the diffusion of ions from the substrate 100 to the outside, the buffer layer 101 may be formed of a silicon oxide film (SiO ₂ ) or a silicon nitride film (SiNx) on the substrate 100. ) May be formed, and then the semiconductor layer 102 may be formed.

Referring to FIG. 3B, the gate insulating layer 103 is formed on the entire upper surface including the semiconductor layer 102. The gate electrode 104 is formed on the gate insulating layer 103 on the channel region 102c.

Referring to FIG. 3C, an interlayer insulating layer 105 is formed on the entire upper surface including the gate electrode 104. At this time, the interlayer insulating film 105 is formed in a multilayer structure having two or more layers, and is formed to include a fluorocarbon film. For example, as an example of the multilayer structure, as shown in the figure, after forming the carbon fluoride film 105a on the entire upper surface including the gate electrode 104, the silicon nitride film 105b on the carbon fluoride film 105a ) And the TEOS film 105c are sequentially formed, or in another embodiment, the silicon nitride film 105b is formed on the entire upper surface including the gate electrode 104 and then the carbon fluoride film 105a is formed on the silicon nitride film 105b. ) And the TEOS film 105c can be formed sequentially. Alternatively, as an example of the two-layer structure, the carbon fluoride film 105a may be formed on the entire upper surface including the gate electrode 104, and then the TEOS film 105c may be formed on the carbon fluoride film 105a.

The carbon fluoride film 105a may be formed of one selected from the group including Teflon (a liquid or solid fluorocarbon product name) and the like, and may be deposited at a low temperature due to the characteristics of the organic light emitting device. It can be formed to a thickness of 500 to 2000 GPa using a plasma deposition method or a coating method such as (PECVD), and the silicon nitride film 105b and the TEOS film 105c are 1500 to 2500 mm and a thickness of 2500 to 3500 GPa using a plasma deposition method. It can be formed in the thickness of.

Referring to FIG. 3D, the interlayer insulating layer 105 is patterned to form contact holes so that the semiconductor layers 102 of the source and drain regions 102a and 102b are exposed. The metal is deposited on the entire upper surface to fill the contact hole, and then patterned to form source and drain electrodes 106a and 106b connected to the source and drain regions 102a and 102b through the contact hole.

Referring to FIG. 3E, the planarization film 107 is formed on the entire upper surface including the source and drain electrodes 106a and 106b, and then the planarization film 107 is patterned to expose the source or drain electrodes 106a or 106b. Form via holes as much as possible. The electrode material is deposited on the entire upper surface to fill the via hole, and then patterned to form an anode electrode 108 connected to the source or drain electrode 106a or 106b through the via hole.

Referring to FIG. 3F, after forming the pixel defining layer 109 on the entire upper surface, the pixel defining layer 109 is patterned so that a predetermined portion of the anode electrode 108 is exposed to define the emission area. The organic thin film layer 110 is formed on the exposed anode electrode 108, and the cathode electrode 111 is formed on the organic thin film layer 110. The organic thin film layer 110 may be formed in a structure in which a hole transport layer, an organic light emitting layer, and an electron transport layer are stacked, or may further include a hole injection layer and an electron injection layer.

In the organic electroluminescent device of the present invention manufactured as described above, the interlayer insulating film 105 is formed in a multilayer structure including the carbon fluoride film 105a. The fluorocarbon film 105a is known to have a low dielectric constant, hard film quality, high chemical stability, and high water blocking effect ("Moisture absorption studies of Fluorocarbon films deposited from Pentafluoroethane and Octafluorocyclobutane plasmas", Ravindra V. Tanikella et. Al. ., Journal of Electronic Materials Vol. 31, No. 10, 2002, pp. 1096). Therefore, by forming the interlayer insulating film 105 having a multi-layered structure including the carbon fluoride film 105a, the parasitic capacitance is low, thereby reducing time delay, and impurities such as organic materials, inorganic materials, and moisture generated in the heat treatment process are reduced. Failure to penetrate 102 prevents a change in the electrical characteristics of the transistor. In addition, since the carbon fluoride film 105a can be easily formed at a low temperature by plasma deposition or a coating method, there is no change in electrical characteristics of the organic light emitting device, and excellent step coverage and gap fill characteristics are obtained. Therefore, high surface flatness can be obtained, and patterning can be performed by general photolithography and etching processes.

As described above, the preferred embodiment of the present invention has been disclosed through the detailed description and the drawings. The terms are used only for the purpose of describing the present invention and are not used to limit the scope of the present invention as defined in the meaning or claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

As described above, the present invention forms the interlayer insulating film in a multilayer structure including a fluorocarbon film. The fluorocarbon film with low dielectric constant, hard film quality, high chemical stability and high water blocking effect reduces signal delay to improve the electrical characteristics of the device, and prevents penetration of impurities such as organic, inorganic, and moisture. Electrical property changes are prevented. Therefore, electrical characteristics and reliability of the organic light emitting display device may be improved. In addition, it is possible to apply the existing process by using a carbon fluoride film that can be deposited at low temperatures, excellent layer covering and buried characteristics, and can be patterned by general photo and etching processes.

Claims (16)

Insulation board, A semiconductor layer formed on the insulating substrate and including a source and a drain region; A gate electrode formed on the semiconductor layer and insulated from the semiconductor layer, An interlayer insulating layer formed on the entire upper surface including the gate electrode and having contact holes formed to expose the source and drain regions; Source and drain electrodes connected to the source and drain regions through the contact hole; A planarization layer formed on the entire upper surface including the source and drain electrodes, and having a via hole exposed to expose the source or drain electrodes; A first electrode connected to the source or drain electrode through the via hole, An organic thin film layer formed on the first electrode, A second electrode formed on the organic thin film layer, And the interlayer insulating film is formed of at least a two-layer structure, and comprises an fluorocarbon film. The organic light emitting device of claim 1, further comprising a buffer layer formed between the insulating substrate and the semiconductor layer. The organic light emitting device of claim 1, wherein the gate electrode is insulated from the semiconductor layer by a gate insulating film. The organic light emitting device of claim 1, wherein the interlayer insulating film is formed by laminating the carbon fluoride film and the TEOS film. The organic light emitting device of claim 1, wherein the interlayer insulating film is formed by stacking the fluorocarbon film, silicon nitride film, and TEOS film. The organic light emitting device of claim 1, wherein the interlayer insulating film is formed by stacking a silicon nitride film, the fluorocarbon film, and a TEOS film. The organic electroluminescent device according to claim 1, wherein the carbon fluoride film is one selected from the group consisting of Teflon. Forming a semiconductor layer including a source and a drain region on an insulating substrate, Forming a gate insulating film on an entire top surface of the semiconductor layer; Forming a gate electrode on the gate insulating layer on the semiconductor layer; Forming an interlayer insulating film having at least a two-layer structure on the entire upper surface including the gate electrode and comprising a fluorocarbon film; Forming a contact hole in the interlayer insulating layer to expose the source and drain regions; Forming source and drain electrodes to be connected to the source and drain regions through the contact hole; Forming a via hole in the planarization layer to expose the source or drain electrode after forming the planarization layer on the entire upper surface including the source and drain electrodes; Forming a first electrode to be connected to the source or drain electrode through the via hole; Forming an organic thin film layer on the first electrode, Forming a second electrode on the organic thin film layer manufacturing method of an organic light emitting device. The method of claim 8, further comprising forming a buffer layer on the insulating substrate. The method of claim 8, wherein the forming of the interlayer insulating film comprises: forming the fluorocarbon film on an entire top surface of the gate electrode; Forming a TEOS film on the fluorocarbon film comprising a method of manufacturing an organic electroluminescent device. The method of claim 10, wherein the carbon fluoride film is formed by a plasma deposition method or a coating method, and the TEOS film is formed by a plasma deposition method. The method of claim 8, wherein the forming of the interlayer insulating film comprises: forming the fluorocarbon film on an entire top surface of the gate electrode; Forming a silicon nitride film on the carbon fluoride film; Forming a TEOS film on the silicon nitride film manufacturing method of an organic light emitting device. The method of claim 12, wherein the carbon fluoride film is formed by a plasma deposition method or a coating method, and the silicon nitride film and the TEOS film are formed by a plasma deposition method. The method of claim 8, wherein the forming of the interlayer dielectric layer comprises: forming a silicon nitride layer on an entire top surface of the gate electrode; Forming the carbon fluoride film on the silicon nitride film; A method of manufacturing an organic electroluminescent device comprising the step of forming the carbon fluoride film TEOS film. The method of claim 14, wherein the carbon fluoride film is formed by a plasma deposition method or a coating method, and the silicon nitride film and the TEOS film are formed by a plasma deposition method. The method of claim 8, wherein the carbon fluoride film is one selected from the group consisting of Teflon.

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