KR100759555B1 - Flat panel display apparatus and method of manufacturing the same apparatus - Google Patents

Abstract

According to the present invention, in the flat panel display device, the semiconductor active layer is formed in consideration of the characteristics required for each of the semiconductor active layers of the pixel region and the circuit region, thereby providing a high-speed response of the circuit region and accurate and uniform pixel representation of the pixel region. An object of the present invention is to provide a display device and a method of manufacturing the same.

In order to achieve the above object, the present invention is to control a signal formed on the substrate and a pixel region formed on the substrate, and having a semiconductor active layer including at least a channel region and a light emitting element and applied to the pixel region. And a circuit region having a semiconductor active layer including at least a channel region, wherein the semiconductor active layer of the pixel region comprises a silicon (Si) thin film, and the semiconductor active layer of the circuit region comprises a silicon germanium (SiGe) thin film. A flat panel display and a manufacturing method thereof are provided.

Description

Flat panel display apparatus and method of manufacturing the same apparatus

1 is a plan view schematically illustrating a planar structure of a flat panel display device.

FIG. 2 is a cross-sectional view schematically illustrating a cross section of semiconductor thin films on a substrate in a process of manufacturing a semiconductor active layer of part I-I of FIG. 1.

3 is a cross-sectional view showing a detailed cross-sectional structure of the portion I-I of FIG. 1 according to the first embodiment.

4A to 4D are cross-sectional views illustrating a process of manufacturing the semiconductor active layer of part I-I of FIG. 1 according to the first embodiment.

5 is a cross-sectional view showing a detailed cross-sectional structure of the portion I-I of FIG. 1 according to the second embodiment.

6A through 6C are cross-sectional views illustrating a process of manufacturing a semiconductor active layer in part I-I of FIG. 1 according to a second embodiment.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display device and a method for manufacturing the same, and more particularly, to a flat panel display device having a silicon (Si) based semiconductor active layer in a pixel region and a silicon germanium (SiGe) based semiconductor active layer in a circuit region. It is about.

Flat panel display devices, such as liquid crystal displays, organic light emitting displays, or inorganic light emitting displays, are passive matrix type passive matrix (PM) type and active matrix type active matrix (AM) type depending on the driving method. Are divided into types.

In the passive matrix type, the anode and the cathode are simply arranged in columns and rows, respectively, so that the cathode is supplied with a scanning signal from a row driving circuit, and only one of the plurality of rows is selected. In addition, a data signal is input to each pixel in the column driving circuit.

On the other hand, the active matrix type is a display device for realizing a video by controlling a signal input for each pixel by using a thin film transistor (hereinafter referred to as "TFT") It is used a lot as.

As described above, TFTs of an active matrix flat panel display have a semiconductor active layer having a source / drain region and a channel region formed between the source / drain regions and insulated from the semiconductor active layer and positioned in a region corresponding to the channel region. And a gate electrode and a source / drain electrode in contact with the source / drain regions, respectively.

The semiconductor active layer is widely used as amorphous silicon or polycrystalline silicon, but amorphous silicon has an advantage of being capable of low temperature deposition, but electrical properties and reliability are deteriorated, and research on polycrystalline silicon has been actively conducted in recent years. Polycrystalline silicon has a high current mobility of several tens to hundreds of cm 2 /V.s, and is suitable for use in flat panel displays and the like because of its high frequency operating characteristics and low leakage current.

On the other hand, a flat panel display device can be largely divided into a circuit region and a pixel region. In general, a semiconductor active layer of a circuit region should have high channel mobility because a fast response should be possible, while a semiconductor active layer of a pixel region is accurate and uniform. Since one pixel representation is important, it is common to have lower channel mobility than circuit area. However, in the conventional flat panel display device, the semiconductor active layer in the circuit region and the semiconductor active layer in the pixel region may be implemented by any one type of semiconductor thin film such as a silicon (Si) thin film or a silicon germanium (SiGe) thin film, or the semiconductor active layer in the circuit region may be separately provided. By fabricating and using the substrate on the substrate, there is a problem in that the characteristics of the circuit region and the pixel region cannot be appropriately implemented on the same substrate.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the prior art, and an object of the present invention is to integrate a pixel region and a circuit region on the same substrate at the same time, while considering the characteristics of the semiconductor active layer of each region, The active layer is formed of a silicon (Si) thin film, but the semiconductor active layer in the circuit region is manufactured using a silicon germanium (SiGe) thin film having high channel mobility, thereby making it thin and light, and suitable for the characteristics required in the semiconductor active layer in each region. A display device and a method of manufacturing the same are provided.

In order to achieve the above object, the present invention provides a pixel region formed on a substrate, having a semiconductor active layer including a light emitting element and at least a channel region, and controlling a signal formed on the substrate and applied to the pixel region. A circuit region having a semiconductor active layer including at least a channel region, wherein the semiconductor active layer of the pixel region comprises a silicon (Si) thin film, and the semiconductor active layer of the circuit region comprises a silicon germanium (SiGe) thin film. A flat panel display is provided.

The present invention also provides a method for forming a first region including a silicon (Si) thin film on a substrate, and forming a second region including a silicon germanium (SiGe) thin film on the substrate. And forming the semiconductor active layers by patterning the first region and the second region.

The SiGe thin film may be formed on the same layer or a different layer from the Si thin film.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention.

FIG. 1 is a plan view schematically illustrating a planar structure of a flat panel display, and schematically illustrates a pixel region 10 and a circuit region 20 formed on a substrate 100. In the pixel region 10, a plurality of subpixels (not shown) having an organic light emitting diode (not shown) and a selection driving circuit are disposed.

In the circuit area 20, a horizontal driver and / or a vertical driver for driving the subpixels are disposed. In FIG. 1, only the vertical driver VD is illustrated in the circuit area 20, but the present disclosure is not limited thereto, and a plurality of circuits such as a horizontal driver or a controller may be disposed. In addition, a terminal portion (not shown) connected to an external circuit and a sealing portion (not shown) for sealing at least the pixel region 10 are disposed in the circuit region 20.

FIG. 2 is a schematic cross-sectional view of a semiconductor thin film on a substrate for fabricating a semiconductor active layer according to a first embodiment of the section II of FIG. 1, wherein the silicon thin film 30 and the silicon on the substrate 100 are formed. It is shown schematically that a silicon germanium (SiGe) thin film 30a is formed on a portion of the (Si) thin film 30. The portion (first region) in which only the silicon thin film exists is subjected to a process such as patterning to become a semiconductor active layer of the pixel region 10 of FIG. 1, and the double layer portion (second region) of the silicon thin film and the silicon germanium thin film is After the process such as patterning, the semiconductor active layer of the circuit region 20 of FIG. That is, the portion (first region) to be the semiconductor active layer of the pixel region and the portion (second region) to be the semiconductor active layer of the circuit region are formed together on the same substrate 100.

Although silicon and silicon germanium semiconductors are exemplified above, the present invention is not limited thereto, and the first region and the second region may be formed using other semiconductors having different channel mobility, which are suitable for the characteristics of the semiconductor active layer of the pixel region and the circuit region. Of course it can form.

3 is a cross-sectional view showing in detail a portion in which a semiconductor active layer exists, that is, a portion in which TFTs are located, in the section II of FIG. 1 according to the first embodiment, wherein a driving TFT 11 of a selection driving circuit in each unit pixel is shown. ), The switching TFT 12 is shown, and the CMOS TFT 21 of the vertical driver is shown. The CMOS TFT 21 takes the form of the combination of the N-type TFT 22 and the P-type TFT 23. The above-mentioned vertical driver VD is not necessarily provided with only this CMOS TFT 21, and various kinds of TFTs and circuit elements are linked to form a driving circuit.

Of these TFTs 11, 12, 22, and 23, the driving TFT 11 and the switching TFT 12 of the pixel region are formed of the silicon thin film of the first region, and the CMOS TFT 21 of the circuit region is formed of the silicon of the second region. By using the silicon germanium thin film on the thin film, at least a semiconductor active layer serving as a channel is formed and formed on the same substrate 100 as described above.

The substrate 100 may be a glass material or a flexible plastic material such as polyimide, polycarbonate, polyester, mylar, and the like, but is not limited thereto. Metallic materials, such as), can also be used. The buffer layer 110 may be selectively formed on the substrate 100 to prevent the diffusion of impurity ions as necessary. The semiconductor thin films 30 and 30a of FIG. 2 are patterned and the like on the substrate 100 to form at least a channel of the semiconductor active layers 121, 122, 123 and 124 of the TFTs 11, 12, 22 and 23. do. The semiconductor active layers 123 and 124 of the circuit region among the semiconductor active layers have a double layer structure of the double thin film layer of the second region, that is, a double layer structure of the silicon thin films 123b and 124b and the silicon germanium thin films 123a and 124a.

As shown in FIG. 3, silicon oxide (SiO ₂ ) is formed on top of the active layers 121, 122, 123, and 124 of each TFT. And / or a gate insulating film 130 made of silicon nitride (SiN _x ), or the like, formed on each TFT by a conductive metal film such as MoW, Al, Cr, Al / Cu, Ti / Al / Ti, or the like. Gate electrodes 141, 142, 143, and 144 of 11, 12, 22, and 23 may be formed.

An interlayer insulating layer 150 made of silicon oxide and / or silicon nitride is formed on the gate insulating layer 130 and the gate electrodes 141, 142, 143 and 144, and the TFTs are formed to be insulated from the gate electrodes 141, 142, 143 and 144. Source / drain electrodes 161, 162, 163, 164 of the fields 11, 12, 22, 23 are disposed. The source / drain electrodes 161, 162, 163, and 164 are formed of a conductive metal film such as MoW, Al, Cr, Al / Cu, Ti / Al / Ti, or a conductive material such as a conductive polymer. In addition, the source / drain electrodes 161, 162, 163, and 164 are connected to the source / drain regions of the active layers 121, 122, 123, and 124, respectively, through the contact holes 150a, 150b, 150c, and 150d. By forming in this way, the thin film transistor which concerns on this invention is formed.

Meanwhile, when the gate electrodes 141, 142, 143 and 144 and the source / drain electrodes 161, 162, 163 and 164 are formed, the charging capacitor Cst may be formed of the same material.

The passivation film 170 made of silicon oxide and / or silicon nitride is formed on the source / drain electrodes 161, 162, 163, and 164, and a planarization film 171 formed of acryl, BCB, polyimide, or the like is formed thereon. . The via hole 170a is formed in the passivation film 170 and the planarization film 171 so that any one of the source and drain electrodes 161 of the driving TFT 11 is exposed. The passivation film 170 and the planarization film 171 need not necessarily be limited thereto, and only one layer may be provided.

The pixel electrode 180 of the OLED is formed on the planarization layer 171. The pixel electrode 180 is connected to any one of the source and drain electrodes 161 through the via hole 170a.

The pixel defining layer 185 is formed on the pixel electrode 180 by an organic material such as acrylic, BCB, polyimide, or an inorganic material such as silicon oxide or silicon nitride. The pixel defining layer 185 is formed to cover the TFTs of the driving TFT 11, the switching TFT 12, and the like of the selection driving circuit, and to have an opening so that a predetermined portion of the pixel electrode 180 is exposed.

The organic layer 190 including the emission layer is coated on at least an opening through which the pixel defining layer 185 is exposed. The organic layer 190 may be formed on the entire surface of the pixel defining layer 185. In this case, the emission layer of the organic layer 190 may be patterned into red, green, and blue for each pixel to implement full color.

Meanwhile, as shown in FIG. 3, the pixel defining layer 185 may not be formed on the portion of the circuit region 20 where the vertical or horizontal driver is located, but is not limited thereto, and may be formed to cover the same. .

After the organic layer 190 is formed, the common electrode 195 of the OLED is formed. The common electrode 195 may be formed to cover all of the pixels, but is not limited thereto, and may be patterned.

The pixel electrode 180 and the common electrode 195 are insulated from each other by the organic layer 190, and apply a voltage having different polarities to the organic layer 190 to emit light in the organic layer 190. .

Meanwhile, the pixel electrode 180 functions as an anode electrode, and the common electrode 195 functions as a cathode electrode. Of course, the polarities of the pixel electrode 180 and the common electrode 195 may be reversed.

The pixel electrode 180 may be provided as a transparent electrode or a reflective electrode, and when used as a transparent electrode, may be formed of ITO, IZO, ZnO, or In ₂ O ₃ , and when used as a reflective electrode, Ag, Mg, After forming a reflecting film with Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and compounds thereof, ITO, IZO, ZnO or In ₂ O ₃ can be formed thereon.

Meanwhile, the common electrode 195 may also be provided as a transparent electrode or a reflective electrode. When the transparent electrode is used as a transparent electrode, since the common electrode 195 is used as a cathode, a metal having a low work function, that is, Li, Ca, or LiF is used. / Ca, LiF / Al, Al, Mg and their compounds are deposited to face the organic film 190, and then supplemented with a material for forming a transparent electrode such as ITO, IZO, ZnO or In ₂ O ₃ An electrode layer and a bus electrode line can be formed. And when used as a reflective electrode is formed by depositing the entire surface of Li, Ca, LiF / Ca, LiF / Al, Al, Mg and their compounds.

 The organic layer 190 may be a low molecular or high molecular organic layer. When the low molecular organic layer is used, a hole injection layer (HIL), a hole transport layer (HTL), and an organic emission layer (EML) are used. , An electron transport layer (ETL), an electron injection layer (EIL), etc. may be formed by stacking a single or a complex structure, and the usable organic materials may be copper phthalocyanine (CuPc), N, N'-di (naphthalen-1-yl) -N-N'-diphenyl-benzidine (N, N'-Di (naphthalene-1-yl) -N-N'-diphenyl-benzidine: NPB), Various applications are possible, including tris-8-hydroxyquinoline aluminum (Alq3). These low molecular weight organic layers are formed by the vacuum deposition method.

In the case of the polymer organic layer, the structure may include a hole transporting layer (HTL) and a light emitting layer (EML). In this case, PEDOT is used as the hole transporting layer, and PPV (Poly-Phenylenevinylene) and polyfluorene are used as the light emitting layer. By using a polymer organic material such as), it can be formed by screen printing or ink jet printing.

Meanwhile, the semiconductor active layers 123 and 124 of the TFTs 22 and 23 provided in the drivers of the circuit region 20 are double layers of the silicon thin films 123b and 124b and the silicon germanium thin films 123a and 124a as described above. It is apparent that the at least channel of the TFTs 22 and 23 is a silicon germanium thin film 123a and 124a in contact with the gate insulating film.

In the flat panel display of the present invention according to the first embodiment, the semiconductor active layer in the pixel region uses a silicon (Si) thin film having a low channel mobility on the same substrate, and the semiconductor active layer in the circuit region has a high channel mobility. By using a silicon germanium thin film (SiGe), high-speed response of the circuit region and accurate and uniform pixel representation of the pixel region are possible, but a thin and light display device can be realized by using the same substrate.

4A to 4D are cross-sectional views of part I-I of FIG. 1 schematically showing a process of manufacturing a semiconductor active layer on a substrate according to the first embodiment.

4A shows an optional silicon nitride (SiN _x ) over the substrate 100. After the buffer layer 110 is formed and the silicon thin film 30 is formed thereon, the silicon oxide (SiO) method is formed only by the plasma chemical vapor deposition (PECVD) method on the portion (first region) to be the semiconductor active layer of the pixel region. ₂ ) shows a first step of manufacturing a semiconductor active layer in a state where an insulating film 200 is formed by depositing ₂ ).

FIG. 4B shows a second step of fabricating a semiconductor active layer in which a high quality silicon germanium (SiGe) epi layer 30a is formed by chemical vapor deposition (CVD) or molecular beam turning on (MBE) after the first step. have.

The CVD method is a method in which two or more gases are blown into a chamber to deposit particles formed by a chemical reaction between reaction gases on a wafer surface to form an insulating film or a conductive film. On the other hand, the MBE method is an epitaxial growth technique, which stands for Molecular Beam Epitaxy and is also referred to as molecular beam epitaxy. The MBE method allows the crystal material (Ge in the present invention) evaporated in an ultra-high vacuum reaction tube below a tor to reach the substrate while forming a beam in the form of molecules or atoms, and then reacts with the surface of the substrate to cause crystal growth. It is a way. It is a development of conventional physical vapor deposition (PVD) and is generally used when precise epilayer growth is required.

 The CVD method or the MBE method is one of the deposition methods, and the silicon germanium thin film can be formed by other methods.

4C shows that after the second step, the silicon germanium thin film on the first region is removed by lifting off silicon oxide (SiO ₂ ) with hydrogen fluoride (HF) solution, thereby removing only the first silicon film 30. A third step of forming a region (second region) to be the semiconductor active layer of the region and the circuit layer of the double layer structure of the silicon thin film 30 and the silicon germanium thin film 30a is shown.

4D is a fourth step showing a schematic view of a semiconductor active layer in which a first region and a second region are patterned to a desired shape after the third step, and the switching TFT of the pixel region among the TFT semiconductor active layers of FIG. Only the semiconductor active layer 122 of the semiconductor active layer 122 and the semiconductor active layer 123 of the N-type TFT among the CMOS TFTs in the circuit region are shown. As shown in FIG. 4D, the semiconductor active layer 123 of the circuit region is formed by patterning the second region of FIG. 4C, and thus has a double layer structure of the silicon thin film 123b and the silicon germanium thin film 123a, where the N-type TFT is formed. At least the channel of is a silicon germanium thin film 123a as described above.

The second and third steps will be a step of forming a substantially second layer of the double layer structure of the silicon thin film 30 and the silicon germanium thin film 30a of the present invention. Meanwhile, in order to become a complete flat panel display as shown in FIG. 3, a plurality of processes must be performed after the fourth step. However, the description thereof is omitted because it is not related to the features of the present invention.

FIG. 5 is a cross-sectional view illustrating in detail a portion where a semiconductor active layer exists, that is, a portion where TFTs are located, in a cross section of the portion II of FIG. 1 according to the second embodiment. The semiconductor active layers 123a and 124a are single layers of the silicon germanium thin film. Other parts are the same as shown in Figure 5, so the description of those parts will be omitted.

6A through 6C are cross-sectional views of part I-I of FIG. 1 schematically showing a process of manufacturing a semiconductor active layer on a substrate according to the second embodiment.

FIG. 6A illustrates that germanium ions are implanted into the silicon thin film by ion implantation in a portion (second region) of the silicon thin film 30 to which the silicon oxide insulating film 200 is not coated after FIG. 4A. A step of forming the silicon germanium thin film 40a is shown.

6B is the same as that of FIG. 4C to remove the silicon oxide on the first region by lifting off the HF solution to form a second region of the silicon germanium thin film 40a which is a single layer with the first region of the silicon thin film 30. The steps are shown.

6C illustrates a schematic view of a semiconductor active layer in which a semiconductor active layer is patterned to a desired shape as in FIG. 4D, and also shows only two semiconductor active layers 122 and 123a. As shown in FIG. 6C, the semiconductor active layer 123a of the circuit region is a single layer of the silicon germanium thin film 123a patterned with the second region of FIG. 6B, and is on the same layer as the silicon thin film 122 that is the semiconductor active layer of the pixel region. It shows formation.

The main difference between the fabrication process according to the second embodiment of FIGS. 6A to 6C and the fabrication process according to the first embodiment of FIGS. 4A to 4D is that the semiconductor active layer in the circuit region is a single layer of the silicon germanium thin film 123a. It is using the injection method. Of course, since the following process is irrelevant to the features of the present invention as mentioned above, further description is omitted.

Through the manufacturing method as shown in Figs. 4A to 4D or Figs. 5A to 5C, the semiconductor active layers of the pixel region and the circuit region on the same substrate are semiconductors having different characteristics. By using each of the silicon thin film and the silicon germanium thin film, a flat panel display capable of high-speed response in the circuit region as described above and accurate and uniform pixel representation in the pixel region can be realized.

As described above, the present invention is not necessarily limited to the organic light emitting display device, and may be applied to various types of flat panel display devices having a TFT such as a liquid crystal display device, an inorganic light emitting display device, and an LED. In addition, the present invention has been described with reference to the embodiments shown in the drawings, which are merely exemplary and will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. . Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

As described in detail above, in the present invention, the semiconductor active layer of the pixel region is formed on the same substrate using a silicon thin film and the semiconductor active layer of the circuit region is formed of a silicon germanium thin film, thereby providing high-speed response of the circuit region and accurate and uniformity of the pixel region. Not only can one pixel representation be realized and a thinner and lighter display panel can be provided, but its thinness can be more easily applied to a flexible display.

On the other hand, by using a silicon thin film and a silicon germanium thin film together on the same substrate, there is a problem in that the process cost is added compared to the case of implementing a display using only a silicon thin film, but the precision and high-speed response due to the high channel mobility of the driving circuit part Therefore, it is expected to be very promising for special fields such as the military industry that require high performance display.

Claims (12)

A pixel region formed on a flexible substrate and having a semiconductor active layer including an organic light emitting element (OLED) and a channel region; And A circuit region formed on the substrate and controlling a signal applied to the pixel region, the circuit region having a semiconductor active layer including a channel region; And the semiconductor active layer in the pixel region includes a silicon (Si) thin film, and the semiconductor active layer in the circuit region includes the silicon thin film and a silicon germanium (SiGe) thin film formed on the silicon thin film. delete delete delete According to claim 1, And the flexible substrate is a stainless steel (SUS) substrate. According to claim 1, And the substrate includes a buffer layer thereon. Forming a silicon (Si) thin film on a flexible substrate and forming an insulating film on a portion of the silicon thin film; Forming a silicon germanium (SiGe) thin film on the silicon thin film and the insulating film; Removing the insulating film and the silicon germanium thin film on the insulating film to form a first region including the silicon thin film and a second region including the silicon thin film and the silicon germanium thin film; And And forming an organic light emitting diode (OLED) over the first region. The method of claim 7, wherein Forming the silicon germanium thin film, And forming a silicon germanium (SiGe) epitaxial layer on the silicon thin film formed on the substrate by chemical vapor deposition (CVD) or molecular beam turning on (MBE). delete The method of claim 7, wherein And the first area is a pixel area, and the second area is a circuit area. delete delete

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