KR100754063B1 - Manufacturing method of multi-layer printed circuit board - Google Patents

Abstract

A method of manufacturing a multi-layer printed circuit board is provided to prevent a step difference between a coverlay and circuit patterns by forming the circuit pattern and the coverlay on outer layers and laminating the outer layers with an inner layer. A first outer layer disk, an inner layer disk, and a second outer layer disk are provided. Circuit patterns(15,25,35) are formed on the first outer layer disk and the inner layer disk, respectively, so that a first outer layer(10), and inner layers(20,30) are formed. The first outer layer, the inner layers, and the second outer layer disk are laminated as a whole. A through-hole(60) is formed on the first outer layer, the inner layers, and the second outer layer disk with respect to the circuit pattern on the first outer layer. A copper plating layer(70) is formed on the through-hole region.

Description

MANUFACTURING METHOD OF MULTI-LAYER PRINTED CIRCUIT BOARD

1A to 1J are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to a first exemplary embodiment of the present invention.

2A to 2H are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to a second exemplary embodiment of the present invention.

3A to 3H are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to a third exemplary embodiment of the present invention.

Description of the main parts of the drawing

10: first outer layer 10a: first outer layer disc

20, 30: inner layer 20a, 30a: inner layer disc

40: second outer layer 40a: second outer layer disc

11, 21: flexible film 13, 23: copper foil

15, 25, 35, 45: circuit pattern

17, 47: outer layer coverlay 27, 37: inner layer coverlay

50: insulating layer 60: through hole

70: copper plating layer 71, 71a: electroless copper plating layer

73: electrolytic copper plating layer

The present invention relates to a method for manufacturing a multilayer printed circuit board, and more particularly, to a method for manufacturing a multilayer printed circuit board capable of improving a process pattern and improving circuit pattern fineness and consistency.

Printed circuit boards are the most basic electronic components used in electronic communication devices and the like, and the technology of printed circuit boards is also rapidly developing with the rapid development of electronic communication technology. Recently, as the electronic communication devices are diversified, the types of printed circuit boards are also increasing.

For example, a flexible multilayer formed with a flexible area and a rigid area in a digital still camera (DSC), a digital video camera (DVC), a digital video disc (DVD), a personal digital assistant (PDA), a personal computer (PD), and the like. Printed circuit boards are widely applied.

The flexible multilayer printed circuit board is a structurally complex combination of a rigid region and a flexible region. Since no additional connector is used to connect the rigid region and the flexible region, contact noise can be reduced and mounting density can be increased. In addition, necessary parts can be mounted in a rigid region having a relatively high strength, thereby maximizing component mountability. Due to these advantages, the use of flexible multilayer printed circuit boards is steadily increasing.

In order to improve the performance and reliability of the flexible multilayer printed circuit board, it is required to refine the circuit pattern of the flexible multilayer printed circuit board. However, the conventional manufacturing method of the flexible multilayer printed circuit board has a limitation in miniaturization of the circuit pattern, which will be described in more detail.

In a conventional method of manufacturing a multilayer printed circuit board, an outer layer in which a circuit pattern is not formed is laminated together with an inner layer in which a circuit pattern is formed, a copper plating layer for conducting holes and interlayer conduction is formed, and then a circuit pattern is formed in the outer layer. . Finally, coverlays are formed on the outer layer.

According to this method, after forming the copper plating layer for interlayer conduction, the circuit pattern of the outer layer is formed, and thus the thickness of the copper foil to be patterned becomes thick, thereby making it difficult to refine the outer circuit pattern. In addition, lamination of the photosensitive resist for forming a circuit pattern on the outer layer is difficult due to the steps formed in the hard region and the soft region, and light may be scattered in the photosensitive process by the step. Accordingly, it can be seen that the miniaturization of the circuit pattern formed on the outer layer is difficult and the precision of the circuit pattern is also low. This problem can be severe in soft areas that are heavily influenced by steps.

In addition, even when the coverlay is formed, the conformity of the coverlay may be deteriorated by deformation of the step and the circuit pattern of the outer layer during the process. In addition, when the step is large, the substrate may be deformed or voids or cracks may occur during the coverlay forming process.

In order to solve the problems of the conventional method for manufacturing a flexible multilayer printed circuit board, after forming all the circuit patterns on the upper outer layer, inner layer and lower outer layer, they are laminated and bonded, and a copper plating layer for conducting holes and interlayer conduction is formed. And a circuit pattern formed on the outer layer, and finally a cover lay on the outer layer.

As such, since circuit patterns are formed on the upper outer layer and the lower outer layer, and then stacked and bonded to each other, there is a problem in that the matching of the upper outer layer, the inner layer, and the lower outer layer is severely low. In this method, since the circuit pattern must be formed in consideration of low matching, it may not contribute significantly to the miniaturization of the circuit pattern.

In addition, since the coverlay is formed on the outer layer after lamination and bonding, there is a problem in that problems such as the loss of conformity caused by the step between the hard region and the soft region, deformation or cracking are not solved at all.

The present invention was devised to solve the above problems, and an object of the present invention is to provide a method for manufacturing a multilayer printed circuit board which can refine the circuit pattern and improve the matching between the inner layer and the outer layer.

In addition, another object of the present invention is to provide a method for manufacturing a multilayer printed circuit board which can improve the conformity of the coverlay and can prevent deformation or cracking during the manufacturing process.

In order to achieve the above object, a method of manufacturing a multilayer printed circuit board according to an embodiment of the present invention, (a) preparing a first outer layer disk, an inner layer disk and a second outer layer disk, (b) the second (1) forming a first outer layer and an inner layer by forming circuit patterns on the outer layer disc and the inner layer disc, respectively (c) laminating and bonding the first outer layer, the inner layer and the second outer layer disc, and (d) ) Forming a through hole in the first outer layer, the inner layer and the second outer layer disc based on the circuit pattern of the first outer layer, and (e) forming a copper plating layer in the through hole region. It features.

In an embodiment of the present invention, between the step (d) and the step (e), a step of forming a second outer layer by forming a circuit pattern on the second outer layer disc based on the through hole is further performed. It is characterized by performing.

In one embodiment of the present invention, the multilayer printed circuit board includes a flexible region. At this time, the step of forming the coverlay to cover the circuit pattern formed in the flexible region in the first outer layer and the second outer layer after the step (e) or between the step (b) and the step (c) It is characterized by further performing.

In one embodiment of the present invention, the step (e), the step of forming an electroless copper plating layer on the inner surface of the through hole, and the outer surface of the first outer layer and the second outer layer, on the electroless copper plating layer Forming an electrolytic copper plating layer corresponding to the through hole region and removing a portion of the electroless copper plating layer in which the electrolytic copper plating layer is not formed.

In one embodiment of the present invention, the multilayer printed circuit board is a flexible multilayer printed circuit board comprising a flexible region and a hard region.

On the other hand, the method of manufacturing a multilayer printed circuit board according to another embodiment of the present invention, (f) preparing a first outer layer, an inner layer and a second outer layer each having a circuit pattern, (g) the first outer layer and Forming a cover lay on at least one of the second outer layers, (h) collectively laminating and bonding the first outer layer, the inner layer and the second outer layer, (i) the first outer layer, the inner layer and Forming a through hole in the second outer layer and (j) forming a copper plating layer in the through hole region.

In an embodiment of the present invention, the step (f) includes the steps of preparing a first outer layer disc, an inner layer disc, and a second outer layer disc, and the first outer layer disc, the inner layer disc, and the second outer layer disc. And forming circuit patterns on the first outer layer, the inner layer, and the second outer layer, respectively.

In one embodiment of the present invention, the multilayer printed circuit board includes a flexible region. In this case, in the step (g), the coverlay is formed to cover the circuit pattern formed in the flexible region in at least one of the first outer layer and the second outer layer.

In one embodiment of the present invention, the step (j), the step of forming an electroless copper plating layer on the inner surface of the through hole, and the outer surface of the first outer layer, the second outer layer and the coverlay, the electroless Forming an electrolytic copper plating layer corresponding to the through hole region on the copper plating layer, and removing a portion of the electroless copper plating layer in which the electrolytic copper plating layer is not formed.

In one embodiment of the present invention, the multilayer printed circuit board is a flexible multilayer printed circuit board comprising a flexible region and a hard region.

Hereinafter, a method of manufacturing a multilayer printed circuit board according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

1A to 1J are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to a first exemplary embodiment of the present invention.

First, as shown in FIG. 1A, the first outer layer disk 10a, the inner layer disks 20a and 30a, and the second outer layer disk 40a are prepared.

Here, the first outer layer disk 10a, the inner layer disks 20a and 30a, and the second outer layer disk 40a may be flexible copper clad laminate (FCCL). That is, the discs 10a, 20a, 30a, and 40a are formed by bonding the copper foils 13, 23, 33, and 43 to the flexible films 11, 21, 31, and 41, such as polyester and polyimide. It has flexibility.

Subsequently, as shown in FIG. 1B, the copper foil (reference numerals 13, 23, and 33 of FIG. 1A) of the first outer layer disc (reference numeral 10a of FIG. 1A) and the inner layer disc (reference numerals 20a and 30a of FIG. 1B) are The first outer layer 10 and the inner layers 20 and 30 are formed by patterning the circuit patterns 15, 25 and 35. In this case, for example, a photolithography process using a photosensitive resist may be applied, but the present invention is not limited thereto. At this time, a circuit pattern is not formed in the second outer layer master plate 40a.

In the present embodiment, the circuit pattern 15 is formed on the first outer layer 10 after lamination by forming the circuit pattern 15 on the first outer layer 10 before the lamination of the first outer layer 10 and the inner layers 20, 30 and the like. Unlike the case of forming a), since it is not disturbed by a step and a copper plating layer for interlayer conduction is not formed, only a thin copper foil may be patterned in the circuit pattern 15 of the first outer layer 10. Accordingly, a fine and precise circuit pattern 15 can be formed in the first outer layer 10.

Subsequently, as illustrated in FIG. 1C, inner cover lay films 27 and 37 are formed on the inner layers 20 and 30 to cover the circuit patterns 25 and 35 of the inner layers 20 and 30. .

1A to 1C, for convenience of explanation, the first outer layer disc 10a (or the first outer layer 10), the inner layer discs 20a and 30a (or the inner layers 20 and 30), and the second outer layer disc ( Although 40a) are shown together, substantially they can be produced by a process performed separately.

Subsequently, as illustrated in FIG. 1D, an insulating layer 50 is inserted into each of the first outer layer 10, the inner layers 20 and 30, and the second outer layer disc 40a, and then stacked in a batch to apply heat and pressure. These are bonded together. The region into which the insulating layer 50 is inserted is hardened to form a rigid region R, and the region into which the insulating layer 50 is not inserted forms a flexible region F having softness and flexibility.

Here, the insulating layer 50 may use an insulating material having an adhesive property such as a bonding sheet, or may use a prepreg in a semi-cured state.

Subsequently, as illustrated in FIG. 1E, a through hole 60 is formed in the first outer layer 10, the inner layers 20 and 30, and the second outer layer disc 40a. The through hole 60 may be formed by a computer numerical control drill (CNC) drill, or may be formed by a YAG laser (yttrium aluminum garnet laser) or a carbon dioxide laser.

The through hole 60 is preferably formed at a predetermined position so that circuit patterns to be connected to each other can be connected. At this time, in the present exemplary embodiment, the conductive hole 60 is formed by determining a predetermined position of the conductive hole 60 based on the circuit pattern 15 of the first outer layer 10. As a result, the position of the through hole 60 can be prevented from escaping from the preset position with respect to the circuit pattern 15 of the first outer layer 10. Therefore, the through hole 10 and the circuit pattern 15 of the first outer layer 10 are prevented. The matchability of (60) can be improved.

Subsequently, as shown in FIG. 1F, the copper foil (reference numeral 43 in FIG. 1E, the same reference numeral below in FIG. 1E) of the second outer layer disc (reference numeral 40a of FIG. 1E) is patterned to form the circuit pattern 45 to form the second outer layer ( 40) is prepared.

At this time, the circuit pattern 45 is formed by determining a predetermined position of the circuit pattern 45 of the second outer layer 40 on the basis of the through hole 60. That is, in the present embodiment, the through hole 60 is formed based on the circuit pattern 15 of the first outer layer 10, and then the circuit pattern 45 of the second outer layer 40 based on the through hole 60 is formed. ). Accordingly, since the position of the circuit pattern 45 of the second outer layer 40 is substantially determined based on the circuit pattern 15 of the first outer layer 10, the first outer layer 10 and the inner layer are thus determined. The matchability of the 20 and the second outer layer 40 can be improved.

Since the circuit pattern 45 of the second outer layer 40 is formed before forming the copper plating layer (reference numeral 70 of FIG. 1I) for interlayer conduction, only the copper foil 43 is formed to form the circuit pattern 45. Patterning is done. Accordingly, the circuit pattern 45 of the second outer layer 40 can be miniaturized.

Subsequently, as shown in FIGS. 1G to 1I, the copper plating layer 70 is formed in the through hole 60, which will be described in more detail.

First, as shown in FIG. 1G, an electroless copper plating layer 71a is formed on the inner surface of the through hole 60 and the outer surfaces of the first outer layer 10 and the second outer layer 40.

Next, as shown in FIG. 1H, the electrolytic copper plating layer 73 is formed only in the conductive hole 60 region on the electroless copper plating layer 71a.

In order to form the electrolytic copper plating layer 70 having such a pattern, a photosensitive resist for opening the conductive hole 60 region is formed, an electrolytic copper plating layer 73 is formed in the opened portion, and then the photosensitive resist is removed. Applicable to the method. As the photosensitive resist, a dry film or the like may be used. However, the present invention is not limited thereto.

Next, as shown in FIG. 1I, a portion of the electroless copper plating layer (reference numeral 71a of FIG. 1H) in which the electrolytic copper plating layer 73 is not formed is removed. Accordingly, the copper plating layer 70 including the electroless copper plating layer 71 and the electrolytic copper plating layer 73 is formed only in the conductive hole 60 region. Since the copper plating layer 70 is formed only in the conductive hole 60 region, the thickness of the multilayer printed circuit board may be reduced.

Subsequently, as shown in FIG. 1J, the outer layer coverlays 17 and 47 are formed to cover the circuit patterns 15 and 45 formed in the flexible region F in the first and second outer layers 10 and 40. .

As described above, according to the present exemplary embodiment, the circuit pattern of the first outer layer may be formed before lamination and bonding to form a circuit pattern of the first outer layer finely and precisely while preventing a problem that may occur due to a step. The circuit pattern of two outer layers can be formed after lamination, and can improve the matching property of a 1st outer layer, an inner layer, and a 2nd outer layer. At this time, since the circuit pattern of the second outer layer is formed before the copper plating layer is formed, the circuit pattern of the second outer layer can also be miniaturized.

Hereinafter, the manufacturing method of the multilayer printed circuit board according to the second and third embodiments of the present invention will be described in detail. For the sake of clarity, the same processes as those in the first and second embodiments will be omitted and briefly described.

First, a method of manufacturing a multilayer printed circuit board according to a second exemplary embodiment of the present invention will be described with reference to FIGS. 2A to 2H. 2A to 2H are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to a second exemplary embodiment of the present invention.

First, as shown in FIG. 2A, the first outer layer disc 110a and the inner layer disc 120a and 130a respectively having the flexible films 111, 121, 131, and 141 and the copper foils 131, 123, 133, and 143. ) And the second outer layer disc 140a.

Then, as shown in FIG. 2B, the copper foil of the first outer layer disc (reference 110a in FIG. 2A), the inner layer disc (reference numerals 120a and 130a in FIG. 2A) and the second outer layer disc (reference 140a in FIG. 2A) Patterning the reference numerals 113, 123, 133, and 143 of FIG. 2A to form circuit patterns 115, 125, 135, and 145, respectively, so that the first outer layer 110, the inner layers 120, 130, and the second outer layer ( 140). Unlike the first embodiment, the circuit pattern 145 of the second outer layer 140 is formed in the step of forming the circuit patterns 115, 125, and 135 of the first outer layer 110 and the inner layers 120 and 130. Form together.

As described above, the circuit patterns 115 and 145 of the first and second outer layers 110 and 140 may be formed before the lamination to form fine and precise circuit patterns 115 and 145.

Subsequently, as illustrated in FIG. 2C, inner cover layers 127 and 137 are formed on the inner layers 120 and 130 to cover the circuit patterns 125 and 135 of the inner layers 120 and 130. 2 The outer layer coverlays 117 and 147 are formed so as to cover the circuit patterns 115 and 145 of portions of the outer layers 110 and 140 that are set as the soft regions (reference numeral F in FIG. 2D).

Subsequently, as illustrated in FIG. 2D, the insulating layer 150 is inserted into the first outer layer 110, the inner layers 120 and 130, and the second outer layer 140 so as to correspond to the hard region R, respectively. After lamination, they are joined by applying heat and pressure. The region into which the insulating layer 150 is inserted is hardened to form a rigid region R, and the region into which the insulating layer 150 is not formed forms a flexible region F having softness and flexibility.

Subsequently, as illustrated in FIG. 2E, the through hole 160 is formed in the first outer layer 110, the inner layers 120 and 130, and the second outer layer 140.

2F to 2H, a copper plating layer 170 including an electroless copper plating layer 171 and an electrolytic copper plating layer 173 is formed in the through hole 160.

That is, as shown in FIG. 2F, the electroless copper plating layer 171a is formed on the inner surface of the through hole 160 and the outer surfaces of the first outer layer 110, the second outer layer 140, and the outer coverlays 117 and 147. 2G, the electrolytic copper plating layer 173 is formed only on the conductive hole 160 region on the electroless copper plating layer 171a. As shown in FIG. 2H, the portion of the electroless copper plating layer (reference numeral 171a of FIG. 2G) in which the electrolytic copper plating layer 173 is not formed is removed.

In the present exemplary embodiment, the outer layer coverlays 117 and 147 are formed before the first outer layer 110, the inner layers 120 and 130, and the second outer layer 140 are stacked, whereby the hard region R and the soft region F are formed. The outer layer coverlays 117 and 147 are formed before a step between them occurs. Thereby, the matchability of the outer layer coverlays 117 and 147 can be improved. In addition, conventionally, when the outer layer coverlay is formed, the problem that the substrate is deformed or caused by voids or cracks due to the step can be prevented at the source.

In addition, the first outer layer 110 and the second outer layer 140 formed together with the inner layers 120 and 130 as well as the circuit patterns 115 and 145 as well as the outer layer coverlays 117 and 147 are laminated and bonded together. Since the process is performed, the outer layer coverlays 117 and 147, the first outer layer 110, the inner layers 120 and 130, and the second outer layer 140 are subjected to uniform deformation, thereby facilitating scale management of the printed circuit board. .

Next, a method of manufacturing a multilayer printed circuit board according to a third exemplary embodiment of the present invention will be described with reference to FIGS. 3A to 3H. 3A to 3H are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to a third exemplary embodiment of the present invention.

First, as illustrated in FIG. 3A, a first outer layer disc 210a and an inner layer disc 220a and 230a including the flexible films 211, 221, 231, and 241 and copper foils 213, 223, 233, and 243. And a second outer layer disc 240a.

Subsequently, as shown in FIG. 3B, the copper foil (reference numerals 213, 223, and 233 of FIG. 3A) of the first outer layer disk (210a in FIG. 3A) and the inner layer disk (220a, 230a in FIG. 3A) are removed. The first outer layer 210 and the inner layers 220 and 230 are formed by patterning the circuit patterns 215, 225, and 235, respectively. At this time, the circuit pattern is not formed on the second outer layer disc 240a.

Subsequently, as shown in FIG. 3C, inner coverlays 227 and 237 are formed on the inner layers 220 and 230 to cover the circuit patterns 225 and 235 of the inner layers 220 and 230, and the first outer layer ( The outer layer coverlay 217 is formed to cover the circuit pattern 215 formed at a portion predetermined as the flexible region (reference F of FIG. 3D) in 210.

Subsequently, as shown in FIG. 3D, an insulating layer 250 is inserted between the first outer layer 210, the inner layers 220 and 230, and the second outer layer disc 240a to correspond to the hard region R. After laminating them collectively, they are joined by applying heat and pressure. The region into which the insulating layer 250 is inserted is hardened to form a rigid region R, and the region into which the insulating layer 250 is not inserted forms a flexible region F having softness and flexibility.

Subsequently, as illustrated in FIG. 3E, a through hole 260 is formed in the first outer layer 210, the inner layers 220 and 230, and the second outer layer disc 240a.

Subsequently, as shown in FIG. 3F, the second outer layer 240 is formed by patterning the copper foil (reference 243 in FIG. 3E) of the second outer layer disc (reference 240a in FIG. 3E) to form a circuit pattern 245. Form.

Subsequently, as shown in FIG. 3G, a copper plating layer 270 including an electroless copper plating layer 271 and an electrolytic copper plating layer 273 is formed in the through hole 260.

Subsequently, as illustrated in FIG. 3H, the outer layer coverlay 247 is formed to cover the circuit pattern 245 of the flexible region F in the second outer layer 240.

This embodiment is a combination of the first embodiment and the second embodiment, and can represent all the advantages of the first and second embodiments.

In the above, the multilayer printed circuit board having the circuit patterns formed on both the first outer layer and the second outer layer is illustrated and described, but the present invention is not limited thereto. Therefore, it is also possible that no circuit pattern is formed in the second outer layer, which is also within the scope of the present invention.

In addition, in the above, the multilayer printed circuit board having the flexible region and the rigid region is illustrated and described, but the present invention is not limited thereto. Therefore, the present invention can be applied to a multilayer printed circuit board having only a flexible region, which also belongs to the scope of the present invention.

That is, the embodiments of the present invention have been described above, but the present invention is not limited thereto, and the present invention may be modified or modified in various ways within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, this also belongs to the scope of the present invention.

As described above, according to one method of manufacturing a multilayer printed circuit board according to the present invention, a circuit pattern is formed on the first outer layer before lamination to form the circuit pattern of the first outer layer finely and precisely, and By forming a circuit pattern of two outer layers, the matching property of a 1st outer layer, an inner layer, and a 2nd outer layer can be improved.

That is, in the manufacturing method, the circuit pattern of the first and second outer layers and the stacking order of the first and second outer layers may be improved to form a fine and precise circuit pattern, and at the same time, the matching effect may be improved.

The above effect of forming a fine and precise circuit pattern can be largely exerted in a flexible region in which a fine and precise circuit pattern could not be formed by a step in the past.

On the other hand, according to another method of manufacturing a multilayer printed circuit board according to the present invention, after forming both the circuit pattern and the coverlay on the first and second outer layers, they are laminated and bonded together with the inner layer to prevent the problem caused by the step The coherence of the ray can be improved. In addition, since the inner layer, the outer layer and the outer coverlay are uniformly deformed in the same process, scale management of the multilayer printed circuit board is easy.

In addition, another manufacturing method of the multilayer printed circuit board according to the present invention may exhibit all the effects that can be exhibited in the manufacturing method by applying the above manufacturing method together.

On the other hand, since the multilayer printed circuit board manufactured by the above-described methods has excellent matching and has a fine and precise circuit pattern, it can be applied to an electronic communication device to improve the performance of the electronic communication device. In addition, the electroless copper plating layer and the electrolytic copper plating layer are formed only in the conductive hole region, thereby making the thickness of the multilayer printed circuit board thin, thereby contributing to the thinning of the electronic communication device.

Claims (11)

(a) preparing a first outer layer disc, an inner layer disc, and a second outer layer disc; (b) forming circuit patterns on the first outer layer disc and the inner layer disc to form a first outer layer and an inner layer; (c) collectively laminating and bonding the first outer layer, the inner layer and the second outer layer disc; (d) forming a through hole in the first outer layer, the inner layer and the second outer layer disc based on the circuit pattern of the first outer layer; And (e) forming a copper plating layer in the through hole region Method of manufacturing a multilayer printed circuit board comprising a. The method of claim 1, wherein between step (d) and step (e), And forming a second outer layer by forming a circuit pattern on the second outer layer disc based on the through-holes. The printed circuit board of claim 2, wherein the multilayer printed circuit board includes a flexible region. After the step (e), further comprising the step of forming a coverlay to cover the circuit pattern formed in the flexible region in the first outer layer and the second outer layer, characterized in that the manufacturing method of the multilayer printed circuit board . The printed circuit board of claim 2, wherein the multilayer printed circuit board includes a flexible region. Between step (b) and step (c), the step of forming a cover lay to cover the circuit pattern formed in the flexible region in the first outer layer further comprising the step of manufacturing a multilayer printed circuit board . The method of claim 2, wherein step (e) Forming an electroless copper plating layer on an inner surface of the through hole and an outer surface of the first outer layer and the second outer layer; Forming an electrolytic copper plating layer on the electroless copper plating layer corresponding to the through hole region; And Removing a portion of the electroless copper plating layer in which the electrolytic copper plating layer is not formed Method of manufacturing a multilayer printed circuit board comprising a. The method of claim 2, wherein the multilayer printed circuit board comprises a flexible region and a rigid region. delete delete delete delete delete

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