KR100732294B1 - Demodulator in RFID with non-volatile ferroelectric memory - Google Patents

Abstract

The present invention relates to a demodulation device in an RFID including a nonvolatile ferroelectric memory, and discloses a technique for minimizing power consumption by reducing current in an RFID demodulator using a nonvolatile ferroelectric capacitor having a high dielectric constant. do. In the present invention, in order to minimize current flow in the demodulator in the RFID including the nonvolatile ferroelectric memory, the resistance value of the resistor provided in the envelope detecting unit is set large, and the voltage variation of the envelope detecting unit caused by the signal limiter In order to reduce the current consumption due to the voltage difference between the operating voltage and the power supply voltage, a current limiting resistor element is provided in the output buffer unit to ensure the characteristics of the high speed envelope detection unit with minimal power consumption. .

Description

Demodulator in RFID with non-volatile ferroelectric memory

1 is a block diagram of a demodulation device according to the prior art.

2 is a view for explaining the distance dependency of the demodulation device according to the prior art.

3 is an overall configuration diagram of an RFID including a nonvolatile ferroelectric memory according to the present invention;

4 is a block diagram of a demodulation device in an RFID including a nonvolatile ferroelectric memory according to the present invention;

FIG. 5 is a detailed circuit diagram of the envelope detection unit of FIG. 4. FIG.

FIG. 6 is another embodiment of the envelope detection unit of FIG. 4. FIG.

FIG. 7 is yet another embodiment of the envelope detector of FIG. 4. FIG.

8 is a view for explaining a distance dependency of a demodulation device according to the present invention.

FIG. 9 is a detailed circuit diagram illustrating an output buffer unit of FIG. 4. FIG.

10 is a diagram for explaining signal characteristics of a demodulation device according to the present invention;

11 is a table comparing the characteristics of the capacitor of the prior art and the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demodulation device in RFID including a nonvolatile ferroelectric memory, and is a technique for reducing current in an RFID demodulator using a nonvolatile ferroelectric capacitor having a high dielectric constant.

In general, the nonvolatile ferroelectric memory, or ferroelectric random access memory (FeRAM), has a data processing speed of about DRAM (DRAM) and is attracting attention as a next-generation memory device due to its characteristic that data is preserved even when the power is turned off. have.

The FeRAM is a memory device having a structure almost similar to that of a DRAM, and uses a ferroelectric material as a capacitor material to utilize high residual polarization characteristic of the ferroelectric material. Due to this residual polarization characteristic, data is not erased even when the electric field is removed.

Description of the above-described FeRAM has been disclosed in Korean Patent Application No. 2001-57275 filed by the same inventor as the present invention. Therefore, a detailed description of the basic configuration of the FeRAM and its operation will be omitted.

On the other hand, a general radio frequency identification (RFID) device includes an analog block, a digital block, and a memory block. Herein, an analog block includes a modulator and a demodulator for modulating / demodulating a radio frequency signal received from an antenna.

1 is a circuit diagram related to such a conventional demodulator.

The conventional demodulator includes a plurality of dielectric dielectric capacitors C1 to C5, a plurality of Schottky diodes D1 to D6, and a signal filter unit 2. Here, the signal filter unit 2 includes a capacitor C6 and a resistor R1.

In the conventional demodulator having such a configuration, when a radio frequency signal RF is applied through the antenna 1 from the outside, an RFID chip is output to the output terminal by the rectifying action of the Schottky diodes D1 to D6 and the charge pump operation of the dielectric dielectric capacitors C1 to C5. The operating voltage Venv of is generated. Then, the signal filter unit 2 filters the operating voltage Venv by the dielectric capacitor C6 and the resistor R1. The command signal of the RFID and the system clock signal are detected according to the operating voltage Venv.

However, as shown in FIG. 2, when the RFID chip is in close proximity to the reader, the demodulator described above may not be sufficiently enveloped because the RF signal RF, which is the input of the antenna 1, is strongly inputted. I can't. In this case, Vt in FIG. 2 means a threshold voltage of the NMOS transistor. Accordingly, there is a problem in that a signal is generated in the high voltage region, so that a large difference in operating voltage Venv between the target distance and the close distance occurs.

In addition, the capacitors C1 to C6 used in the above-described demodulator mainly use a PIP (Poly-Insulator-Poly) structure. In this case, the insulator mainly uses SiO 2 and Al 2 O 3 which are dielectric.

In this case, however, the dielectric materials of the above-described materials have a small dielectric constant, and therefore, a large number of capacitor elements must be provided to obtain a desired capacitance. Accordingly, there is a problem that the area of the entire capacitor is increased, and the complexity and the cost of the process are increased by applying a different process from the cell capacitor.

The present invention has been made to solve the above problems, and an object of the present invention is to reduce the overall size of RFID using a nonvolatile ferroelectric capacitor to which the same process as the cell capacitor is applied to the demodulator of the RFID.

In addition, an object of the present invention is to reduce the current in the demodulator of the RFID using a nonvolatile ferroelectric capacitor having a high dielectric constant to reduce power consumption.

The demodulation device in the RFID including the nonvolatile ferroelectric memory of the present invention for achieving the above object, rectifies the radio frequency signal applied through the antenna and charge-pumped the rectified voltage through the nonvolatile ferroelectric capacitor of the RFID And an envelope detecting unit for generating an operating voltage for controlling the operation, and an output buffer unit for buffering the operating voltage and outputting a command signal with a current limiting resistor element for limiting the current of the operating voltage.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

3 is an overall configuration diagram of an RFID including a nonvolatile ferroelectric memory according to the present invention. The radio frequency identification (RFID) device of the present invention generally includes an analog block 100, a digital block 200, and a non-volatile ferroelectric random access memory (FeRAM) 300.

Here, the analog block 100 may include a voltage multiplier 110, a voltage limiter 120, a modulator 130, a demodulator 140, and a power on reset; 150 and a clock generator 160.

And, the antenna 10 of the analog block 100 is a configuration for transmitting and receiving radio frequency signal RF between the external reader or writer and RFID. The voltage multiplier 110 generates a power supply voltage VDD which is a driving voltage of the RFID by the radio frequency signal RF applied from the antenna 10. The voltage limiter 120 limits the magnitude of the transmission voltage of the radio frequency signal RF applied from the antenna 10 and outputs it to the demodulator 140 and the clock generator 160.

In addition, the modulator 130 modulates the response signal RP applied from the digital block 200 and transmits it to the antenna 10. The demodulator 140 detects an operation command signal from a radio frequency signal RF applied from the antenna 10 according to the output voltages of the voltage multiplier 110 and the voltage limiter 120 and transmits the command signal DEMOD to the digital block 200. Output

The power-on reset unit 150 detects the output voltage VDD of the voltage multiplier 110 and outputs a power-on reset signal POR for controlling the reset operation to the digital block 200. The clock generator 160 supplies the clock CLK for controlling the operation of the digital block 200 to the digital block 200 according to the output voltage VDD of the voltage multiplier 110.

In addition, the above-described digital block 200 receives the power supply voltage VDD, the power-on reset signal POR, the clock CLK, and the command signal DEMOD from the analog block 100 to interpret the command signal and generate control signals and processing signals to generate the analog block. The response signal RP corresponding to 100 is output. The digital block 200 outputs the address ADD, the input / output data I / O, the control signal CTR, and the clock CLK to the FeRAM 300. The FeRAM 300 is a memory block that reads / writes data using a nonvolatile ferroelectric capacitor element.

4 is a detailed block diagram illustrating the demodulator 140 of FIG. 3.

The demodulator 140 includes an envelope detector 141 and an output buffer unit 145. Here, the envelope detector 141 includes a ferroelectric capacitor and rectifies and charge-pumps the radio frequency signal RF applied from the antenna 10 to output the operating voltage Venv. The output buffer unit 145 buffers the operating voltage Venv applied from the envelope detector 141 to output the command signal DEMOD. The command signal of the RFID and the system clock signal are detected according to the command signal DEMOD.

FIG. 5 is a detailed circuit diagram of the envelope detector 141 of FIG. 4.

The envelope detecting unit 141 includes a plurality of Schottky diodes D7 to D12, a plurality of nonvolatile ferroelectric capacitors FC1 to FC5, a signal filter unit 142, and a signal limit unit 143.

The envelope detecting unit 141 of the present invention having the above configuration has a rectifying action and a plurality of nonvolatile states of the Schottky diodes D7 to D12 when an external radio frequency signal RF is applied through the antenna 10. The charge pumping operation of the ferroelectric capacitors FC1 to FC5 outputs the operating voltage Venv of the RFID chip to the DC power output terminal.

That is, the charge is stored in the nonvolatile ferroelectric capacitor FC2 by the rectification of the Schottky diodes D7 and D8, and the charge stored in the nonvolatile ferroelectric capacitor FC2 is pumped by the rectification of the Schottky diodes D9 and D10 to pump the nonvolatile ferroelectric capacitor. Save to FC4. Then, the rectifying operation and the pumping operation are sequentially performed to generate the operating voltage Venv through the diodes D11 and D12 of the final stage.

In addition, the signal filter unit 142 includes a nonvolatile ferroelectric capacitor FC6 and a resistor R2 to implement a low pass filter. Here, the nonvolatile ferroelectric capacitor FC6 and the resistor R2 are connected in parallel between the output terminal of the operating voltage Venv and the ground voltage terminal. At this time, the resistor R2 allows a small current of 1 mA to flow through the envelope detector 141 using a resistor having a large resistance value.

The signal limiting unit 143 includes NMOS transistors N1 and N2 to drop the operating voltage Venv by 2Vtn (threshold voltages of the NMOS transistors N1 and N2). Here, the NMOS transistors N1 and N2 are connected in series between the output terminal of the operating voltage Venv and the ground voltage terminal, so that the gate terminal is commonly connected to the drain terminal.

That is, assuming that the threshold voltages of the NMOS transistors N1 and N2 are 0.7V, respectively, the threshold voltage of the signal limit unit 143 becomes 0.7V × 2, which is similar to the value of the power supply voltage VDD (1.5V). Accordingly, the operating voltage Venv becomes a signal that varies between the ground voltage and the 2Vtn voltage region.

6 is another embodiment of the envelope detector 141 of FIG. 4.

6 is a structure in which the nonvolatile ferroelectric capacitor FC6 of the signal filter unit 142 is omitted in comparison with the configuration of FIG. 5. The signal filter unit 142 implements a low pass filter using only the resistor R2. At this time, the resistor R2 allows a small current of 1 mA to flow through the envelope detector 141 using a resistor having a large resistance value.

That is, since the NMOS transistors N1 and N2 of the signal limiting unit 143 act as capacitors, the capacitors do not have to be provided as shown in FIG. 5. Accordingly, the operating voltage Venv becomes a signal that varies between the ground voltage and the 2Vtn voltage region.

7 is another embodiment of the envelope detector 141 of FIG. 4.

In the embodiment of FIG. 7, the signal limiter 144 has a plurality of diodes D1 to Dn compared to the configuration of FIG. 6. Here, the plurality of diodes D1 to Dn are connected in series between the output terminal of the operating voltage Venv and the ground voltage terminal to drop the operating voltage Venv by a voltage of nVt.

That is, assuming that the threshold voltages of the diodes D1 to Dn are 0.7V, respectively, the threshold voltage of the signal limit unit 144 is 0.7V × n (where n is the number of diode elements). Accordingly, the operating voltage Venv becomes a signal that varies between the ground voltage and the nVt voltage region.

8 is a view for explaining the distance dependency in the reader of the demodulation device according to the present invention.

According to the present invention having the above configuration, when the RFID chip is in close proximity to the reader, even if the radio frequency signal RF, which is the input of the antenna 10, is strongly input, the operating voltage Venv is set to 2Vt or nVt region by the signal limit unit 143. Limited. Accordingly, the stable operating voltage Venv may be output regardless of the distance between the reader and the RFID chip.

FIG. 9 is a detailed circuit diagram illustrating the output buffer unit 145 of FIG. 4.

The output buffer unit 145 includes PMOS transistors P1 and P2, NMOS transistors N3 and N4, and resistors R3 and R4.

Here, the PMOS transistors P1 and P2 and the NMOS transistors N3 and N4 have a structure in which two CMOS inverters are connected to each other. That is, the PMOS transistor P1 and the NMOS transistor N3 are connected in series between the resistor R3 and the resistor R4 so that the operating voltage Venv is applied through the gate terminal.

The PMOS transistor P2 and the NMOS transistor N4 are connected between the resistor R3 and the resistor R4 so that the gate terminal is connected to the common drain terminal of the PMOS transistor P1 and the NMOS transistor N3. The command signal DEMOD is output through the common source terminal of the PMOS transistor P1 and the NMOS transistor N3.

In addition, the resistor R3 is connected between the power supply voltage terminal and the PMOS transistor P1, and the resistor R4 is connected to the NMOS transistor N3 and the ground voltage terminal to serve as a current limiting device. At this time, the resistors R3 and R4 allow a small current of 1 mA to flow through the output buffer unit 145 by using a resistor having a large resistance value.

10 is a diagram for explaining signal characteristics of a demodulation device according to the present invention.

Referring to FIG. 10, the voltage value of the operating voltage Venv is limited to a 2Vt or nVt region so that a stable operating voltage Venv is output regardless of the distance between the reader and the RFID. The command signal DEMOD is a signal that changes between the ground voltage and the power supply voltage range. Here, the operating voltage Venv and the command signal DEMOD have the same phase, and only the voltage level is shifted by the output buffer unit 145.

In order to minimize the flow of current in the demodulator, the present invention sets a large resistance value of the resistor R2 provided in the envelope detector 141 and changes the voltage variation of the envelope detector 141 due to the signal limiter 144. Stabilize).

In addition, current limiting resistors R3 and R4 are provided in the output buffer unit 145 to reduce current consumption due to the voltage difference between the operating voltage Venv and the power supply voltage VDD. Therefore, it is possible to ensure the characteristics of the high speed envelope detection unit 141 with minimal power consumption.

11 is a table comparing the capacitor characteristics of the prior art and the present invention.

Referring to FIG. 11, a conventional capacitor according to the prior art mainly uses a poly-insulator-poly (PIP) structure. In this case, the insulator mainly uses SiO 2 and Al 2 O 3 which are dielectric. However, in this case, the dielectric constant SiO2 has a low dielectric constant of 3.7 and the dielectric constant Al2O3 has a low dielectric constant of only 8. In addition, the process of the capacitor is designed to be a different process from the memory cell, which increases the complexity and cost of the process.

In contrast, the nonvolatile ferroelectric capacitors FC1 to FC6 applied to the present invention are implemented in the same process as the capacitor of the memory cell. This simplifies the process and reduces the cost.

In addition, a surface barrier transistor (SBT) having a high dielectric constant or a plumbium-zirconate-titanate (PZT), which is a piezoelectric element, is used as the dielectric of the capacitor. Since the SBT dielectric material has a dielectric constant of 250 and the PZT having a dielectric constant of 500 and a high dielectric constant, the area of the capacitor used for RFID can be reduced.

As described above, the present invention can reduce the total size of the RFID by using a nonvolatile ferroelectric capacitor to which the same process as the cell capacitor is applied to the demodulator of the RFID.

In addition, the present invention provides the effect of reducing the current in the demodulator (demodulator) of the RFID using a nonvolatile ferroelectric capacitor having a large dielectric constant to ensure high-speed characteristics with minimal power consumption.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (15)

An envelope detector configured to rectify the radio frequency signal applied through the antenna and charge pump the rectified voltage through the nonvolatile ferroelectric capacitor to generate an operating voltage for controlling the operation of the RFID; And And a non-volatile ferroelectric memory, comprising: an output buffer unit configured to buffer the operating voltage and output a command signal by including a current limiting resistor element for limiting a current of the operating voltage. The demodulation device of claim 1, further comprising a signal filter unit including a nonvolatile ferroelectric capacitor element to filter a signal at an output terminal of the operating voltage. The demodulation device of claim 2, wherein the signal filter unit comprises a resistor connected between an output terminal of the operating voltage and the ground voltage terminal. The demodulation device of claim 3, wherein the signal filter unit further comprises a first nonvolatile ferroelectric capacitor connected between an output terminal of the operating voltage and a ground voltage terminal. The demodulation device of claim 1 or 2, further comprising a signal limit unit configured to limit the voltage variation of the operating voltage by dropping the operating voltage. 6. The demodulation device of claim 5, wherein the signal limit unit limits the operation voltage to a voltage value that varies between a power supply voltage and a ground voltage. The non-volatile ferroelectric memory of claim 5, wherein the signal limit unit includes a plurality of NMOS transistors connected in series between an output terminal of the operating voltage and a ground voltage terminal, and having a gate terminal and a drain terminal connected in common. Demodulation device in RFID. The demodulation device of claim 5, wherein the signal limit unit comprises a plurality of diode elements connected in series between an output terminal of the operating voltage and a ground voltage terminal. The envelope detection unit of claim 1, A plurality of rectifying means for rectifying and outputting the radio frequency signal applied through the antenna; And In the RFID including a nonvolatile ferroelectric memory, characterized in that it comprises a plurality of nonvolatile ferroelectric capacitors for charge pumping and storing the voltage rectified by the plurality of rectifying means and generates the operating voltage which is the power supply voltage of the RFID. Demodulation device. 10. The demodulation device of claim 9, wherein the plurality of nonvolatile ferroelectric capacitors are formed by the same process as the cell capacitor of the nonvolatile ferroelectric memory. The demodulation device of claim 9 or 10, wherein the ferroelectrics of the plurality of nonvolatile ferroelectric capacitors are made of a surface barrier transistor (SBT) having a high dielectric constant. The demodulation device of claim 9 or 10, wherein the ferroelectrics of the plurality of nonvolatile ferroelectric capacitors comprise a piezoelectric transistor (PZT) having a high dielectric constant. 10. The demodulation device according to claim 9, wherein said plurality of rectifier means comprises a Schottky diode. The method of claim 1, wherein the output buffer unit A plurality of inverters connected in series between the operation voltage applying stage and the output terminal of the command signal; A first current limiting resistor element connected between the plurality of inverters and a power supply voltage terminal; And And a second current limiting resistor element coupled between the plurality of inverters and a ground voltage terminal. The method of claim 14, wherein the plurality of inverters A first transistor and a second transistor connected in series between the first current limiting resistor element and the second current limiting resistor element and to which the operating voltage is applied through a gate terminal; And A series terminal is connected between the first current limiting resistor element and the second current limiting resistor element so that a gate terminal is connected to the common drain terminal of the first transistor and the second transistor, and the command signal is output through the common drain terminal. A demodulation device in an RFID comprising a nonvolatile ferroelectric memory, characterized in that it comprises a third transistor and a fourth transistor.

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