KR100730154B1 - Flat panel display device and manufacturing method thereof - Google Patents

Abstract

According to the present invention, when the metal substrate is used, the laser crystallization is uniform, the voltage drop of the driving power source is prevented, and at the same time, the flat display of the electronic device located in the circuit region where various circuit devices are installed can be minimized. An object of the present invention is to provide an apparatus and a manufacturing method thereof. To this end, the present invention provides a metal substrate, an opaque functional film formed on the substrate, an active layer formed of a polycrystalline semiconductor material on the functional film, a main electrode insulated from the active layer, and the active layer A thin film transistor comprising first and second electrodes in contact with and insulated from the main electrode, wherein the functional film includes a concentration gradient between a first component of a transparent material and a second component of an opaque material And a method for producing the same.

Description

Flat panel display device and manufacturing method

1 is a cross-sectional view illustrating a crystallization process of an active layer of a TFT in a method of manufacturing a flat panel display device according to an exemplary embodiment of the present invention;

2 is a graph and a cross-sectional view showing in more detail for the functional film of FIG.

3 is a circuit diagram schematically illustrating a pixel circuit of one unit pixel of a flat panel display device according to an exemplary embodiment of the present invention;

4 is a circuit diagram illustrating an example of the circuit of FIG. 3;

5 is a cross-sectional view of an example of a pixel structure capable of implementing the circuit according to FIG. 4;

6 is a circuit diagram illustrating another example of the circuit of FIG. 3;

7 is a cross-sectional view of an example of a pixel structure that may implement the circuit according to FIG. 6.

Explanation of symbols on the main parts of the drawings

100: substrate 101a, b: first and second buffer layer

102: functional film 103: gate insulating film

104: interlayer insulating film 105: planarization film

106: pixel defining layer 111: semiconductor layer

112: main electrode 113: TFT first electrode

114: TFT second electrode 131: capacitor first electrode

132: capacitor second electrode 161: pixel electrode

162: organic light emitting layer 163: counter electrode

Prior Art Document 1: US Patent Application Publication US 2003 / 0111954A1

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display and a method for manufacturing the same, and more particularly, to a flat panel display having a metal substrate having a structure more suitable for laser crystallization and a method for manufacturing the same.

In general, a flat panel display such as an organic light emitting diode display, a TFT-LCD, and the like can be made extremely thin and flexible in view of driving characteristics, and thus many studies have been made.

In such a flat panel display, an active matrix type flat panel display includes pixel circuits in each pixel, and the pixel circuits control light emitting elements of the pixels according to signals applied from scan lines and data lines. And drive.

At this time, each pixel circuit includes a thin film transistor, which includes an active layer including a channel. As the material for forming the active layer, amorphous silicon, polycrystalline silicon, and the like are frequently used.

Thin film transistors using amorphous silicon have the advantage of being capable of low temperature deposition. However, recently, polycrystalline silicon has been used a lot since electrical properties and reliability are deteriorated, and the large area of the display device is difficult. Polycrystalline silicon has high mobility of tens to hundreds of cm 2 /V.s, and has high frequency operation characteristics and low leakage current value, which is very suitable for use in high-definition and large-area flat panel display devices.

Such polycrystalline silicon is formed by crystallizing amorphous silicon by a predetermined crystallization method, and as such a crystallization method, laser crystallization is often used.

By the way, when this laser crystallization method is applied to the amorphous silicon film formed in the metal substrate, a problem arises in performing uniform crystallization.

For example, when an amorphous silicon film is formed on a metal substrate and then crystallized by irradiating a laser, a part of the energy incident on the amorphous silicon film is transmitted through the amorphous silicon film in the form of laser or thermal energy by a conventional laser crystallization method. The reflection on the metal substrate causes it to reach the amorphous silicon film again. At this time, since the surface of the metal substrate is not as smooth as a mirror due to roughness, defect, etc. present on the surface, the reflectivity of energy is changed for each region, and thus the nonuniformity of the surface of the metal substrate is reflected in the amorphous silicon film as it is. This results in a difference in crystallization state depending on the location.

On the other hand, the driving power source connected to the pixel circuit is connected to the pixels on a line, and the power voltage applied to the pixel is uneven according to the position of the pixel due to the voltage drop generated through the line-type power supply line. . As a result, luminance unevenness occurs, which causes a problem in that display quality is degraded.

In the active driving type organic light emitting diode display, at least one capacitor is included in each pixel circuit. Since a plurality of pixels are provided, voltage drop may occur in the capacitor. This becomes a problem because the screen is larger and the number of pixels and the number of capacitors belonging to each pixel become larger.

In order to improve this problem, a technique for forming a separate power supply layer has been proposed by the present applicant. The prior art document 1 discloses an organic light emitting display device having a top light emitting structure in which a power supply layer for supplying a power voltage is formed on a substrate. However, even in this case, since the above-mentioned problem in laser crystallization remains as it is, a solution thereof is required.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the prior art as described above, and an object thereof is to provide a flat panel display device and a method of manufacturing the same, which can make laser crystallization uniform when using a metal substrate.

Another object of the present invention is to provide a flat panel display device and a method of manufacturing the same, which can prevent a voltage drop of a driving power supply and at the same time minimize the deterioration of characteristics of electronic devices located in a circuit region in which various circuit devices are installed.

In order to achieve the above object, the present invention provides a metal substrate, an opaque functional film formed on the substrate, an active layer formed of a polycrystalline semiconductor material, and a main electrode insulated from the active layer And a thin film transistor including first and second electrodes in contact with the active layer and insulated from the main electrode, wherein the functional layer has a concentration gradient between the first component, which is a transparent material, and the second component, which is an opaque material. A flat panel display is provided.

The present invention also provides a step of forming an opaque functional film on a metal substrate, forming an amorphous semiconductor layer on the functional film, and crystallizing the amorphous semiconductor layer to achieve the above object, polycrystalline semiconductor layer Forming an active layer by patterning the polycrystalline semiconductor layer, wherein the functional layer has a concentration gradient between the first component, which is a transparent material, and the second component, which is an opaque material. It provides a method of manufacturing.

Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

1 illustrates a crystallization process of an active layer of a TFT in a method of manufacturing a flat panel display device according to an exemplary embodiment of the present invention.

In the present invention, the flat panel display is implemented on the metal substrate 100. The substrate can be stainless steel, Ti, Mo, Invar alloy, Inconel alloy, or Kovar alloy.

In order to compensate for surface roughness, a first buffer layer 101a is formed on the substrate 100, and a functional film 102 and a second buffer layer 101b are formed on the first buffer layer 101a. Are formed sequentially.

As the first and second buffer layers 101a and 101b, an organic or inorganic insulating layer may be used. As the organic insulating film, a polymer material may be used. Examples thereof include general general polymers (PMMA, PS), polymer derivatives having phenol groups, acrylic polymers, imide polymers, arylether polymers, amide polymers, fluorine polymers, p-xylene polymers, vinyl alcohol polymers and blends thereof, and the like, and as inorganic insulating films, SiO 2, SiN x, SiON, Al ₂ O ₃ , TiO ₂ , Ta ₂ O ₅ , HfO ₂ , ZrO ₂ , BST, And PZT and the like are possible.

The functional film 102 may be a film that absorbs external light, and according to a preferred embodiment of the present invention, the first component, which is a transparent material, and the second component, which is an opaque material, may be provided to have a concentration gradient. .

At this time, the content of the first component increases as it moves away from the substrate, and the content of the second component increases as it approaches the substrate.

That is, as shown in FIG. 2, the functional film 102 formed on the first buffer layer 101a has a concentration gradient inversely proportional to each other by sequentially forming the first component (I) and the second component (II). It may be. The content of the first component (I) increases as the distance from the first buffer layer 101a increases, and the content of the second component (II) increases as it approaches the first buffer layer 101a.

A transparent material may be used as the first component (I), and SiOx (x ≧ 1), SiNx (x ≧ 1), MgF ₂ , CaF ₂ , Al ₂ O ₃ , SnO ₂ At least one material selected from the group consisting of a transparent insulating material such as indium tin oxide (ITO), indium zinc oxide (IZO), ZnO, In ₂ O _3, etc. It may be provided as.

As the second component (II), an opaque material may be used, such as Fe, Co, V, Ti, Al, Ag, Si, Cr, Mo, Ge, Y, Zn, Zr, W, Ta, Cu, Pt At least one material selected from the group consisting of can be used.

The functional film 102 thus formed gradually changes to an opaque material as the transparent material gradually increases in thickness, thereby suppressing the interface reflection caused by the difference in refractive index, and the light incident on the functional film 102 is applied to this function. The effect absorbed by the film forming 102 is shown.

Therefore, as shown in FIG. 1, when the semiconductor film 110 is formed of amorphous silicon on the second buffer layer 101b on the functional film 102 and then crystallized by a laser, the semiconductor film ( The laser passing through the 110 is absorbed by the functional film 102 and is not reflected from the surface of the metal substrate 100, so that the laser intensity and the like can be easily adjusted, and thus the desired crystallinity can be easily adjusted. Therefore, crystallization of the semiconductor film 110 becomes easier, and a substantially uniform crystal state can be obtained over the entire substrate 100. As a result, the uniformity of the characteristics of the TFT to be formed of the semiconductor film 110 can be increased.

The functional film 102 may be formed directly on the substrate 100 without the first buffer layer 101a, and a buffer layer may be formed only on the functional film 102.

FIG. 3 schematically illustrates a pixel circuit PC of one unit pixel of a flat panel display device which may be manufactured as the semiconductor film 110 crystallized as described above.

As shown in FIG. 3, each pixel of the flat panel display device has a Vdd power line (Vdd) serving as one driving power source of a data line (Data), a scan line (Scan), and an organic light emitting diode (OLED). Is provided.

The pixel circuit PC of each pixel is electrically connected to the data line Data, the scan line, and the Vdd power line Vdd, and controls the light emission of the OLED.

FIG. 4 illustrates a more specific example of FIG. 3, wherein the pixel circuit PC of each pixel includes two thin film transistors M1 and M2 and one capacitor unit Cst.

Referring to FIG. 4, each pixel of an AM organic light emitting diode display according to an exemplary embodiment of the present invention may include a switching TFT M2, at least two thin film transistors of a driving TFT M1, and a capacitor unit Cst. ) And an organic electroluminescent device (OLED).

The switching TFT M2 is turned on / off by a scan signal applied to the scan line Scan to transfer a data signal applied to the data line Data to the storage capacitor Cst and the driving TFT M1. The switching element is not necessarily limited to the switching TFT M2 as shown in FIG. 4, and may include a switching circuit including a plurality of thin film transistors and capacitors, and a circuit that compensates for the Vth value of the driving TFT M1. Alternatively, a circuit for compensating for the voltage drop of the driving power source Vdd may be further provided.

The driving TFT M1 determines the amount of current flowing into the organic light emitting element OLED according to the data signal transmitted through the switching TFT M2.

Meanwhile, in the present invention, the circuit diagram as described above may be implemented on the substrate as shown in FIG.

Referring to FIG. 5, as shown in FIG. 1, the first buffer layer 101a, the functional film 102, and the second buffer layer 101b are sequentially formed on the substrate 100.

As the substrate 100, as described above in FIG. 1, a metal substrate may be used, and stainless steel, Ti alloy, or the like may be used. Since the first and second buffer layers 101a and 101b and the functional film 102 are the same as in the above-described embodiment according to FIG. 1, detailed descriptions thereof will be omitted.

After the semiconductor film 110 is formed on the second buffer layer 101b as shown in FIG. 1, it is crystallized by a laser to form a polycrystalline semiconductor film. Then, the polycrystalline semiconductor film is patterned to form the active layer 111, as shown in FIG.

In the active layer 111, first and second regions 111b and 111c serving as source and drain regions are positioned around the channel region 111a. As shown in FIG. 4, when the P-type TFT is provided, the first region 111b may be a source region, and the second region 111c may be a drain region 111c.

The gate insulating layer 103 is formed to cover the active layer 111, and the gate electrode 112 is positioned on the gate insulating layer 103 at a position corresponding to the channel region 111a of the active layer 111. At the same time, the first electrode 131 of the capacitor unit Cst is provided on the gate insulating film 103. The gate electrode 112 and the first electrode 131 of the capacitor unit Cst are metals such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, and compounds thereof. It may include a material, or may include a transparent conductive material such as ITO, IZO, ZnO, or In 2 O 3. In addition, a conductive paste containing conductive organic materials or conductive particles such as Ag, Mg, and Cu may be used. And, it may be formed in a structure of a single layer or a multi-layer.

The interlayer insulating layer 104 is covered on the gate electrode 112 and the first electrode 131, and the first and second electrodes 113 and 114 are formed on the interlayer insulating layer 104 to be a source / drain electrode. do. The first and second electrodes 113 and 114 are in contact with the first and second regions 111b and 111c of the active layer 111 through contact holes, respectively.

The first and second electrodes 113 and 114 also include metal materials such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, and compounds thereof, or ITO It may include a transparent conductive material, such as IZO, ZnO, or In2O3. In addition, a conductive paste containing conductive organic materials or conductive particles such as Ag, Mg, and Cu may be used. And, it may be formed in a single layer or a multi-layer structure.

The second electrode 132 of the capacitor unit Cst may be provided on the interlayer insulating layer 104 simultaneously with the formation of the first and second electrodes 113 and 114 of the first TFT M1. In this case, the second electrode 132 of the capacitor unit Cst may be connected to the first electrode 113 of the first TFT M1.

The structure of the TFT is not necessarily limited to the embodiment of FIG. 5, and various thin film transistor structures, such as a bottom gate structure, may be applicable.

After the thin film transistor and the capacitor unit Cst are formed in this manner, the planarization film 105 is formed to cover them. Via holes are formed in the planarization film 105, and pixel electrodes 161 of the organic light emitting diode OLED are formed on the planarization film 105. Accordingly, the pixel electrode 161 is connected to the second electrode 114, which is a drain electrode of the driving thin film transistor M1.

Next, after the pixel definition layer 106 is formed to cover the planarization layer 105 and the pixel electrode 161, the opening 107 is formed to expose a predetermined portion of the pixel electrode 161 to the pixel definition layer 106. Form.

The gate insulating film 103, the interlayer insulating film 104, the planarization film 105, and the pixel definition film 106 described above may also be formed of an organic insulating film, an inorganic insulating film, or an organic-inorganic hybrid film. It may be made of a multilayer structure. As the organic insulating film, a polymer material can be used. Examples thereof include general general purpose polymers (PMMA, PS), polymer derivatives having phenol groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, and fluorine polymers. , p-xylene polymers, vinyl alcohol polymers and blends thereof are possible. As the inorganic insulating film, SiO 2, SiNx, SiON, Al ₂ O ₃ , TiO ₂ , Ta ₂ O ₅ , HfO ₂ , ZrO ₂ , BST, PZT, and the like are possible.

The organic emission layer 162 and the counter electrode 163 are sequentially formed on the pixel electrode 161 exposed through the opening 107 of the pixel definition layer 106.

The pixel electrode 161 may function as an anode electrode, and the counter electrode 163 may function as a cathode electrode. The pixel electrode 161 may be patterned to correspond to the size of each pixel. The counter electrode 163 may be formed to cover all pixels. Of course, the pixel electrode 161 may function as the cathode electrode, and the counter electrode 163 may function as the anode electrode.

In the organic light emitting diode display, since the substrate 100 may be formed of a metal, the organic light emitting diode display may be a top emission type. In this case, the pixel electrode 161 may be used as a reflective electrode, and after forming a reflective film with Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or a compound thereof , ITO, IZO, ZnO, or In 2 O 3 can be formed thereon. In this case, the counter electrode 163 may be provided as a transparent electrode, and a metal having a small work function, that is, Li, Ca, LiF / Ca, LiF / Al, Al, Mg, and a compound thereof is an organic light emitting layer. After deposition to face 162, an auxiliary electrode layer or a bus electrode line may be formed thereon with a material for forming a transparent electrode such as ITO, IZO, ZnO, or In 2 O 3.

The pixel electrode 161 and the counter electrode 163 are not limited to those formed of the above-described materials, and may be formed of a conductive organic material, a conductive paste, or the like.

The organic light emitting layer 162 may be a low molecular or polymer organic layer, and when the low molecular organic layer is used, a hole injection layer (HIL), a hole transport layer (HTL), and an organic emission layer (EML) ), An electron transport layer (ETL), an electron injection layer (EIL), or the like, may be formed by stacking a single or a complex structure, and the usable organic material may be copper phthalocyanine (CuPc). , N, N-di (naphthalen-1-yl) -N, N'-diphenyl-benzidine (N, N'-Di (naphthalene-1-yl) -N, N'-diphenyl-benzidine: NPB), Various applications are possible, including tris-8-hydroxyquinoline aluminum (Alq3). These low molecular weight organic layers are formed by the vacuum deposition method.

In the case of the polymer organic layer, the structure may include a hole transporting layer (HTL) and a light emitting layer (EML). In this case, PEDOT is used as the hole transporting layer, and polyvinylvinylene (PPV) and polyfluorene are used as the light emitting layer. Polymer organic materials such as (Polyfluorene) are used and can be formed by screen printing or inkjet printing.

After the organic light emitting diode OLED is formed, the upper portion thereof is sealed to block the outside air.

As described above with reference to FIGS. 1 and 2, the flat panel display having such a structure can uniformly crystallize the semiconductor layer, thereby obtaining TFTs having uniform characteristics.

6 is a circuit diagram of a unit pixel of a flat panel display device according to another exemplary embodiment of the present invention, and FIG. 7 is a cross-sectional view thereof.

As shown in FIG. 6, in the present embodiment, the capacitor unit Cst is composed of two capacitors of the first capacitor C1 and the second capacitor C2.

This structure will be described in more detail with reference to FIG. 7.

As described above, in the state where the functional film 101 is formed on the first buffer layer 101a on the substrate 100, and the second buffer layer 101b is formed to cover the functional film 102. A TFT, a capacitor unit, and the like are formed on the second buffer layer 101b.

At this time, as described above, the functional film 102 is formed such that the first component (I) and the second component (II) have a concentration gradient inversely proportional to each other, and is formed on the outermost side in the direction close to the substrate 100. Two-component (II) is concentrated in high concentration. However, since the second component (II) is all made of a conductive metal, at least a lower portion of the functional film 102 can have conductivity.

Therefore, in forming the TFT and the capacitor unit, as shown in FIG. 7, when forming the second electrode 132 of the capacitor unit Cst on the interlayer insulating film 104, the interlayer insulating film 104 and the gate are formed. After forming the first through hole 140 in the insulating film 103 and the insulating film 102, the second electrode 132 of the capacitor unit Cst formed on the interlayer insulating film 104 is the functional film 102. Make contact with the bottom of the Accordingly, the first capacitor C1 is formed by the functional film 102, the second buffer layer 101b, the gate insulating film 103, and the capacitor first electrode 131, and the capacitor first electrode 131. The second capacitor C2 is formed by the interlayer insulating film 104 and the capacitor second electrode 132. At this time, the capacitor second electrode 132 is connected to the functional film 102, so that the first capacitor C1 and the second capacitor C2 are connected in parallel. The first electrode 113 of the driving TFT M1 is connected to the second electrode 132 of the capacitor unit Cst. As shown in FIG. 6, the driving TFT M1 and the capacitor unit Cst are connected to each other. The structure may be electrically connected, and the Vdd power line Vdd formed simultaneously with the formation of the first and second electrodes 113 and 114 of the TFT may also have the first electrode 113 and the functional film of the TFT. Taking the structure connected to 102, it is possible to implement a circuit as shown in FIG. The other structure is the same as that of the above-mentioned embodiment, and detailed description is omitted.

As described above, the present invention can prevent the voltage drop of the capacitor unit Cst by using the functional film 102 as one electrode of the capacitor unit Cst, and the functional film 102 can simultaneously maintain the Vdd power line Vdd. The transient electrical connection keeps the voltage drop on the Vdd supply.

In addition to the embodiments described above, the present invention can be applied to all organic light emitting display devices having various cross-sectional structures.

The present invention is not necessarily applied only to an organic light emitting display device, but may be applied to various flat panel display devices such as a liquid crystal display, an inorganic electroluminescent display, and an electron emission display.

According to the present invention as described above, the following effects can be obtained.

First, by placing the functional film capable of absorbing light on the opposite side of the laser irradiation direction, it is possible to prevent the laser from reflecting off the surface of the metal substrate when using the metal substrate, thereby achieving uniform crystallization of the semiconductor film.

Second, by uniformly crystallizing the semiconductor film, the characteristics of the TFT can be made uniform.

Third, due to the conductivity of the functional film, it is possible to prevent the drop in the Vdd voltage due to the line resistance of the Vdd line.

Fourth, since the electrode of the capacitor unit becomes a conductive functional film, the voltage drop of the capacitor Cst can be prevented.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary and will be understood by those of ordinary skill in the art that various modifications and variations can be made therefrom.

Claims (20)

Metal substrates; A functional film formed on the metal substrate and capable of absorbing laser light; And A thin film transistor disposed on the functional layer, the active layer including a polycrystalline semiconductor material, a main electrode insulated from the active layer, and first and second electrodes in contact with the active layer and insulated from the main electrode; and, The functional film is a flat panel display device having a concentration gradient between a first component that is a transparent material and a second component that is an opaque material. The method of claim 1, The content of the first component increases as it moves away from the metal substrate, and the content of the second component increases as it moves closer to the metal substrate. The method of claim 1, The first component is SiOx (x≥1), SiNx (x≥1), MgF ₂ , CaF ₂ , Al ₂ O ₃ , SnO ₂ At least one material selected from the group consisting of a transparent insulating material such as indium tin oxide (ITO), indium zinc oxide (IZO), ZnO, In ₂ O _3, etc. Flat panel display, characterized in that provided with. The method of claim 1, The second component is made of at least one material selected from the group consisting of Fe, Co, V, Ti, Al, Ag, Si, Cr, Mo, Ge, Y, Zn, Zr, W, Ta, Cu, Pt Flat panel display, characterized in that. The method of claim 4, wherein And the thin film transistor is electrically connected to the functional layer. The method of claim 5, And a pixel electrode electrically connected to one of the first and second electrodes of the thin film transistor. The method of claim 4, wherein A capacitor unit electrically connected to the thin film transistor, And the functional layer is electrically connected to at least one electrode of the capacitor unit. The method of claim 7, wherein The capacitor unit includes at least two capacitors connected in parallel with each other, And the functional film is one electrode of one of the capacitors. The method of claim 4, wherein Further comprising a driving power line electrically connected to the thin film transistor, And the functional layer is electrically connected to the driving power line. The method according to any one of claims 1 to 9, And the active layer of the thin film transistor is formed by crystallizing amorphous silicon into polycrystalline silicon by a laser. The method according to any one of claims 1 to 9, And a buffer layer disposed on the metal substrate and provided with an insulating material. The method of claim 11, And the functional film is interposed in the buffer layer. The method of claim 11, And the functional layer is interposed between the buffer layer and the metal substrate. Forming a functional film capable of absorbing laser light on the metal substrate; Forming an amorphous semiconductor layer on the functional film; Laser crystallizing the amorphous semiconductor layer to form a polycrystalline semiconductor layer; And And patterning the polycrystalline semiconductor layer to form an active layer. The functional film is a method of manufacturing a flat panel display device provided with a concentration gradient between the first component is a transparent material and the second component is an opaque material. The method of claim 14, The content of the first component increases as the distance from the metal substrate increases, the content of the second component increases as the closer to the metal substrate. The method of claim 14, The first component is SiOx (x≥1), SiNx (x≥1), MgF ₂ , CaF ₂ , Al ₂ O ₃ , SnO ₂ At least one material selected from the group consisting of a transparent insulating material such as indium tin oxide (ITO), indium zinc oxide (IZO), ZnO, In ₂ O _3, etc. Method of manufacturing a flat panel display characterized in that provided. The method of claim 14, The second component is made of at least one material selected from the group consisting of Fe, Co, V, Ti, Al, Ag, Si, Cr, Mo, Ge, Y, Zn, Zr, W, Ta, Cu, Pt A method of manufacturing a flat panel display, characterized in that. The method of claim 14, And forming a buffer layer including an insulating material on the metal substrate. The method of claim 14, And forming a buffer layer including an insulating material on the functional layer. The method of claim 14, Forming a first buffer layer and a second buffer layer formed of an insulating material on the metal substrate; And the forming of the functional film is performed between the forming of the first buffer layer and the forming of the second buffer layer.

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