KR100726771B1 - Fabrication method of strip for chip scale package - Google Patents

Abstract

A method of manufacturing a strip for a chip scale package is disclosed. According to the present invention, in a strip in which assembly units arranged in a matrix are arranged on a metal plate so that individual units corresponding to one chip scale package can be molded together, the metal plate is introduced into a mold for performing a downset process. Punching some rows of the assembly unit arranged on the metal plate in the first rank, and punching the remaining rows of the assembly unit arranged in the metal plate in the second rank.

Description

Fabrication method of strip for chip scale package}

1 is a plan view of a strip for a conventional chip scale package,

2 is a cross-sectional view showing a conventional chip scale package;

3A to 3C are diagrams illustrating a state after a stepwise punching of the strip for chip scale packages according to the first embodiment of the present invention.

3a is a plan view showing the strip after the punching of the first rank is performed;

3b is a plan view showing the strip after the second ranking punching is performed,

3c shows a plan view of the strip after the final punching has been performed,

4A to 4C are diagrams illustrating a state after stepwise punching of the strip for chip scale packages according to the second embodiment of the present invention.

4a is a plan view showing the strip after the punching of the first rank is performed;

4b is a plan view showing the strip after the second ranking punching is performed,

4c is a plan view showing the strip after the final punching has been performed;

FIG. 5 is a plan view showing a state after the step for punching the strip for chip scale packages according to the third embodiment of the present invention; FIG.

FIG. 6 is a plan view showing a state after the step for punching the strip for a chip scale package according to the fourth embodiment of the present invention. FIG.

<Description of Symbols for Major Parts of Drawings>

10,30 ... strip 11,31 ... metal plate

12,32 ... individual units 20 ... chip scale packages

21.Diode 23.Semiconductor chip

24 ... wire 25 ... lead part

33.Unit assembly 310 ... First unit

320 ... 2nd assembly unit 330 ... 3rd assembly unit

340 ... fourth assembly unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to strips for chip scale packages, and more particularly, to a method for manufacturing strips for chip scale packages, the method of which is improved to be able to downset a sawing type semiconductor package unit.

Typically, a chip scale package (CSP) using a lead frame includes a micro lead frame (MLF), a bottom leaded plastic package (BLP), a bumped chip carrier (BCC), and the like. These products deliver electrical signals to external circuit boards through lead terminals.

As shown in FIG. 1, in the strip 10, the individual units 12 corresponding to one chip scale package are arranged in a plurality of rows on the metal plate 11, for each individual unit 12. Each is molded and trimmed.

Prior to molding, the individual units 12 simultaneously perform a down set process in at least one row A1, A2 in the mold.

However, the manufacturing method of the strip 10 of this type has a problem that the production efficiency is lowered because each process is performed for each individual unit 12.

Recently, in order to arrange a large number of semiconductor packages on one strip, a sawing type molding type is used in which an entire unit is molded by using a single window in which an assembly unit is arranged in a matrix. Eggplant strips for chip-scale packages have been developed.

On the other hand, in the chip scale package corresponding to the individual unit 12 described above, the die pad is exposed to the bottom, and when the die pad is mounted on the external circuit board, the die pad and the external circuit board are separated from each other due to thermal expansion. have. To prevent this, a structure for exposing the die pad to the top has been developed.

2 shows a chip scale package 20 of this structure.

Referring to the drawings, the package 20 may include a die pad 21 exposed to the upper portion, a semiconductor chip 23 attached to the lower portion of the package 20 through an adhesive 22, and the semiconductor chip 23 and a wire. And a lead portion 25 wire-bonded by the 24. The lead portion 25 is half-etched and exposed to the lower portion.

However, after the chip scale package 20 is arranged as a separate unit and arranged in a matrix on a metal plate to form an aggregate unit and formed as one window, the sawing method for separating into individual units is as follows. There may be a problem.

In the process of downsetting the die pad 21, when the size of each individual unit is large, it is possible to downset one window at all, but when the size of each individual unit is small, one of the die pads 21 may cause problems due to mold manufacturing problems. It is difficult to downset the part corresponding to the window of the mold with one mold. In addition, the gap between the lead portions between adjacent individual units becomes narrow, making it difficult to maintain high accuracy characteristics. Accordingly, it can be said that it is necessary to efficiently punch out the metal plate on which each individual unit supplied to the strip is disposed.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a method of manufacturing a strip for chip scale packages in which a set unit on a metal plate is sequentially punched out so that downset of each individual unit can be efficiently performed.

In order to achieve the above object, a method of manufacturing a strip for a chip scale package according to an aspect of the present invention,

The present invention relates to a method for manufacturing a strip in which assembly units arranged in a matrix are arranged on a metal plate so that individual units corresponding to one chip scale package can be molded together.                     

Introducing a metal plate into a mold for performing a downset process;

Punching some rows of the assembly units arranged on the metal plate in a first order; And

And punching the remaining rows of the assembly unit disposed on the metal plate in a second order.

Further, in the step of punching the remaining rows of the aggregation unit in the second rank,

The method may further include a step of simultaneously punching a row at the same position as the row corresponding to the first rank among other aggregation units disposed at the next position of the aggregation unit.

In addition, when each individual unit in the assembly unit is arranged in six rows,

Each individual unit located in the first, third, and fifth rows is punched in the first rank, and each individual unit located in the second, fourth, and sixth rows is punched in the second rank.

Hereinafter, a method of manufacturing a chip scale package strip according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3C sequentially illustrate a method of punching a strip for a chip scale package according to a first embodiment of the present invention.

Referring to FIGS. 3A to 3C, a method of manufacturing a strip for a chip scale package is as follows.

First, a strip 30 in which a plurality of chip scale packages are arranged is supplied. In the strip 30, one assembly unit 33 having one chip scale package on a metal plate 31 as an individual unit 32 and the individual unit 32 arranged in a plurality of rows is predetermined for each group. It is formed in the state spaced apart. The assembly unit 33 corresponds to one window and is subsequently molded during the semiconductor assembly process.

In this embodiment, the assembly unit 33 is composed of individual units 32 of 6 rows x 6 columns, and the assembly unit 33 is the first assembly unit 310 and the second assembly unit 320. The third assembly unit 330 and the fourth assembly unit 340 are arranged on the metal plate 31 at predetermined intervals.

After the strip 30 having such a shape is transferred into the mold in which the downset is performed, the first row individual unit B1 and the third row individual unit among the individual units 32 arranged in the first assembly unit 310 are provided. (B3), the fifth row of individual units (B5) is the first group, and they are all punched out in the first rank.

The first, third, and fifth row individual units B1, B3, and B5 are not individual units corresponding to adjacent rows in the first aggregation unit 310, but correspond to positions spaced apart by one row. It is an individual unit.

The punching of each individual unit in the spaced apart state by the mold is because the size of the individual unit is small, there is a difficulty in manufacturing the mold when punching one assembly unit, and the punching is not properly made (Fig. 3a).

Subsequently, in the first assembly unit 310, the second row individual unit B2, the fourth row individual unit B4, and the sixth row individual unit B6 are grouped into the second group. . Accordingly, each individual unit 32 disposed in the first assembly unit 310 is completely downset.

In this case, the first row individual unit C1, the third row individual unit C3, and the fifth row individual unit C5 of the second assembly unit 320 disposed next to the first assembly unit 310. It is a punch.

When the second group of the first assembly unit 310 is punched out, at the same time, the first, third, and fifth row individual units C1, C3, C5 of the second assembly unit 320 are connected to the first assembly unit ( This is possible because the first group of 310 is placed in the punched mold and the punch is made. Therefore, the first group of punches is made in the second assembly unit 320 (FIG. 3B).

When the strip 30 of the chip scale package is continuously punched through the two-step press process described above, as shown in FIG. 3C, the second, fourth, and sixth row individual units C2 of the second assembly unit 320 are shown. (C4) and (C6) can be punched and the first, third and fifth row individual units (D1), (D3) and (D5) of the third assembly unit 330 can be punched. When the punching of the third rank is completed, the downset of each individual unit of the first and second aggregation units 310 and 320 is finished.

Next, the second, fourth and sixth row individual units D2, D4 and D6 of the third assembly unit 330 are simultaneously punched and the first, third and fifth rows of the fourth assembly unit 340 are separated. Units F1, F3, and F5 are punched in the fourth order. Accordingly, the downset of each individual unit of the third aggregation unit 330 is completed.

Subsequently, the second, fourth and sixth row individual units F2, F4 and F6 of the fourth assembly unit 340 are punched out in the fifth order. As a result, all the downset processes for each individual unit 32 on the metal plate 31 are finished.

As such, when the strip 31 proceeds on the progressive mold in the same manner as described above, punching each individual unit of the assembly unit located in the first, third, and fifth rows to the first rank, Each individual unit of the aggregation units located in the second, fourth, and sixth columns is punched down to the second rank to perform the downset process.

At this time, while the second, fourth, and sixth rows of one assembly unit are punched, the first, the third, and the fifth rows of the next batch unit are continuously driven simultaneously, so that the downset process is optimally timed. It can be said that it can be performed efficiently.

On the other hand, when at least three or more assembly units are simultaneously punched into a mold, it is disadvantageous in terms of production efficiency due to enormous manufacturing costs in mold production, and also has a problem in reliability of the fine individual units.

Each individual unit that has undergone this downset process is transferred to another process so that the semiconductor chip is mounted on the die pad and wire bonded. Then, the molding material is filled onto the assembly unit to form a single window, and then cut into each individual unit using a sawing device to complete the desired chip scale package.

4A-4C show a chip scale package strip according to a second embodiment of the present invention.

Here, the same reference numerals as in the above-described drawings indicate the same members having the same function. In addition, only the features of the present embodiment will be described in detail.

First, the first, second, fifth, and sixth row individual units G1, G2, G5, and G6 of the first assembly unit 410 are punched out on the metal plate 31 in the first order. (FIG. 4A)

When the first punching is completed, the third and fourth row individual units G3 and G4, which are not part of the first assembly unit 410, are punched in the second order. At this time, the second assembly unit 420 disposed at the next position of the first assembly unit 410 is subjected to the first punching, so that the first, second, fifth, and sixth row individual units H1, H2, H5 ( H6) is made (Fig. 4b).

In the same manner as described above, the assembly unit on the metal plate 31 completes a series of downset processes. That is, in the third order, the first and second row units of the second and second row units 420 and the third and fourth row individual units H3 and H4 are punched. The punching of the six-row individual units I1 (I2) (I5) (I6) is carried out.

In the fourth rank, the third and fourth row individual units I3 and I4 of the third aggregation unit 430 and the first, second, fifth and sixth row individual units J1 of the fourth aggregation unit 440. The punching of (J2) (J5) and J6 is completed.

Finally, in the fifth ranking, the punching of the third and fourth row individual units J3 and J4 of the fourth assembly unit 440 is completed.

Accordingly, each individual unit on the strip 30 to be transferred on the conveyor completes the downset process by two steps of mold punching for each assembly unit.

Figure 5 shows a strip for a chip scale package according to a third embodiment of the present invention.

Here, the same reference numerals as in the above-described drawings indicate the same members having the same function. In addition, only the features of the present embodiment will be described in detail.

Referring to the drawings, the strips 30 are arranged on the metal plate 31, each individual unit constituting one assembly unit in eight rows by eight columns.

In the first step, the first, third, fifth, and seventh rows are punched out, and in the second step, the remaining rows, the second, fourth, sixth, and eighth rows, are punched.

That is, in the first rank, the individual units of the first, third, fifth, and seventh columns K1, K3, K5, and K7 of the first aggregation unit 510 are punched out, and in the second ranking, the first aggregation unit ( The second, fourth, sixth, and eighth columns K2, K4, K6, and K8, which are the remaining columns of the 510, are punched and the first, third, fifth, and seventh columns of the second assembly unit 520 (L1). ) L3, L5, and L7 are both punched out. In the third rank, the second, fourth, sixth, and eighth columns L2, L4, L6, and L8, which are the remaining columns of the second aggregation unit 520, are punched and at the same time, the first of the third aggregation unit 530. Rows 3, 5, 7 (M1) (M3) (M5) (M7) are all punched out.

In the fourth ranking, the second, fourth, sixth, and eighth columns M2, M4, M6, and M8, which are the remaining columns of the third aggregation unit 530, are punched out, and at the same time, The first, third, fifth, and seventh rows N1, N3, N5, and N7 are all punched out. Finally, in the fifth rank, the second, fourth, sixth, and eighth columns N2, N4, N6, and N8, which are the remaining columns of the fourth aggregation unit 540, are punched out.

In this way, each individual unit on the metal plate 31 completes a series of downset processes.

Figure 6 shows a strip for a chip scale package according to a fourth embodiment of the present invention.

Unlike the case of the third embodiment, the present embodiment differs in the order of the punched rows.                     

That is, in the first step, the first, second, fifth, and sixth rows are punched out, and in the second step, the second, second, fourth, sixth, and eighth rows are punched.

More specifically, in the first rank, individual units of the first, second, fifth, and sixth columns O1, O2, O5, and O6 of the first assembly unit 610 are punched out. In the second ranking, the third, fourth, seventh, and eighth columns (03) (04) (07) (08), which are the remaining columns of the first aggregation unit (610), and the first, second, Rows 5 and 6 (P1) (P2) (P5) and (P6) are all punched out. In the third rank, the third, fourth, seventh, eighth columns P3, P4, P7, P8 of the second assembly unit 620, and the first, second, fifth, The six rows Q1, Q2, Q5 and Q6 are all punched out. In the fourth rank, the third, fourth, seventh, and eighth columns Q3, Q4, Q7, Q8, which are the remaining columns of the third aggregation unit 630, and the first, second, Rows 5, 6 (R1) (R2) (R5) (R6) are all punched out. Finally, the third, fourth, seventh, and eighth columns R3, R4, R7, and R8 that are the remaining columns of the fourth aggregation unit 640 are all punched out. In this way, each individual unit on the metal plate 31 completes a series of downset processes.

As described above, the manufacturing method of the strip for chip scale packages of the present invention can obtain the following effects.

Each individual unit is arranged in a plurality of rows on a strip to form one aggregation unit, and in a chip scale package in which a plurality of such aggregation units are arranged, even if the size of each individual unit is small, it is gradually downset according to a series of punching orders. As the process is carried out, the defective rate for the punching of the individual units arranged in each assembly unit can be significantly reduced, and the mold manufacturing is also easy.

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Could be. Accordingly, the true scope of protection of the invention should be defined only by the appended claims.

Claims (4)

The present invention relates to a method for manufacturing a strip in which assembly units arranged in a matrix are arranged on a metal plate so that individual units corresponding to one chip scale package can be molded together. Introducing a metal plate into a mold for performing a downset process; Punching some rows of the assembly units arranged on the metal plate in a first order; And And punching the remaining rows of the assembly unit arranged in the metal plate in a second order. The method of claim 1, In the step of punching the remaining rows of the aggregation unit in the second rank, The method of manufacturing a strip for chip scale packages further comprising the step of punching out a row at the same position as a row corresponding to the first rank among other assembly units arranged at a next position of the assembly unit. delete delete

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