KR100725183B1 - Transistor having Co silicide layer and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a transistor having a cobalt silicide layer formed in a gate electrode and a source / drain region, and a method of manufacturing the same, wherein a cobalt silicide layer is formed on an upper sidewall and a sidewall of a gate poly. Providing a semiconductor substrate having a fin field oxide film, a source / drain region, and a gate poly, wherein the spacer is formed on the sidewall of the gate poly from a top surface of the semiconductor substrate to a predetermined height so that the sidewall of the gate poly has an exposed portion; Forming a cobalt film on the top of the fin source / drain region and the gate poly and heat treatment to form a cobalt silicide layer, and removing the cobalt film. Accordingly, the Si cross-section of the source region, the drain region, and the gate poly of the transistor can be widened, and the area in which Si is exposed in the formation of cobalt silicide can be wider than in the conventional process, thereby increasing the volume of the cobalt silicide layer. Therefore, it is possible to cope with high speed and high integration, and in particular, to reduce contact resistance and sheet resistance.

Transistor, Silicide, Cobalt, Gate, Source, Drain

Description

Transistor having cobalt silicide layer and manufacturing method thereof

1 is a cross-sectional view showing a state in which a formation of a cobalt silicide layer is completed during a transistor manufacturing process according to the prior art;

2A to 2D are cross-sectional views illustrating a process of forming a cobalt silicide layer during a transistor manufacturing process according to the present invention.

Explanation of symbols on the main parts of the drawings

11; Semiconductor substrate 13; Field oxide

15; A gate oxide film 17; Gate pulley

19; Spacer 21; Source area

23; Drain region 24; Cobalt membrane

25a, 25b, 25c; Cobalt silicide layer

The present invention relates to a transistor formed on a semiconductor substrate, and more particularly, to a transistor having a silicide layer formed in a gate electrode and a source / drain region, and a method of manufacturing the same.

In general, in a transistor formed on a semiconductor substrate, a cobalt silicide (CoSi ₂ ) layer is formed by cobalt deposition and heat treatment at a gate electrode and a source / drain region. The cobalt silicide layer is used for the formation of narrow lines because the processing temperature, resistivity, contact resistance, junction leakage and stress are all small.

1 is a cross-sectional view illustrating a state in which a cobalt silicide layer is formed during a transistor manufacturing process according to the prior art.

Referring to FIG. 1, a field oxide film 13 is formed as a device isolation region on a semiconductor substrate 111 by thermal oxidation of silicon, and a gate oxide film 115 and a gate poly 117 are formed on the semiconductor substrate 111. And a source region 121 and a drain region 123 are formed as a diffusion layer. The spacer 119 is formed of an oxide on the sidewall of the gate poly 117. Cobalt silicide layers 125a, 125b, and 125c are formed in the source region 121, the drain region 123, and the upper region of the gate poly 117.

In the conventional transistor having such a structure, the cobalt silicide layer is formed in the gate poly, source and drain regions by depositing cobalt on a portion where Si is exposed and undergoing heat treatment under a predetermined temperature atmosphere. And cobalt used to form the cobalt silicide layer is removed.

Conventional transistors having such a cobalt silicide layer exhibit limitations due to high speed and high integration. As the degree of integration increases, the area in which Si is exposed decreases, resulting in a decrease in the volume of the cobalt silicide layer, which causes a problem in that contact resistance and sheet resistance increase with high speed operation.

SUMMARY OF THE INVENTION An object of the present invention is to provide a transistor structure capable of widening the cobalt silicide layer so as to reduce the sheet resistance and the contact resistance of the transistor and a method of manufacturing the same.

A transistor according to the present invention for achieving the above object is characterized in that a cobalt silicide layer is formed on the top and sidewalls of the gate poly in a transistor in which a field oxide film, a source / drain region, and a gate poly are formed in a semiconductor substrate. The cobalt silicide layer can be formed even in the sidewall portion to increase the volume of the cobalt silicide layer, resulting in an improvement in electrical conductivity.

Preferably, the field oxide film is formed to be lower than the upper surface of the semiconductor substrate so that sidewalls are formed on the semiconductor substrates of the source and drain regions so that the cobalt silicide layer is formed.

In addition, the transistor manufacturing method according to the present invention for achieving the above object comprises the steps of providing a semiconductor substrate having a fin field oxide film, a source / drain region and a gate poly, the semiconductor substrate so that the sidewall of the fin gate poly has an exposed portion Forming spacers on the sidewalls of the gate poly from an upper surface to a predetermined height, forming a cobalt film on top of the source / drain regions and the gate poly and heat-treating to form a cobalt silicide layer, and removing the cobalt film Characterized in that.

Preferably, the step (V) comprises processing the field oxide film to a position lower than the upper surface of the semiconductor substrate to form sidewalls in the semiconductor substrate in the source and drain regions so as to have a predetermined depth to the sidewall of the semiconductor substrate by the step (V). The low cobalt silicide layer can be formed.

Hereinafter, a transistor and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

2A to 2D are cross-sectional views illustrating a process of forming a cobalt silicide layer during a transistor manufacturing process according to the present invention.

Referring to FIG. 2D, in the transistor of the present invention, the field oxide film 13, the source region 21, the drain region 23, the gate oxide film 15, and the gate poly 17 are formed on the semiconductor substrate 11. The spacer 19 is formed on the sidewall of the gate poly 17, and the cobalt silicide layers 25a, 25b, and 25c are formed on the source region 21, the drain region 23, and the gate poly 17. . Here, the field oxide film 13 is formed to be at a position lower than the upper surface of the semiconductor substrate 11. The spacer 19 is formed to be at a position lower than the upper surface of the gate poly 17.

The cobalt silicide layer 25a formed on the gate poly 17 is formed not only in the upper region of the gate poly 17 but also in the sidewall region, and the cobalt silicide layer 25b formed in the source region 21 and the drain region 23 is formed. 25c is formed on the sidewall of the semiconductor substrate 11 formed at the boundary between the source region 21, the drain region 23, and the field oxide film 13.

As described above, in the transistor structure having the cobalt silicide layer formed on the semiconductor substrate, the cobalt silicide layer formed on the source region, the drain region, and the gate poly may be formed to the sidewall portion, thereby increasing the volume of the entire cobalt silicide layer. Accordingly, sheet resistance and contact resistance can be reduced. This transistor manufacturing method will be described.

Referring to FIG. 2A, a field oxide film 13 is first formed on a semiconductor substrate 11. After the field oxide film 13 is formed, the sidewall 11a is formed on the semiconductor substrate 11 through etching so that the field oxide film 13 is positioned below the upper surface of the semiconductor substrate 11. This increases the area where Si is exposed. Usually, the etching process is performed after the formation of the field oxide film, and in this process, by increasing the selectivity or etching time, the field oxide film 13 may be lower than the top surface of the semiconductor substrate 11. The side wall 11a of the 11 may be formed.

Referring to FIG. 2B, when the formation of the field oxide film 13 is completed, the semiconductor substrate 11 is thermally oxidized to form the gate oxide film 15, and polycrystalline silicon is deposited to pattern the gate poly 17. ). The source region 21 and the drain region 23, which are diffusion layers, are formed through the ion implantation process.                     

The spacers 19 are formed from the top surface of the semiconductor substrate 11 to a predetermined height so that the sidewalls of the gate poly 17 have exposed portions 17a. After the oxide film is grown over the entire surface of the semiconductor substrate, anisotropic etching is performed to form the spacer 19. When the degree of etching is increased during the formation of the spacer 19, the spacer 19 is formed to be lower than the top surface of the gate poly 17. Can be.

2C and 2D, a cobalt film 24 is formed on the entire surface of the semiconductor substrate 11 by sputtering. The thickness of the cobalt film 24 is usually 30 nm. As a result, the source region 21, the drain region 23, and the gate poly 17 come into contact with the cobalt film 24. Then, the cobalt silicide layers 25a, 25b, and 25c are formed through a heat treatment process in which an atmospheric condition of a predetermined temperature is applied. By the heat treatment, cobalt and Si react in the source region 21, the drain 23 region, and the gate poly 17 where cobalt and Si are in contact with each other, thereby forming cobalt silicide layers 25a, 25b, and 25c. At this time, the cobalt silicide layers 25a, 25b, and 25c are formed not only on the top of the gate poly 17 but also on the sidewalls, and are formed not only on the top of the semiconductor substrate 11 but also on the sidewalls.

The cobalt film 24 is removed after the formation of the cobalt silicide layers 25a, 25b, 25c is complete. The cobalt layer which is removed with a mixed aqueous solution of ammonia and hydrogen peroxide and unreacted with a mixed aqueous solution of sulfuric acid, phosphoric acid nitrate and acetic acid is selectively etched away.

As in this embodiment, the transistor manufacturing method according to the present invention can widen the Si cross-section of the source region, the drain region, and the gate poly of the transistor, and the area in which Si is revealed in the formation of cobalt silicide is wider than in the conventional process. It is possible to increase the volume of the cobalt silicide layer. In addition, it is possible to obtain a margin of contact overlap margin due to misalignment in forming a contact leading to a subsequent process.

According to the transistor according to the present invention and the manufacturing method as described above, it can cope with high speed and high integration, and in particular, there is an advantage that can reduce the contact resistance and sheet resistance.

Claims (4)

In a transistor in which a field oxide film, a source / drain region, and a gate poly are formed in a semiconductor substrate, And a cobalt silicide layer formed on the sidewalls of the source / drain regions of the semiconductor substrate and the cobalt silicide layers formed on upper and sidewall portions of the gate poly. Having a transistor. delete Providing a semiconductor substrate having a field oxide film and a source / drain region and a gate poly; (B) forming spacers on the sidewalls of the gate poly to a predetermined height from an upper surface of the semiconductor substrate such that the sidewalls of the gate poly have exposed portions; (B) forming a cobalt film on top of the gate source / drain region and the gate poly and heat treating to form a cobalt silicide layer; And ⒟ removing the cobalt film; Method of manufacturing a transistor formed with a cobalt silicide layer comprising a. 4. The method of claim 3, wherein the step (b) comprises processing the field oxide film to a lower position than an upper surface of the semiconductor substrate.

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