KR100720255B1 - Semiconductor device and method for forming the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of forming the same, and further, a process margin for forming a recess gate region decreases as the semiconductor device becomes highly integrated, and interference between the recess gate regions in the bulb portion of the bulb type recess gate. In order to solve the problem of deterioration of the characteristics of the semiconductor device, a process of forming a recess gate region having a predetermined depth and then oxidizing a lower active region of the recess gate region and removing the oxide layer formed thereby is repeated. By expanding the recess gate region to form a corrugated sidewall of the recess gate region, the present invention can improve the electrical characteristics of the semiconductor device and the yield of the forming process.

Description

Semiconductor device and method of forming the same {SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME}

1 is a cross-sectional view showing a method of forming a semiconductor device according to the prior art.

2A to 2L are cross-sectional views illustrating a method of forming a semiconductor device in accordance with an embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of forming the same, and further, a process margin for forming a recess gate region decreases as the semiconductor device becomes highly integrated, and interference between the recess gate regions in the bulb portion of the bulb type recess gate. In order to solve the problem of deterioration of the characteristics of the semiconductor device, a process of forming a recess gate region having a predetermined depth and then oxidizing a lower active region of the recess gate region and removing the oxide layer formed thereby is repeated. By expanding the recess gate region to form a corrugated sidewall of the recess gate region, the present invention can improve the electrical characteristics of the semiconductor device and the yield of the forming process.

As the semiconductor devices are highly integrated, the line width of the gate is narrowed, and thus, the electrical characteristics of the semiconductor devices are deteriorated due to the decrease in the channel length. To overcome this, a recess gate is used. The recess gate is a technique capable of increasing the gate channel length by etching the semiconductor substrate in the gate predetermined region by a predetermined depth to increase the contact area between the active region and the gate.

However, the general gate structure has a problem in that the line width of the recess gate region must be narrow and deep. In addition, there is a problem that a leakage current occurs in the recess gate region due to misalignment between the recess gate region and the gate. Accordingly, a method of forming a bulb type recess gate region in which the recess gate region is formed in a bulb shape has been developed.

1 is a cross-sectional view showing a method of forming a semiconductor device according to the prior art.

Referring to FIG. 1, an isolation layer 30 defining an active region 20 of a semiconductor substrate 10 is formed. Next, the gate predetermined region of the active region 20 is partially etched to form a first recess gate region 40, and the lower semiconductor substrate of the first recess gate region 40 isotropically etched a predetermined depth to form a second recessed region. The recess gate region 45 is formed. As described above, the bulb-type recess gate region in which the neck-shaped first recess gate 40 and the second recess gate 45 serving as the body part are combined to form one recess gate region is formed. To form.

In the method of forming a semiconductor device according to the related art, the bulb-type recess gate region is formed to overcome the limitation of the recess gate region. However, as the semiconductor devices become more integrated, the size of the semiconductor devices may decrease, which may result in a narrower gap between the recess gate regions and a short circuit between the bulb parts. In addition, even if a short circuit does not occur, a gap between the recess gate regions is narrowed, so that parasitic capacitance is generated, thereby lowering electrical characteristics of the semiconductor device.

In order to solve the above problems, the present invention extends the recess gate region by repeatedly forming a recess gate region having a predetermined depth and then oxidizing the semiconductor substrate under the recess gate and removing the oxide layer formed thereon. It is an object of the present invention to provide a semiconductor device and a method for forming the same, wherein the sidewalls are formed in a corrugated shape.

The semiconductor device according to the present invention for solving the above technical problem is
A semiconductor substrate including an isolation layer defining an active region;

And a recess gate region in which the active region and the gate predetermined region overlap each other, and the sidewall of which is formed in a corrugated shape.

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In addition, the method of forming a semiconductor device according to an embodiment of the present invention
Forming an isolation layer defining an active region on the semiconductor substrate;
Etching the active region to a predetermined depth to form a recess gate region;
Forming a spacer on sidewalls of the recess gate region;
Oxidizing the active region under the recess gate region exposed by the spacer to form a first convex lens-type oxide layer having a predetermined thickness;
Etching the first oxide layer and exposing the active region under the recess gate region by performing a front surface etching process;
Oxidizing an active region under the exposed recess region to form a second convex lens-type oxide layer having a predetermined thickness; and
And removing the spacers and the first and second oxide layers to form extended recess gate regions having sidewalls having corrugated shapes.
The method may further include repeating an oxide layer forming process and a removing process at least twice under the second oxide layer, wherein the predetermined thicknesses of the first and second oxide layers are 20 to 200 μs, respectively. do.

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In addition, the method of forming a semiconductor device according to another embodiment of the present invention
Forming an isolation layer defining an active region on the semiconductor substrate;
Etching the active region to a predetermined depth to form a recess gate region;
Forming a spacer on sidewalls of the recess gate region;
Performing a CL'N process on an active region under the recess gate region exposed by the spacer to form a first convex lens-type first CL'N layer having a predetermined thickness;
Etching the first CL′N layer by performing a front surface etching process and exposing an active region under the recess gate region;
Performing a CL'N process on an active region below the exposed recess region to form a second convex lens-type CL'N layer having a predetermined thickness; and

And removing the spacers and the first and second CL'N layers to form extended recess gate regions whose sidewalls are corrugated.

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Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail.

2A through 2L are cross-sectional views illustrating a method of forming a semiconductor device in accordance with an embodiment of the present invention.

Referring to FIG. 2A, an isolation layer 130 defining an active region 120 is formed on the semiconductor substrate 100. In this case, the device isolation layer 130 may be formed using a shallow trench isolation (STI) process.

Referring to FIG. 2B, the pad layer 140 is formed on the entire surface of the semiconductor substrate 100. Next, a photosensitive film pattern 145 exposing the recess gate region is formed. In this case, the pad layer 140 may be formed using any one selected from an oxide film, a nitride film, and a mixed layer thereof.

Referring to FIG. 2C, the pad layer 140 is etched using the photoresist pattern 145, and the active region 120 of the predetermined region of the recess gate area is predetermined using the etched pad layer 140 pattern as a hard mask. The recess gate region 150 is formed by deep dry etching. In this case, the recess gate region 150 may be etched only at a depth of 1 to 50% of the depth of the recess gate region according to the related art. Therefore, the etching process margin for forming the recess gate region 150 may be increased.
Next, the photosensitive film pattern 145 is removed.

Referring to FIG. 2D, spacers 160 are formed on sidewalls of the pad layer 140 pattern and sidewalls of the recess gate region 150. In this case, the spacer 160 may be formed using any one selected from an oxide film and a nitride film.

Referring to FIG. 2E, the active region 120 under the recess gate region 150 exposed by the spacer 160 is oxidized to form a first oxide layer 170 having a convex lens shape. At this time, the thickness of the first oxide layer 170 is preferably 20 to 200 kPa, respectively.

Referring to FIG. 2F, the entire surface etching process is performed using the pad layer 140 pattern and the spacer 160 as barriers. In this case, the first oxide layer 170 exposed by the spacer 160 is etched and the active region 120 under the recess gate region 150 is exposed.

Referring to FIG. 2G, a second oxide layer 180 having a convex lens shape is formed on the exposed active region 120 by performing an oxidation process as performed in FIG. 2E.

Referring to FIG. 2H, the pad layer 140 pattern and the spacers 160 and the remaining first and second oxide layers 170 and 180 are removed. As a result, the sidewall of the recess gate region 150 has a corrugated shape, and an extended recess gate region 190 having a deeper depth is formed. Here, the oxidation and oxide layer removing processes performed in FIGS. 2E to 2H are repeated two or more times below the second oxide layer 180 to increase the number of wrinkles in the sidewalls of the recess gate region and to increase the number of recess gate regions. The area and depth of the can be further extended.

Referring to FIG. 2I, after forming a gate oxide layer (not shown) on the entire surface of the semiconductor substrate 100 including the extended recess gate region 190, the polysilicon may fill the extended recess gate region 190. Form layer 200.

Referring to FIG. 2J, the upper portion of the polysilicon layer 200 is planarized to form a metal layer 210 and a hard mask layer 220 thereon.

Referring to FIG. 2K, a photoresist pattern 230 defining a gate is formed on the hard mask layer 220.

Referring to FIG. 2L, after the hard mask layer 220 is patterned using the photoresist pattern 230, the metal layer 210 and the polysilicon layer are formed by an etching process using the photoresist pattern 230 and the hard mask layer 220. 200 and the gate oxide layer are etched to form a gate 240.

In addition, in the method of forming a semiconductor device according to another embodiment of the present invention, the process of oxidizing the semiconductor substrate under the recess gate region in the process of FIGS. 2E to 2L is performed by the CL′N process and the first and second CL processes. There is a method of expanding the recess gate region by forming an 'N layer.

As described above, in the method of forming a semiconductor device according to the present invention, after forming a recess gate region having a predetermined depth, the semiconductor substrate under the recess gate is oxidized, and the process of removing the convex lens-shaped oxide layer formed thereby is repeated. By doing so, the recess gate region can be expanded while its sidewalls are formed in a corrugated shape.

As described above, according to the present invention, after the recess gate region is formed, the process of oxidizing the semiconductor substrate under the recess gate and oxidizing the oxide layer formed thereon is repeated to expand the recess gate region, but the sidewalls of the recess gate region are extended. By forming the corrugated shape, the process margin for forming the conventional recess gate region can be increased, and interference between the recess gate regions in the bulb portion of the bulb-type recess gate can reduce the characteristics of the semiconductor device. You can solve the problem. Accordingly, the method of forming a semiconductor device according to the present invention can effectively increase the channel length of the gate to improve the gate threshold voltage and refresh characteristics, and provide an effect of increasing the yield of the process of forming a highly integrated semiconductor device. .

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (5)

A semiconductor substrate including an isolation layer defining an active region; And And a recess gate region formed in a region where the active region and the gate predetermined region overlap each other, and a sidewall of which is formed in a corrugated shape. Forming an isolation layer defining an active region on the semiconductor substrate; Etching the active region to a predetermined depth to form a recess gate region; Forming a spacer on sidewalls of the recess gate region; Oxidizing the active region under the recess gate region exposed by the spacer to form a first oxide layer of a convex lens type having a predetermined thickness; Performing a full surface etching process to etch the first oxide layer and to expose the active region under the recess gate region; Oxidizing an active region under the exposed recess region to form a second convex lens-type oxide layer having a predetermined thickness; And Removing the spacers and the first and second oxide layers to form extended recess gate regions whose sidewalls are corrugated. The method of claim 2, And repeating the oxide layer forming process and the removing process at least twice under the second oxide layer. The method of claim 2, The predetermined thickness of the said 1st and 2nd oxide layer is 20-200 GPa, respectively. The formation method of a semiconductor element. Forming an isolation layer defining an active region on the semiconductor substrate; Etching the active region to a predetermined depth to form a recess gate region; Forming a spacer on sidewalls of the recess gate region; Performing a CL'N process on an active region under the recess gate region exposed by the spacer to form a first convex lens-type first CL'N layer having a predetermined thickness; Performing a front surface etching process to etch the first CL′N layer and to expose an active region under the recess gate region; Performing a CL'N process on an active region below the exposed recess region to form a second convex lens-type CL'N layer having a predetermined thickness; And Removing the spacers and the first and second CL'N layers to form extended recess gate regions having pleated sidewalls thereof.

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