KR100713314B1 - Method for fabricating pmd in a semiconductor devices - Google Patents

Method for fabricating pmd in a semiconductor devices Download PDF

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KR100713314B1
KR100713314B1 KR1020050131327A KR20050131327A KR100713314B1 KR 100713314 B1 KR100713314 B1 KR 100713314B1 KR 1020050131327 A KR1020050131327 A KR 1020050131327A KR 20050131327 A KR20050131327 A KR 20050131327A KR 100713314 B1 KR100713314 B1 KR 100713314B1
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pmd
film
plasma
nitride film
liner nitride
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KR1020050131327A
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Korean (ko)
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김광수
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동부일렉트로닉스 주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32174Circuits specially adapted for controlling the RF discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG

Abstract

본 발명은 반도체 소자의 PMD 제조 방법에 관한 것이다. 즉, 본 발명에서는 반도체 소자 금속전 유전체막 제조 방법에 있어서, PMD 라이너 나이트라이드막과 PMD BPSG막 계면에 존재하는 본디드 하이드로젠의 양을 억제하여 보론의 투과를 방지시키기 위해, PMD 라이너 나이트라이드막 증착 직 후, N2 플라즈마 처리를 통해 PMD 라이너 나이트라이드막과 금속 절연막인 PMD BPSG막 계면에서의 본디드 하이드로젠을 SiN 형태로 변화시킴으로써, PMD BPSG 계면에서 보론의 이탈 현상을 억제하여 보론이 하부의 반도체 소자 층으로 침투되는 것을 방지시켜 반도체 기판상 소자의 신뢰성 및 수율의 향상을 도모할 수 있게 된다.The present invention relates to a method for manufacturing a PMD of a semiconductor device. That is, in the present invention, in the method of manufacturing a semiconductor element metal dielectric film, in order to suppress the amount of bonded hydrogen present at the interface between the PMD liner nitride film and the PMD BPSG film, PMD liner nitride is prevented. Immediately after the film deposition, the bonded hydrogen at the interface between the PMD liner nitride film and the PMD BPSG film, which is a metal insulating film, is changed to SiN form, thereby suppressing the separation of boron at the PMD BPSG interface, thereby reducing boron. It can be prevented from penetrating into the semiconductor element layer, and the reliability and yield of the element on a semiconductor substrate can be improved.

PMD, N2 플라즈마, 보론, 침투 PMD, N2 Plasma, Boron, Penetration

Description

반도체 소자의 PMD 제조방법{METHOD FOR FABRICATING PMD IN A SEMICONDUCTOR DEVICES}PCB manufacturing method of semiconductor device {METHOD FOR FABRICATING PMD IN A SEMICONDUCTOR DEVICES}

도 1은 종래 PMD 라이너 나이트라이드막과 PMD BPSG막 계면에서의 보론 투과 현상 예시도,1 is an exemplary view illustrating boron permeation at the interface of a conventional PMD liner nitride film and a PMD BPSG film.

도 2는 본 발명의 실시 예에 따른 PMD 라이너 나이트라이드막 형성 공정 수순도,2 is a flowchart of a PMD liner nitride film forming process according to an embodiment of the present invention;

도 3은 본 발명의 실시 예에 따른 PMD 증착장비에서 PMD 라이너 나이트라이드막 N2 플라즈마 처리 예시도,Figure 3 is an exemplary PMD liner nitride film N2 plasma treatment in the PMD deposition apparatus according to an embodiment of the present invention,

도 4는 본 발명의 실시 예에 따른 PMD 라이너 나이트라이드막과 PMD BPSG막 계면에서의 보론 투과 억제 현상 예시도.4 is an exemplary view illustrating a phenomenon of inhibiting boron permeation at the interface between a PMD liner nitride film and a PMD BPSG film according to an exemplary embodiment of the present invention.

<도면의 주요 부호에 대한 간략한 설명><Brief description of the major symbols in the drawings>

300 : 반도체 기판 301 : S/H 샤워헤드 300: semiconductor substrate 301: S / H shower head

306 : N2 샤워헤드 302 : SiH4+NH3 가스306: N2 showerhead 302: SiH4 + NH3 gas

304 : N2 가스 308 : 히터블록304: N2 gas 308: Heater block

본 발명은 반도체 소자 제조 방법에 관한 것으로, 특히 반도체 소자의 금속전 유전체막(Pre-Metal Dielectric : PMD) 형성에 있어서, PMD 라이너 나이트라이드막과 PMD BPSG막 계면에 존재하는 본디드 하이드로젠(bonded hydrogen)의 양을 억제하여 보론(boron)의 투과를 방지시키는 반도체 소자의 PMD 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. In particular, in forming a pre-metal dielectric (PMD) of a semiconductor device, a bonded hydrogen present at the interface between a PMD liner nitride film and a PMD BPSG film The present invention relates to a method for manufacturing a PMD of a semiconductor device which suppresses the amount of hydrogen and prevents permeation of boron.

일반적으로 반도체 제조 공정 중 PMD(Pre Metal Dielectric) liner TEOS(Tetra-Ethyl-Ortho-Silicate) 막은 게이트(Gate)의 전극인 Ti Silicide 또는 Co Silicide와 메탈(Metal)-1 층의 절연체로 사용되는 막으로, 금속 절연막인 PMD BPSG(Boron-Phosphors-Silicate-Glass)막과 하부의 폴리 실리콘(Poly-Si) 또는 실리콘(Si) 사이의 보론(Boron) 투과 현상 방지를 주목적으로 사용되었으나, 보다 조밀화된 디자인에 기인한 contact-to-gate CD 디자인상 마진(Magin)이 없어 콘텍(contact) 식각(etch) 시 게이트 전극을 비켜나 과식각(over etch)이 일어나 shark tooth 현상을 초래하는 문제점이 있었다.Generally, the PMD (Tetra-Ethyl-Ortho-Silicate) film during the semiconductor manufacturing process is used as an insulator for Ti Silicide or Co Silicide, which is a gate electrode, and a metal-1 layer. In order to prevent boron transmission between the PMD BPSG (Boron-Phosphors-Silicate-Glass) film and the lower polysilicon (Si) or silicon (Si), the main purpose is to prevent the permeation of boron. Due to the design of the contact-to-gate CD design, there is no margin, so the gate electrode is overetched during contact etching, resulting in a shark tooth phenomenon.

이를 위해 종래에는 콘텍 옥사이드 식각시 선택비(selectivity)가 커 스톱 식각(stop etch) 역할을 하는 PE(Plasma Enhanced) 나이트라이드(Nitride)를 PMD 라이너막에 적용하고 있다. To this end, conventionally, PE (Plasma Enhanced) nitride, which serves as a stop etch due to a high selectivity during contact oxide etching, is applied to the PMD liner layer.

이하 PMD 나이트라이드(Nitride)막의 생성 과정을 좀더 살펴보면, PMD 라이너 나이트라이드(liner nitride)막은 PECVD(Plasma Enhanced Chemical Vapor Deposition) 방식을 이용하여 증착하는데, SiH4와 NH3 가스를 이용하여 증착하게 된다. 상기 PECVD 나이트라이드막은 하기의 화학식1에서와 같이 반응하여 생성된다.Hereinafter, a process of generating a PMD nitride film will be described in detail. The PMD liner nitride film is deposited using a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, and is deposited using SiH 4 and NH 3 gases. The PECVD nitride film is produced by reacting as in Chemical Formula 1 below.

[화학식1][Formula 1]

3SiH4(g) + 4NH3(g) → Si3N4(s) + 12H2(g)3SiH4 (g) + 4NH3 (g) → Si3N4 (s) + 12H2 (g)

이때 상기 Si3N4의 화학량적인(Stoichiometric) 합성물(composition)인 PECVD 나이트라이드막은 화학량적인(Stoichiometric) Si3N4 구조며, 전형적으로 과도한 실리콘(Silicon)과 Si-H(Si-H, Si-H2, Si-H3), N-H(N-H, N-H2) 형태의 약 5∼35 원자(Atomic) 퍼센트(%)의 본디드 하이드로젠(bonded hydrogen)으로 구성되어 있다. 즉, 화학양론적인 실리콘 나이트라이드는 Si3N4 구조의 Si 3개와 N 4개가 정확히 양론적으로 조합한 구조이지만, PECVD 방식으로 생성되는 실리콘 나이트라이드는 비정질 구조로 Si, N, H 등이 비양론적으로 조합된 것이다. 따라서 화학량적인 Si3N4와는 구별하여 SiN 또는 SixNyHx로 지칭한다.In this case, the PECVD nitride film, which is a stoichiometric composition of Si3N4, has a stoichiometric Si3N4 structure, and typically, excessive silicon and Si-H (Si-H, Si-H2, Si-H3). ) And about 5 to 35 atomic percent (%) of bonded hydrogen in the form of NH (NH, N-H2). In other words, the stoichiometric silicon nitride is a structure in which the Si 3 N 4 and the N 4 in the Si 3 N 4 structure are precisely and stoichiometric combination, but the silicon nitride produced by the PECVD method is an amorphous structure and a combination of Si, N, H, etc. It is. Therefore, it is referred to as SiN or SixNyHx to distinguish from stoichiometric Si3N4.

한편, 위와 같은 PMD 나이트라이드막은 TEOS막에 비해 보론(Boron) 투과 억제력은 높으나 일정량의 본디드 하이드로젠(bonded hydrogen)을 포함하고 있어 여전히 일정량의 보론(boron) 투과가 발생하는 문제점이 있었다.On the other hand, the PMD nitride film as described above has a higher boron (Boron) permeability than the TEOS film, but contains a certain amount of bonded hydrogen (bonded hydrogen), there was a problem that a certain amount of boron permeation occurs.

즉, 도 1에서 보여지는 바와 같이 PMD 라이너 나이트라이드막/BPSG막의 계면(Interface)을 살펴보면, PMD 라이너 나이트라이드막 표면의 Si-H, N-H 댕글링 본드(dangling bond), BPSG막 표면의 B-P 댕글링 본드가 존재하게 되는데, PMD 라이 너 나이트라이드막 표면의 NH에 비해 상대적으로 약한 SiH 댕글링 본드가 브로큰(Broken)되어 H가 이탈된 실리콘 나이트라이드 표면에 트랩(trap)을 형성하여 B+가 생성된다. 이때 B+는 쉽게 PMD 라이너 나이트라이드막을 투과하여 하부 층으로 침투할 수 있어 PMD 층 하부 반도체 기판 트랜지스터의 특성을 변화시키는 문제점이 있었다.That is, as shown in FIG. 1, when looking at the interface of the PMD liner nitride film / BPSG film, Si-H, NH dangling bond, and BP dangling of the BPSG film surface of the PMD liner nitride film surface are examined. Ring bonds are present, and SiH dangling bonds, which are relatively weak compared to NH on the PMD liner nitride film surface, are broken, forming traps on the silicon nitride surface from which H is released. do. In this case, B + may easily penetrate the PMD liner nitride layer and penetrate the lower layer, thereby changing the characteristics of the PMD layer lower semiconductor substrate transistor.

따라서, 본 발명의 목적은 반도체 소자의 PMD 제조방법에 있어서, PMD 라이너 나이트라이드막과 PMD BPSG막 계면에 존재하는 본디드 하이드로젠의 양을 억제하여 보론의 투과를 방지시키는 반도체 소자의 PMD 제조 방법을 제공함에 있다.Accordingly, an object of the present invention is to provide a PMD manufacturing method of a semiconductor device in which the amount of bonded hydrogen present at the interface between the PMD liner nitride film and the PMD BPSG film is suppressed to prevent boron permeation. In providing.

상술한 목적을 달성하기 위한 본 발명은 반도체 소자의 금속전 유전체막 제조방법으로서, 반도체 소자의 PMD 제조방법으로서, (a)소자 분리 영역이 정의된 반도체 기판에 게이트, 소스, 드레인을 포함하는 반도체 소자를 형성하는 단계와, (b)상기 반도체 기판 상부로 SiH4+NH3를 플로우시키고 RF 플라즈마를 인가시켜 PMD 라이너 나이트라이드막인 SiN의 하부 절연막을 증착시키는 단계와, (c)상기 RF 플라즈마를 오프시키고 SiH4, NH3 잔존 가스를 펌핑하여 배출시키는 단계와, (d)상기 SiN막 증착된 반도체 기판위로 N2가스를 플로우시키고 RF 플라즈마를 인가하여 N2 플라즈마 처리를 수행하는 단계와, (e)상기 N2 플라즈마 처리된 PMD 나이트라이드막 상부로 금속 절연막인 PMD BPSG 막을 형성시키는 단계를 포함하는 것을 특징으로 한다.The present invention for achieving the above object is a method of manufacturing a metal dielectric film of a semiconductor device, a method of manufacturing a PMD of a semiconductor device, (a) a semiconductor comprising a gate, a source, a drain in a semiconductor substrate defined device isolation region Forming a device, (b) flowing SiH4 + NH3 over the semiconductor substrate and applying an RF plasma to deposit a lower insulating film of SiN, a PMD liner nitride film, (c) turning off the RF plasma Pumping and discharging the remaining gas of SiH4 and NH3, (d) flowing N2 gas onto the SiN film-deposited semiconductor substrate and applying an RF plasma to perform N2 plasma treatment, and (e) the N2 plasma And forming a PMD BPSG film, which is a metal insulating film, over the treated PMD nitride film.

이하, 첨부된 도면을 참조하여 본 발명에 따른 바람직한 실시 예의 동작을 상세하게 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the operation of the preferred embodiment according to the present invention.

도 2는 본 발명의 실시 예에 따른 PMD 라이너 나이트라이드막 증착시 N2 플라즈마 처리(plasam treatment)를 통해 PMD BPSG막 계면에 존재하는 본디드 하이드 로젠(bonded hydrogen)의 양을 억제하여 보론(boron) 투과를 방지시키는 PMD(pre-metal dielectric) 라이너 나이트라이드(liner nitride) 증착 동작 흐름을 도시한 것이다. FIG. 2 shows boron by suppressing the amount of bonded hydrogen present at the interface of the PMD BPSG through N2 plasma treatment during deposition of the PMD liner nitride layer according to an exemplary embodiment of the present invention. A pre-metal dielectric (PMD) liner nitride deposition operation flow is shown to prevent transmission.

이하 본 발명의 설명에 있어서는 설명의 편의상 도 3에서 보여지는 바와 같은 배치 타입(batch type)의 Novellus sequal PMD 증착장비에서의 PMD 라이너 나이트라이드막 증착 동작을 예를 들어 설명하기로 한다.In the following description of the present invention, a PMD liner nitride film deposition operation in a batch type Novellus sequal PMD deposition apparatus as shown in FIG. 3 will be described for convenience of description.

먼저 게이트(gate), 소스(source), 드레인(drain)을 포함하는 반도체 소자가 형성된 반도체 기판(300) 상 PMD 라이너 나이트라이드막을 증착을 위해 반도체 소자가 형성된 반도체 기판(300)을 상기 도 3에서와 같은 배치 타입(batch type)의 PMD 증착 장비의 히터 블록(heater block)(308)에 로딩(loading)시킨다(S200).First, a semiconductor substrate 300 on which a semiconductor device is formed for depositing a PMD liner nitride film on a semiconductor substrate 300 on which a semiconductor device including a gate, a source, and a drain is formed is illustrated in FIG. 3. The heater block 308 of the PMD deposition apparatus of a batch type such as (load type) is loaded (loaded) (S200).

이어 반도체 기판 PMD 라이너 나이트라이드막 생성을 위해 PMD 증착장비의 다수의 샤워 헤드(shower head)(301)를 통해 상기 히터블록(308)에 로딩되어 이동되는 반도체 소자 형성된 반도체 기판(300) 상부로 순차적으로 SiH4+NH3 가스(302)를 플로우(flow)시키고(S202), RF 플라즈마(plasma)를 인가시켜 실리콘 질화막(SiN)의 하부 절연막을 증착시킨다(S204).Subsequently, the semiconductor device 300 is loaded onto the heater block 308 through a plurality of shower heads 301 of the PMD deposition apparatus to generate the semiconductor substrate PMD liner nitride film. The SiH4 + NH3 gas 302 is flowed (S202), and an RF plasma is applied to deposit a lower insulating film of silicon nitride (SiN) (S204).

그런 후, 상기 RF 플라즈마를 오프(off)시키고 SiH4, NH3 잔존 가스(residual gas)를 펌핑(pumping)하여 배출시키고(S206), 상기 배치 타입 PMD 증착장비의 마지막 S/H 샤워헤드(306)에서는 N2 가스(304)만을 플로우시키고, RF 플라즈마를 인가하여 SiN 증착없이 S/H 샤위헤드 1-5(301)에서 반도체 기판 상 PMD 라이너 나이트라이드막으로 생성되는 SiN막 표면에 N2 플라즈마 처리(plasma treatment)를 수행시킨다(S208).Then, the RF plasma is turned off and pumped out of SiH4 and NH3 residual gas (S206), and in the last S / H showerhead 306 of the batch type PMD deposition apparatus, Flowing only N2 gas 304 and applying an RF plasma, N2 plasma treatment on the surface of the SiN film generated as a PMD liner nitride film on the semiconductor substrate in S / H Slidehead 1-5 (301) without SiN deposition. (S208).

이어 상기와 같이 반도체 소자 상부에 PMD 라이너 나이트라이드막이 증착된 후, N2 플라즈마 처리 수행된 반도체 기판(300)을 언로딩(unloading)하여 PMD 라이너 나이트라이드막 증착을 완성시킨다(S210).Subsequently, after the PMD liner nitride film is deposited on the semiconductor device as described above, the PMD liner nitride film deposition is completed by unloading the semiconductor substrate 300 subjected to N2 plasma treatment (S210).

이에 따라 상기와 같이 PMD 라이너 나이트라이드막 증착 후, N2 플라즈마 처리가 수행된 반도체 기판은, 후속한 공정에서 상기 PMD 라이너 나이트라이드막 상부로 금속 절연막인 BPSG막 증착 시, 도 4에서 보여지는 바와 같이 본디드 하이드로젠(bonded hydrogen)이 본디드 Si-N 형태로 변화되어, 상기 도 1에서와 같이 PMD BPSG막 계면에서 보론(Boron)이 이탈되는 현상이 방지되게 되어 하부 층으로 침투가 발생되지 않게 된다.Accordingly, the semiconductor substrate subjected to the N2 plasma treatment after the PMD liner nitride film deposition as described above is, as shown in FIG. 4, when the BPSG film, which is a metal insulating film, is deposited on the PMD liner nitride film in a subsequent process. Bonded hydrogen is changed to a bonded Si-N form to prevent the separation of boron at the PMD BPSG film interface as shown in FIG. 1, thereby preventing penetration into the lower layer. do.

상기한 바와 같이 본 발명에서는 반도체 소자 금속전 유전체막 제조 방법에 있어서, PMD 라이너 나이트라이드막과 PMD BPSG막 계면에 존재하는 본디드 하이드로젠의 양을 억제하여 보론의 투과를 방지시키기 위해, PMD 라이너 나이트라이드막 증착 직 후, N2 플라즈마 처리를 통해 PMD 라이너 나이트라이드막과 금속 절연막인 PMD BPSG막 계면에서의 본디드 하이드로젠을 SiN 형태로 변화시킴으로써, PMD BPSG막 계면에서 보론의 이탈 현상을 억제하여 보론이 하부의 반도체 소자 층으로 침투되는 것을 방지시켜 반도체 기판상 소자의 신뢰성 및 수율의 향상을 도모할 수 있게 된다.As described above, in the present invention, in the method of manufacturing a semiconductor element metal dielectric film, the PMD liner is used to prevent the permeation of boron by suppressing the amount of bonded hydrogen present at the interface between the PMD liner nitride film and the PMD BPSG film. Immediately after the deposition of the nitride film, the bonded hydrogen at the interface between the PMD liner nitride film and the PMD BPSG film, which is a metal insulating film, is changed to SiN form to suppress the separation of boron at the interface of the PMD BPSG film. By preventing boron from penetrating into the lower semiconductor element layer, it is possible to improve the reliability and yield of the element on the semiconductor substrate.

한편 상술한 본 발명의 설명에서는 구체적인 실시 예에 관해 설명하였으나, 여러 가지 변형이 본 발명의 범위에서 벗어나지 않고 실시될 수 있다. 특히, 본 발 명의 실시 예에서는 PMD 증착장비 중 반도체 기판 SiN막을 증착시키기 위한 다수의 S/H 샤워헤드를 가지는 NOVELLUS SEQUAL 장비에서의 동작을 예를 들어 설명하였으나, AMAT CENTURA 장비와 같은 하나의 샤워 헤드를 가지는 PMD 증착 장비에서는 반도체 기판 SiN 증착 완료 후, N2 만 플로우 시킨 상태에서 RF 플라즈마를 인가시켜 PMD 라이너 나이트라이드막 상부로 N2 플라즈마를 실시하는 등으로 변형실 시도 가능하다. 따라서 발명의 범위는 설명된 실시 예에 의하여 정할 것이 아니고 특허청구범위에 의해 정하여져야 한다.Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications may be made without departing from the scope of the present invention. Particularly, in the embodiment of the present invention, the operation of the NOVELLUS SEQUAL apparatus having a plurality of S / H showerheads for depositing a semiconductor substrate SiN film among the PMD deposition apparatus has been described as an example. In the PMD deposition apparatus having a semiconductor substrate SiN deposition is completed, the deformation chamber can be attempted by applying an RF plasma in a state where only N2 is flowed and performing N2 plasma on the PMD liner nitride film. Therefore, the scope of the invention should be determined by the claims rather than by the described embodiments.

이상에서 설명한 바와 같이, 본 발명에서는 반도체 소자 금속전 유전체막 제조 방법에 있어서, PMD 라이너 나이트라이드막과 PMD BPSG막 계면에 존재하는 본디드 하이드로젠의 양을 억제하여 보론의 투과를 방지시키기 위해, PMD 라이너 나이트라이드막 증착 직 후, N2 플라즈마 처리를 통해 PMD 라이너 나이트라이드막과 금속 절연막인 PMD BPSG막 계면에서의 본디드 하이드로젠을 SiN 형태로 변화시킴으로써, PMD BPSG막 계면에서 보론의 이탈 현상을 억제하여 보론이 하부의 반도체 소자 층으로 침투되는 것을 방지시켜 반도체 기판상 소자의 신뢰성 및 수율의 향상을 도모할 수 있는 이점이 있다.As described above, in the present invention, in the method of manufacturing a semiconductor element metal dielectric film, in order to suppress the amount of bonded hydrogen present at the interface between the PMD liner nitride film and the PMD BPSG film, the permeation of boron is prevented. Immediately after the deposition of the PMD liner nitride film, the bonded hydrogen at the interface between the PMD liner nitride film and the PMD BPSG film, which is a metal insulating film, was changed to SiN form to remove the boron at the interface of the PMD BPSG film. By suppressing the boron from penetrating the lower semiconductor element layer, there is an advantage that the reliability and yield of the element on the semiconductor substrate can be improved.

Claims (2)

반도체 소자의 PMD 제조방법으로서,As a PMD manufacturing method of a semiconductor device, (a)소자 분리 영역이 정의된 반도체 기판에 게이트, 소스, 드레인을 포함하는 반도체 소자를 형성하는 단계와,(a) forming a semiconductor device including a gate, a source, and a drain on a semiconductor substrate in which device isolation regions are defined; (b)상기 반도체 기판 상부로 SiH4+NH3를 플로우시키고 RF 플라즈마를 인가시켜 PMD 라이너 나이트라이드막인 SiN의 하부 절연막을 증착시키는 단계와,(b) depositing a lower insulating film of SiN, which is a PMD liner nitride film, by flowing SiH4 + NH3 over the semiconductor substrate and applying an RF plasma; (c)상기 RF 플라즈마를 오프시키고 SiH4, NH3 잔존 가스를 펌핑하여 배출시키는 단계와,(c) turning off the RF plasma and pumping the remaining gas out of SiH 4 and NH 3; (d)상기 SiN막 증착된 반도체 기판위로 N2가스를 플로우시키고 RF 플라즈마를 인가하여 N2 플라즈마 처리를 수행하는 단계와,(d) performing N2 plasma treatment by flowing N2 gas onto the SiN film deposited semiconductor substrate and applying RF plasma; (e)상기 N2 플라즈마 처리된 PMD 나이트라이드막 상부로 금속 절연막인 PMD BPSG 막을 형성시키는 단계(e) forming a PMD BPSG film, which is a metal insulating film, on the N2 plasma treated PMD nitride film 를 포함하는 반도체 소자의 PMD 제조방법.PMD manufacturing method of a semiconductor device comprising a. 삭제delete
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