KR100708033B1 - The substrate for semiconductor package and the method for manufacturing the same - Google Patents

Abstract

The present invention can compensate for the disadvantages of conventionally developed products by attaching a pad cut to a predetermined size from a metal foil plated surface to a surface of a carrier tape supported by a frame in a predetermined pattern. The present invention relates to a substrate for a semiconductor package capable of forming a substrate for an LG (No Leadframe-based Land Grid Array Package; No-LGA) package and a method of manufacturing the same.

Substrate, LGA, Pad, Metal Foil, Cutting, Carrier Tape, Attachment

Description

Substrate for Semiconductor Package and The Method for Manufacturing the Same}

1 is a perspective view of a substrate according to an embodiment of the present invention.

2 is a cross-sectional view taken along the line A-A of FIG.

3 is a perspective view of a substrate according to another embodiment of the present invention.

4 is a cross-sectional view taken along line B-B in FIG.

5 is a perspective view of a substrate according to another embodiment of the present invention.

6 is a flowchart illustrating a method of manufacturing a substrate for a semiconductor package according to an embodiment of the present invention.

7A to 7E show schematic diagrams at each step according to a method for manufacturing a substrate for semiconductor package according to an embodiment of the present invention.

8 is a flowchart illustrating a method for manufacturing a substrate for a semiconductor package according to another embodiment of the present invention.

9A to 9E show schematic diagrams at each step according to a method for manufacturing a substrate for semiconductor package according to another embodiment of the present invention.

10A and 10B illustrate vertical cross-sectional views of a semiconductor package in which a substrate is mounted according to an embodiment of the present invention.

<Description of the reference numerals for the main parts of the drawings>

100, 200, 300-Substrate 110, 210-Frame

120, 220-Carrier tape 130, 230, 330-Pad

131, 231-Die Pads 132, 232-Bonding Pads

133, 233-Base material 134, 234-Plating layer

The present invention relates to a substrate for a semiconductor package and a method of manufacturing the same. Particularly, a pad having a variety of pad patterns can be easily attached by attaching a pad cut to a predetermined size from a metal foil to one surface of a carrier tape supported by a frame. It relates to a substrate for a semiconductor package capable of forming a straight and a method for manufacturing the same.

In general, semiconductor packaging is formed by mounting and molding a semiconductor die on a substrate having a predetermined conductor or pad pattern formed thereon. The semiconductor package generally means that the semiconductor chip is electrically connected to the substrate and encapsulated with an encapsulant so that the semiconductor chip can be stably mounted on the motherboard. Here, the substrate is to serve as a conductor for electrically connecting the inside and the outside of the semiconductor package and to support the semiconductor die.

Substrates are used in the same type as printed circuit boards, lead frames, and circuit tapes. The printed circuit board is formed on a top surface of a resin layer, and includes a die pad on which a semiconductor die is mounted, and a bonding pad electrically connected to the semiconductor die by wire bonding and electrically connecting the semiconductor die to the outside. Briefly looking at the method of manufacturing the substrate, a photoresist layer is formed on the surface of the resin layer on which the copper thin film is formed, and an etching solution is added thereto to form a desired circuit pattern. Next, after removing the photoresist layer from the substrate, a cover coat is coated on an area except for areas corresponding to the die pad and the bonding pad. Next, a gold / nickel plating layer is formed on the exposed area through the cover coat to form a die pad and a bonding pad. Since such a substrate manufacturing method requires an etching process, there is a limit in forming various pad patterns.

In addition, the lead frame is generally formed by an etching method or a stamping method. The stamping method is a method of manufacturing a lead frame by forming a predetermined pad pattern by punching a material of thin plates sequentially transferred to a press die. Therefore, the stamping method requires a mold in order to punch in a predetermined pad pattern, and each mold is required as the pad pattern is changed. In addition, the etching method is a method of manufacturing a lead frame by etching a thin plate material with a chemical to form a predetermined pattern. Accordingly, the etching method requires a photomask for etching the thin material into the required pad pattern and requires a separate photo mask according to the pad pattern. In addition, in the case of the lead frame manufactured in this way, in order to form a die attach pad and a wire bonding pad, connecting pads (Tier bar, Inner) which mechanically connects each pad and the frame to support and maintain the pad lead is required. These leads are unnecessary for the functionality of the final semiconductor package and reduce the density of input / output terminals in the substrate.

On the other hand, in order to solve the drawbacks of such leadframe packages, a recent technology for developing a lead grid-based land grid array (No Leadframe-based Land Grid Array Package; hereinafter referred to as "NL-LGA Package") has been developed. Has been applied. The NL-LGA package can eliminate unnecessary pads and frame connecting lines in the final semiconductor package function compared to a package in which a lead frame is formed, and thus the number of input / output pads can be increased in the same package size and a desired position. The die-attach pad and the wire bonding pad may be formed in the present invention, and in particular, it is easy to manufacture a substrate for an MCC (Multi Chip Module) package that requires a large number of die-attach pads. In addition, since the thickness of the substrate is thinner than that of a conventional lead frame or a printed circuit board, there is an advantage of reducing the thickness of the final package.

Until now, as a substrate manufacturing method for implementing such NL-LGA Package, a desired pad pattern is directly formed on a copper carrier frame by plating, and a copper foil surface is plated at a desired position for etching mask and bonded to the copper foil. After bonding to a carrier using a tape, a method of manufacturing a substrate by etching a copper foil has been developed. However, all of these methods include a removal process in which the carrier is removed by etching or mechanical peeling after the molding process in the semiconductor packaging process. In addition, in the former case, since the pad is directly formed by plating, there is a relatively high cost problem, and in the latter case, due to the nature of the etching process, it is difficult to vertically form the cross section of the pad, which entails a limitation in circuit design.

In order to solve the above problems, the present invention attaches a pad cut to a predetermined size from a metal foil to a surface of a carrier tape supported by a frame to form a substrate having various pad patterns more easily. It is an object of the present invention to provide a substrate for a semiconductor substrate and its manufacturing method.

Substrate for a semiconductor package of the present invention for solving the above problems is a frame formed in a substantially flat shape, a carrier tape disposed on one side of the frame, a plurality of pads attached to any one surface of the carrier tape Characterized in that it comprises a.

In addition, in the present invention, the frame has at least one attachment hole formed through the area where the pad pattern required to form at least one semiconductor package can be formed, and the pad has a carrier tape surface exposed by the attachment hole. It can be attached to the formed. In addition, a plurality of attachment holes may be formed to be attached to the frame at predetermined intervals to a size to which a pad pattern necessary for forming at least one semiconductor package is attached.

In addition, in the present invention, the pad may be attached to an opposite surface of the surface to which the frame is attached in the carrier tape. In addition, the pad may include a bonding pad attached to the carrier tape in a predetermined pattern around a region on which the semiconductor die is seated. The pad may include a die pad and a wire bonded to the upper surface of the semiconductor die. It may be formed including a bonding pad. In addition, the pad may be formed by cutting to a predetermined size from a metal foil of a predetermined area. At this time, the metal foil is made of a copper metal plate, a conductive plating layer for wire bonding or solder joint is formed on at least one surface, the conductive plating layer is any one of gold / nickel, gold, tin, silver, nickel / palladium / gold It may be made of one plating layer.

In addition, according to the present invention, a method for manufacturing a substrate for a semiconductor package includes a frame providing step of providing a frame formed in a substantially flat plate shape, a carrier tape arrangement step of adhering a carrier tape to one surface of the frame, and a metal foil. A plating layer forming step of forming a conductive plating layer on at least one surface of the pad, a pad cutting step of cutting the metal foil into pads of a predetermined shape, and a pad attaching step of attaching the pad to the carrier tape in a predetermined pattern. . In this case, the frame providing step may be such that the frame is formed in a substantially flat plate shape, the attachment holes penetrating a predetermined area are arranged at predetermined intervals. In addition, the plating layer forming step may be formed to form a plating layer of any one of gold / nickel, gold, tin, silver, nickel / palladium / gold on at least one surface of the metal foil.

In addition, the pad cutting step in the present invention may be made to cut the pad to a size corresponding to the bonding pad to which the wire is bonded. In addition, the pad cutting step may be made to cut to a size corresponding to the bonding pad to which the wire is bonded and a size corresponding to the die pad to which the semiconductor die is seated. In addition, the pad cutting step may be made to cut the metal foil into pads of a predetermined size by sawing cutting or laser cutting.

In addition, the pad attaching step in the present invention may be made to attach the pad to the opposite side of the surface to which the frame is attached on the carrier tape by a pick and place device. In addition, the pad attaching step may be made so that the pad is attached to the carrier tape surface exposed to the attachment hole.

Hereinafter, the substrate for a semiconductor package according to the present invention through the accompanying drawings and embodiments will be described in detail. 1 is a perspective view of a substrate for a semiconductor package according to an embodiment of the present invention. 2 is a cross-sectional view taken along the line A-A of FIG.

Referring to FIGS. 1 and 2, the substrate 100 for semiconductor package according to an exemplary embodiment of the present invention includes a frame 110, a carrier tape 120, and a plurality of pads 130.

The substrate 100 is formed by attaching a pad 130 having a predetermined size to a surface of a carrier tape 120 supported by the frame 110 in a predetermined pad pattern. Here, the pad pattern means a unit pattern of a pad required to form one semiconductor package.

The frame 110 is formed in a substantially plate shape having a predetermined area and thickness. The frame 110 is preferably formed of a metal plate, and may be formed of various metal plates such as a nickel metal plate or an aluminum metal plate. In addition, the frame 110 may also be formed of a material such as plastic.

The carrier tape 120 is formed of a tape having an adhesive layer 120a formed on at least one surface thereof, and is disposed on one surface of the frame 110. Therefore, the carrier tape 120 is formed with an area corresponding to the area of the frame 110. The carrier tape 120 is fixed to the frame 110 by a separate bonding means when the adhesive layer 120a is formed on one surface. In addition, when the adhesive layers 120a and 120b are formed on both surfaces, the carrier tape 120 is fixed to the frame 110 by the adhesive layer 120b on the other side.

The pad 130 is bonded to a die pad 131 on which a semiconductor die (not shown in FIG. 10A) is seated, and a wire (not shown in FIG. 10, see FIG. 10A) is bonded to the die pad 131. It is formed by including a plurality of bonding pads 132 attached to the peripheral area in a predetermined pattern. The pad 130 is formed by being attached in a predetermined pad pattern according to the design of the semiconductor package in which the substrate 100 is used, and a plurality of pad patterns necessary for forming one semiconductor package are formed on the carrier tape 120 at predetermined intervals. It can be arranged in dogs. The pad 130 is attached to the carrier tape 120 opposite to the surface on which the frame 110 is disposed.

The die pad 131 and the bonding pad 132 of the pad 130 are formed to include a substrate 133 and a plating layer 134 formed on at least one surface of the substrate 133, respectively. The substrate 133 is preferably formed of a copper metal, but the material is not limited thereto and various metal materials may be used. The plating layer 134 is formed of a plating layer such as gold / nickel, gold, tin, silver, nickel / palladium / gold, and is formed of a plating layer for wire welding or solder joint performed on a pad. The pad 130 may be formed by cutting a predetermined size from at least one metal foil having a plating layer 134 formed on one surface thereof.

Next, a substrate for semiconductor package according to another embodiment of the present invention will be described. 3 is a perspective view of a substrate for a semiconductor package according to another embodiment of the present invention. 4 is a cross-sectional view taken along line B-B in FIG. Hereinafter, the substrate straight substrate 200 according to another embodiment of the present invention will be described in terms of differences from the substrate 100 according to the embodiments of FIGS. 1 and 2, and the same parts thereof will be described. Omit the description.

Referring to FIGS. 3 and 4, the substrate 200 for semiconductor package according to another exemplary embodiment of the present invention includes a frame 210, a carrier tape 220, and a plurality of pads 230. The substrate 200 is formed by attaching a pad 230 having a predetermined size to a surface to which the frame is attached in the carrier tape 220 supported by the frame 210 in a predetermined pattern.

The frame 210 is formed in a substantially plate shape having a predetermined area and thickness, and is formed with at least one attachment hole 212. The attachment hole 212 may be formed by penetrating one surface and the other surface of the frame 210 to a predetermined size, and a plurality of attachment holes 212 may be formed at predetermined intervals. The attachment hole 212 exposes a predetermined area of the carrier tape 220 when the frame 210 is attached to the carrier tape 220 and accommodates the pad 230 attached to the exposed area. Therefore, the attachment hole 212 is formed to have a size to which at least one pad pattern required to form one semiconductor package is attached, and according to the design of the semiconductor package or the design of the substrate 200, The pad pattern required to be formed is formed to a size to which a plurality of pad patterns can be attached. The frame 210 is formed of a metal plate, preferably, a copper metal plate that can be easily removed by chemical etching. In addition, the frame may be formed of a material such as plastic, of course.

The carrier tape 220 is formed of a plate-shaped tape having an adhesive layer 220a formed on one surface thereof, and is attached to the frame 210. The carrier tape 220 is attached to the frame 210 by an adhesive layer 220a formed on one surface thereof, and the pad 230 is exposed to the adhesive layer 220a exposed through the attachment hole 212 of the frame 210. Is attached. That is, the carrier tape 220 is attached to the frame 210 and the pad 230 to the adhesive layer 220a formed on one surface. Therefore, the carrier tape 220 does not have to have a separate adhesive means for attaching the frame 210 or the pad 230 in addition to the adhesive layer 220a formed on one surface.

The pad 230 includes a die pad 231 on which a semiconductor die is mounted, and a plurality of bonding pads 232 bonded to the wire and attached to a peripheral area of the die pad 231 in a predetermined pattern. In addition, the die pad 231 and the bond pad 232 are formed to include a substrate 233 and a plating layer 234 formed on at least one surface of the substrate 233, respectively. The plating layer 234 is formed of a plating layer such as gold / nickel, gold, tin, silver, nickel / palladium / gold. The pad 230 is attached to the carrier tape 220 on one surface on which the frame 210 is disposed. The die pad 231 and the bonding pad 232 of the pad 230 are attached to the inner region of the attachment hole 212 in a predetermined pad pattern according to the design of the semiconductor package in which the substrate 200 is used. In addition, the pads 230 may be formed by arranging a plurality of pad patterns necessary to form one semiconductor package in a region of one attachment hole 212 at a predetermined interval.

Next, a substrate for a semiconductor package according to another embodiment of the present invention will be described. 5 is a perspective view of a substrate for a semiconductor package according to another embodiment of the present invention. Hereinafter, the substrate straight substrate 300 according to another embodiment of the present invention will be described in terms of differences from the substrate 100 according to the exemplary embodiments of FIGS. 1 and 2, and the same parts will be described in detail. Reference numerals are used and detailed descriptions thereof are omitted.

Referring to FIG. 5, the substrate straight substrate 300 according to another embodiment of the present invention is formed to include a frame 110, a carrier tape 120, and a plurality of pads 330.

The pad 330 includes a bonding pad 132 to which wires are bonded. Thus, the substrate 300 does not have a die pad on which a semiconductor die is mounted. The pad 330 is formed to include a substrate 133 and a plating layer 134 formed on at least one surface of the substrate 133. Accordingly, when the substrate 300 is applied to the semiconductor package, the semiconductor die is directly attached to the carrier tape 120 or attached to the carrier tape 120 through die attach. Meanwhile, the substrate 300 may also be applied to the frame 210 and the carrier tape 220 of FIGS. 3 and 4. That is, the pad 330 of the substrate 300 may be bonded to the upper portion of the carrier tape 220 of FIGS. 3 and 4 to form a substrate.

Next, a method for manufacturing a substrate for a semiconductor package according to an embodiment of the present invention will be described. 6 is a flowchart illustrating a method of manufacturing a substrate for a semiconductor package according to an embodiment of the present invention. 7A to 7E show schematic diagrams at each step according to a method for manufacturing a substrate for semiconductor package according to an embodiment of the present invention.

6 and 7a to 7e, the frame providing step (S110), the carrier tape arrangement step (S120) and the plating layer forming step (S130) and It comprises a pad cutting step (S140) and a pad attaching step (S150). The method of manufacturing a substrate for a semiconductor package is a method of manufacturing the substrate 100 for a semiconductor package shown in FIGS. 1 and 2.

In the frame providing step S110, referring to FIG. 7A, a frame formed in a substantially flat plate shape is provided. The frame 110 may be a metal plate or a plastic plate having a predetermined area in which pad patterns according to the number of semiconductor packages to be formed on one substrate 100 may be formed.

In the carrier tape arrangement step (S120), referring to FIG. 7B, the carrier tape 120 is attached to one surface of the frame 110. The carrier tape 120 is formed with an area corresponding to the area of the frame 110. The adhesive tape 120a is formed on at least one surface of the carrier tape 120. Therefore, when the adhesive layer 120a is formed on one surface of the carrier tape 120, the carrier tape 120 is adhered to the frame 110 by a separate adhesive means. In addition, when the adhesive layers 120a and 120b are formed on both sides of the carrier tape 120, the adhesive layer 120b is bonded to the frame 110 by the adhesive layer 120b of the other surface.

In the plating layer forming step (S130), referring to FIG. 7C, a plating layer is formed on at least one surface of a metal foil formed of a substrate of a pad. The metal foil forming the substrate 133 is preferably made of copper metal having excellent properties for conducting wires of electronic products, and the plating layer 134 may be formed of gold / nickel, gold, tin, silver, nickel / palladium / gold. It is formed of the same plating layer.

In the pad cutting step (S140), referring to FIG. 7D, a metal foil 130a having a plating layer formed on at least one surface thereof is cut into a pad having a predetermined shape. The pad 130 is formed by cutting to a predetermined size from the metal foil 130a according to the design of the semiconductor package to which the substrate 100 is applied. Therefore, when the pad 130 is formed of the die pad 131 and the bonding pad 132, the pad 130 is cut into a corresponding size. In this case, the die pad 131 and the bonding pad 132 may be cut to a size corresponding to the one metal foil 130a, and the die pad 131 and the bonding pad 132 may be formed from separate metal foils. It may be formed by cutting to a size corresponding to the. The metal foil 130a is cut by a method of sawing cutting or laser cutting to form the pads 131 and 132. At this time, the metal foil (130a) is provided with a separate support means (a) on the lower surface to prevent the arrangement of the pad 130 is cut. The supporting means (a) is provided to be cut so that the arrangement of the pads 131 and 132 is not disturbed. The support means (a) is formed on the surface by vacuum suction means such as those used in semiconductor chucks or mounting tapes used in the wafer sawing cutting process of semiconductor packaging.

In the pad attaching step S150, referring to FIG. 7E, the pad 130 cut to a predetermined size in the pad cutting step S140 is attached to one surface of the carrier tape 120 in a predetermined pattern. The pad 130 is attached to the carrier tape 120 in a predetermined pattern using a pick and place device (or a pickup device). In more detail, the pick and place device is vacuum-adsorbed each of the cut pads to be lifted from the support means to move to the upper portion of the carrier tape 120, and is pressed to a predetermined position of the carrier tape 120 by a predetermined pressure. The pick and place device is a device generally used to move a semiconductor die in the semiconductor field, and a detailed description thereof will be omitted. The pick and place device attaches the die pad 131 and the bonding pad 132 to a predetermined position according to the design of the semiconductor package.

Running is described with respect to a substrate manufacturing method for a semiconductor package according to another embodiment of the present invention. 8 is a flowchart illustrating a method for manufacturing a substrate for a semiconductor package according to another embodiment of the present invention. 9A to 9E show schematic diagrams at each step according to a method for manufacturing a substrate for semiconductor package according to another embodiment of the present invention. Hereinafter, a method for manufacturing a substrate for a semiconductor package according to another embodiment of the present invention will be described based on differences from the method for manufacturing a substrate according to the embodiments of FIGS. 6 and 7A to 7E. The description is omitted.

In the method of manufacturing a substrate for a semiconductor package according to another embodiment of the present invention, referring to FIGS. 8 and 9A to 9E, a frame providing step (S210), a carrier tape arrangement step (S220), and a plating layer forming step (S230) And a pad cutting step (S240) and a pad attaching step (S250). The method for manufacturing a substrate for a semiconductor package is a method for manufacturing the substrate 200 for a semiconductor package shown in FIGS. 3 and 4.

9A, the frame providing step (S210) is a step of providing a frame having an attachment hole having a predetermined size in a substantially flat plate shape. As the frame 210, a metal plate having a predetermined area is used according to the number of semiconductor packages to be formed on one substrate 200. In the frame 210, an attachment hole 212 penetrating one surface and the other surface is formed to a predetermined size. The attachment hole 212 is formed to have an area corresponding to a pad pattern required to form at least one semiconductor package. Therefore, the attachment hole 212 may be formed in a predetermined size so that a plurality of pad patterns required to form one semiconductor package may be formed according to the design of the substrate 200. In addition, a plurality of attachment holes 212 may be formed in the frame 210 at predetermined intervals.

In the carrier tape arrangement step (S220), referring to FIG. 9B, the carrier tape 220 is attached to one surface of the frame 210. The carrier tape 220 is formed with an area corresponding to the area of the frame 210. The adhesive tape 220a is formed on one surface of the carrier tape 220, and the frame 210 is attached to the adhesive layer 220a and fixed to the carrier tape 220. Thus, the carrier tape 220 is exposed through the attachment hole 212, the adhesive layer (220a).

In the plating layer forming step (S230), referring to FIG. 9C, a plating layer is formed on at least one surface of a metal foil formed of a substrate of a pad. The metal foil forming the base 233 is preferably a copper metal having excellent properties for the conducting wire of electronic products, and the plating layer 234 may be formed of gold / nickel, gold, tin, silver, nickel / palladium / gold. It is formed of the same plating layer.

The pad cutting step (S240) is a step of cutting a metal foil having a plating layer formed on at least one surface into a pad. The pad 230 is formed to a predetermined size according to the design of the semiconductor package to which the substrate 200 is applied. Therefore, when the pad 230 is formed of the die pad 231 and the bonding pad 232, the pad 230 is cut into respective sizes. In this case, the metal foil may be cut and formed to have a size corresponding to the die pad 231 and the bonding pad 232 in one metal foil, and may correspond to the die pad 231 and the bonding pad 232 in a separate metal foil. It can be cut to size and formed. The metal foil is cut by having a separate support means (a) on the bottom surface thereof so that the arrangement of the pads 230 is not disturbed.

The pad attaching step (S250) is a step of attaching the pad 230 cut to a predetermined size in a pad cutting step (S240) to one surface of the carrier tape 220 in a predetermined pattern. The pad 230 is attached to the carrier tape 220 exposed through the attachment hole 212 of the frame 210 in a predetermined pad pattern. The cut pad 230 is attached to the carrier tape 220 in a predetermined pattern using a pick and place device.

The following is a cross-sectional view of a semiconductor package formed using a substrate according to an embodiment of the present invention. 10A and 10B illustrate vertical cross-sectional views of a semiconductor package in which a substrate is mounted according to an embodiment of the present invention.

The semiconductor package 10a illustrated in FIG. 10A is a semiconductor package formed by using the substrate according to FIGS. 1 and 2. The semiconductor package 10a is bonded to a semiconductor die 20 seated on a die pad 131 by a separate die attach and a wire 30 electrically connected to the semiconductor die 20. The pad 132 and the semiconductor die 20, the wire 30, and the molding part 40 may be formed to include the pad 130 as a whole. The semiconductor package 10a is formed by molding the upper surface of the carrier tape 120 of the substrate 100, and then the carrier tape 120 and the frame 110 are removed. When the carrier tape 120 and the frame 110 are removed from the semiconductor package 10a, the die pad 131 and the bonding pad 132 are exposed to the outside and are electrically connected to and mounted on another substrate.

The semiconductor package 10b illustrated in FIG. 10B is a semiconductor package formed by using the substrate according to FIG. 5. The semiconductor package 10b may have a semiconductor die attached directly to the carrier tape 120 or may be attached by a die attach technique, and a wire 30 electrically connected to the semiconductor die 20 may be bonded to the bonding pad 132. It is bonded to and formed. The semiconductor die 20, the wire 30, and the pad 330 are molded by the molding part 40 as a whole. The semiconductor package 10b is formed by molding the upper surface of the carrier tape 120 of the substrate 100, and then the carrier tape 120 and the frame 110 are removed. When the carrier tape 120 and the frame 110 are removed, the semiconductor package 10b exposes the semiconductor die 20 and the bonding pad 132 to the outside and is electrically connected to another substrate through the bonding pad 132. It is mounted.

Meanwhile, the semiconductor package illustrated in FIGS. 10A and 10B may be formed using the substrate 200 according to the embodiments of FIGS. 3 and 4.

As described above, the present invention is not limited to the specific preferred embodiments described above, and any person having ordinary skill in the art to which the present invention pertains without departing from the gist of the present invention claimed in the claims. Various modifications are possible, of course, and such changes are within the scope of the claims.

According to the present invention, the die pad and the bonding pad are cut from the metal foil and attached to the carrier tape to form a pad pattern, thereby using copper foil as compared to a method of directly forming a desired pad pattern on a copper carrier frame by plating. There is an effect that can be lowered.

In addition, according to the present invention, the copper foil is coated on the surface of the existing copper foil at a desired position for the etching mask, and the copper foil is bonded to the carrier using an adhesive tape, and then the copper foil is etched to form a pad pattern. Since the pad is manufactured by cutting the cross section, the final pad cross-sectional shape is formed at right angles, thereby reducing the constraint on the circuit design.

In addition, according to the present invention, since the time from design to manufacture of the substrate is very short, there is an effect that it is possible to easily manufacture the substrate of an urgently necessary prototype during the process of developing a semiconductor package.

In addition, according to the present invention, a company that performs semiconductor packaging has an effect of forming a semiconductor package by directly manufacturing the necessary substrate.

Claims (17)

The frame is formed in a substantially flat shape A carrier tape disposed on one side of the frame; Substrates for semiconductor packages comprising a plurality of pads attached to any one surface of the carrier tape. The method of claim 1, The frame has at least one attachment hole formed through the area in which the pad pattern required to form the at least one semiconductor package can be formed, And the pad is attached to a carrier tape surface exposed by the attachment hole. The method of claim 2, The attachment hole is a substratum for the semiconductor package, characterized in that the plurality of pads are formed to be attached to the frame at a predetermined interval to a size that can be attached to the pad pattern required to form at least one semiconductor package. The method of claim 1, And the pad is attached to a surface opposite to a surface to which the frame is attached to the carrier tape. The method of claim 1, The pad includes a bonding pad attached to the carrier tape in a predetermined pattern around a region where the semiconductor die is seated. The method of claim 1, And the pad is formed by including a die pad on which the semiconductor die is seated on an upper surface and a bonding pad to which a wire is bonded. The method according to claim 2 or 4, The pad is a substrate for a semiconductor package, characterized in that formed by cutting to a predetermined size from a metal foil of a predetermined area. The method of claim 7, wherein The metal foil is made of a copper metal plate, a substrate for a semiconductor package, characterized in that the conductive plating layer is formed on at least one surface. The method of claim 8, The conductive plating layer is a substrate for a semiconductor package, characterized in that the plating layer of any one of gold / nickel, gold, tin, silver, nickel / palladium / gold. A frame providing step of providing a frame formed in a substantially flat plate shape; Carrier tape arrangement step of attaching the carrier tape to any one surface of the frame; A plating layer forming step of forming a conductive plating layer on at least one surface of the metal foil; A pad cutting step of cutting the metal foil into pads of a predetermined shape; And attaching the pad to the carrier tape in a predetermined pattern. The method of claim 10, The frame providing step is a method of manufacturing a substrate for a semiconductor package, characterized in that the frame is formed in a substantially flat plate shape, the attachment holes penetrating a predetermined area are arranged at predetermined intervals. The method of claim 10, The plating layer forming step is a method of manufacturing a substrate for a semiconductor package, characterized in that the plating layer of any one of gold / nickel, gold, tin, silver, nickel / palladium / gold is formed on at least one surface of the metal foil. . The method of claim 10, The pad cutting step is a substrate manufacturing method for a semiconductor package, characterized in that for cutting the pad to a size corresponding to the bonding pad to which the wire is bonded. The method of claim 10, The method of manufacturing a substrate for a semiconductor package is characterized in that the step of cutting the pad is made to cut each of the size corresponding to the bonding pad to which the wire is bonded and the die pad to which the semiconductor die is seated. The method according to claim 13 or 14, The pad cutting step is a method of manufacturing a substrate for a semiconductor package, characterized in that for cutting the metal foil into a pad of a predetermined size by sawing cutting (laser cutting) or laser cutting (laser cutting). The method of claim 10, The pad attaching step And the pad is attached to a surface opposite to the surface to which the frame is bonded on the carrier tape by a pick and place device. The method of claim 11, The pad attaching step And the pad is attached to a carrier tape surface exposed by the attachment hole.

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