KR100685821B1 - Organic electroluminescent display device - Google Patents

Abstract

An organic electroluminescent display device capable of reducing power consumption by controlling a main display panel displaying a main image and a sub display panel displaying a sub image to not be driven simultaneously is disclosed. The organic electroluminescent display according to the present invention can control the main scan driver and the sub scan driver not to be driven simultaneously by using the enable signal. In addition, the main display panel and the sub display panel can be controlled to not be driven at the same time. Further, power consumption of the organic EL display device is reduced by driving only the main display panel when the main scan driver is driven and driving only the sub display panel when the sub scan driver is driven.

Description

Organic Electroluminescent Display {ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE}

1 is a cross-sectional view illustrating a structure of a general organic electroluminescent device for explaining a light emitting principle of an electroluminescent display.

2 is a block diagram illustrating an organic light emitting display device according to a first embodiment of the present invention.

3 is a circuit diagram illustrating a first embodiment of the pixels illustrated in FIG. 2.

4 is a circuit diagram illustrating a second embodiment of the pixels illustrated in FIG. 2.

FIG. 5 is a circuit diagram illustrating a third embodiment of the pixels illustrated in FIG. 2.

FIG. 6 is a circuit diagram illustrating a fourth embodiment of the pixels illustrated in FIG. 2.

7 is a block diagram illustrating an organic light emitting display device according to a second embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

102: main display panel 104: sub display panel

106: main scan driver 108: sub scan driver

110: data driver 116: timing controller

112, 114: Pixel 118: Inverter

120: pixel driving circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electroluminescent display, and more particularly, to an organic electroluminescent display that can reduce power consumption by controlling a main display panel displaying a main image and a sub display panel displaying a sub image not to be driven at the same time. will be.

Electro-Luminescent Display Device (hereinafter referred to as 'organic EL display device') is a self-luminous device that displays an image by emitting a phosphor by recombination of electrons and holes, and an inorganic EL using an inorganic compound as its phosphor. It is roughly classified into an organic EL display device using a display device and an organic compound. The EL display device is expected to be a next generation display device because it has many advantages such as low voltage driving, self-luminous, thin film type, wide viewing angle, fast response speed and high contrast. Among these, the organic EL display device can display an image with a high luminance of tens of thousands [cd / m 2] at a voltage of about 10 V and around, and is applied to most EL display devices that are commercially available.

1 is a cross-sectional view illustrating a general organic light emitting cell structure for explaining a light emitting principle of an organic EL display device.

Referring to FIG. 1, an organic light emitting cell includes an electron injection layer (EIL) and an electron transport layer stacked between a metal electrode (Metal), which is a cathode, and an indium tin oxide (ITO), which is an anode. ETL, EML, Hole Transport Layer (HTL), and Hole Injecting Layer (HIL).

When a voltage is applied between the transparent electrode ITO and the metal electrode, electrons generated from the metal electrode move toward the emission layer EML through the electron injection layer EIL and the electron transport layer ETL. In addition, holes generated from the transparent electrode ITO move toward the emission layer EML through the hole injection layer HIL and the hole transport layer HTL. Accordingly, in the light emitting layer EML, electrons and holes supplied from the electron transport layer ETL and the hole transport layer HTL collide and recombine to transition to the ground state from an excited state, and generate light. Is emitted to the outside to display an image.

The organic light emitting cell may be driven by a passive matrix method and an active matrix method using a thin flim transistor (TFT). Here, the passive matrix method is to form the transparent electrode (ITO) and the metal electrode (Metal) orthogonal and to select a line to drive, the active matrix method is connected to each pixel electrode of the TFT and the capacitor to the capacitance of the capacitor It is a drive system to maintain the voltage by. Among them, most organic EL displays are driven by an active driving method because a large instantaneous luminance is required when driving the organic light emitting cells by the passive matrix method, and thus a lot of power is consumed and the lifespan of the organic light emitting cells is reduced. .

Such active-driven organic EL display devices are used in various fields such as mobile phones, PDAs, and electronic dictionaries. In particular, the spread of organic EL display devices employing display panels having different sizes as mains and subs is increasing. However, in the conventional organic EL display device, since the main display panel displaying the main image and the sub display panel displaying the sub image are driven simultaneously, the power consumption is high and the battery for supplying power to the organic EL display device is fast There is a problem in that it is inconvenient to be discharged in a portable use.

SUMMARY OF THE INVENTION An object of the present invention for solving the above problems is to provide an organic EL display device which can reduce power consumption by controlling the main display panel displaying the main image and the sub display panel displaying the sub image not to be driven at the same time. .

In order to achieve the above object, in the organic electroluminescent display according to the present invention, a plurality of main pixels are formed in an area where main gate lines, data lines, and main enable signal lines cross each other. A main display panel for displaying the; A sub display panel configured to display a plurality of sub pixels in a region where the sub gate lines, the data lines, and the sub enable signal lines cross each other; A main scan driver for sequentially selecting a plurality of main pixels by applying a selection signal to the main gate lines; A sub scanning driver for sequentially selecting a plurality of sub pixels by applying a selection signal to the sub gate lines; A data driver for supplying a main or sub data signal to the data lines; And a timing controller for selectively controlling driving of the main scan driver or the sub scan driver, and outputting an enable signal for selectively controlling image display of the main display panel or the sub display panel.

The organic electroluminescent display further includes an inverter for inverting the enable signal output from the timing controller.

In addition, the organic electroluminescent display according to the present invention has a plurality of main pixels formed in an area where main data lines, main gate lines, and main enable signal lines intersect, and a main for displaying a main image. Display panel; A sub display panel having a plurality of sub pixels formed in an area where sub data lines, sub gate lines, and sub enable signal lines intersect, and displaying a sub image; A scan driver for selecting the plurality of main or sub pixels by applying a selection signal to the main or sub gate lines; A data driver for supplying a data signal to the main or sub data lines; And a timing controller for outputting an enable signal for selectively controlling image display of the main display panel and the sub display panel.

The organic electroluminescent display further includes an inverter for inverting the enable signal output from the timing controller.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First embodiment

2 is a block diagram showing an organic EL display device according to a first embodiment of the present invention.

Referring to Fig. 2, the organic EL display device according to the first embodiment of the present invention includes a main display panel 102 for displaying a main image and a sub display panel 104 for displaying a sub image. ), A data driver 110 for driving data lines DL1 to DLm formed on the main display panel 102 and the sub display panel 104, and main gate lines formed on the main display panel 102. A main scan driver 106 for driving the GL1 to GLn, a sub scan driver 108 for driving the sub gate lines GL1 to GLk formed on the sub display panel 104, and the main scan driver 106, a timing controller 116 for controlling the driving of the sub scan driver 108 and the data driver 110. The organic EL display device according to the first embodiment of the present invention further includes an inverter 118 for inverting an enable signal (EN) signal supplied from the timing controller 116.

The main display panel 102 includes a plurality of main pixels 112 formed in an area where the main gate lines GL1 to GLn and the data lines DL1 to DLm cross each other. In addition, the main display panel 102 has an enable signal line ENSL to which the enable signal EN ′ inverted by the inverter 118 is applied. The enable signal line ENSL is commonly connected to the plurality of main pixels 112. Accordingly, the main display panel 102 is selectively driven according to the state of the inverted enable signal EN '.

The sub display panel 104 includes a plurality of sub pixels 114 formed in an area where the sub gate lines GL1 to GLk and the data lines DL1 to DLm cross each other. In addition, the sub display panel 102 has an enable signal line ENSL to which the enable signal EN is applied. The enable signal line ENSL is commonly connected to the plurality of sub pixels 114. Accordingly, the sub display panel 104 is selectively driven according to the state of the enable signal EN.

In this case, the main or sub pixels 112 and 114 are connected to the main lines from the data lines DL1 to DLm when a selection signal is supplied to the main gate lines or the sub gate lines GL1 to GLn or GL1 to GLk. Alternatively, the sub image data signal is supplied to generate light corresponding to the data signal to display a predetermined image. Here, the main and sub pixels 112 and 114 formed in the main display panel 102 and the sub display panel 104 have the same structure. In addition, the data lines DL1 to DLm formed on the main display panel 102 and the sub display panel 104 are commonly connected to receive a data signal from one data driver 110. The main and sub pixels 112 and 114 will be described in detail later.

The main display panel 102 and the sub display panel 104 are selectively driven according to the enable signal EN supplied from the timing controller 116. That is, when the enable signal EN supplied from the timing controller 116 is in the high state, the enable signal EN inverted to the low state by the inverter 116 is displayed on the main display panel 102. EN '), and the enable signal EN in a high state is supplied to the sub display panel 104 as it is. Accordingly, when the main display panel 102 is driven by the enable signal EN 'inverted to the low state, the sub display panel 104 is not driven and the main display panel 102 is not driven. When not driven, the sub display panel 104 is driven. That is, the main display panel 102 and the sub display panel 104 are not driven at the same time. At this time, even when the enable signal EN in a low state is supplied from the timing controller 116, the main display panel 102 and the sub display panel 104 are enabled signals having different states by the same method. Since EN is supplied, only one of the two drives.

The data driver 110 converts the digital data signals R, G, and B data input from the timing controller 116 into analog data signals using gamma voltages. The data driver 110 may include the data lines DL1 in which the analog data signal is commonly formed on the main and sub display panels 102 and 104 in response to the data control signal DDC supplied from the timing controller 116. Through DLm) to the main display panel 102 and the sub display panel 104 selectively. That is, the data driver 110 supplies an analog data signal to the data lines DL1 to DLm of the display panel 102 or 104 driven by the enable signal EN supplied from the timing controller 116. .

The main scan driver 106 is driven simultaneously with the main display panel 102 according to the state of the enable signal EN ′ inverted by the inverter 118. That is, if the inverted enable signal EN 'is applied to the enable signal line ENSL of the main display panel 102 and the main display panel 102 is driven, the main scan driver 106 is also driven. On the contrary, if the inverted enable signal EN 'is applied to the enable signal line ENSL of the main display panel 102 and the main display panel 102 is not driven, the main scan driver 106 is also not driven. Do not. The main scan driver 106 supplies a selection signal to the main gate lines GL1 to GLn of the main display panel 102 in response to the gate control signal GDC supplied from the timing controller 116. .

The sub scan driver 108 is driven simultaneously with the sub display panel 104 according to the state of the enable signal EN supplied from the timing controller 116. That is, when the enable signal EN is applied to the enable signal line ENSL of the sub display panel 104 to drive the sub display panel 104, the sub scan driver 108 is also driven. If the enable signal EN is applied to the enable signal line ENSL of the sub display panel 104 and the sub display panel 104 is not driven, the sub scan driver 108 is also not driven. The sub scan driver 108 supplies a selection signal to the gate lines GL1 to GLk of the sub display panel 104 in response to the gate control signal GDC supplied from the timing controller 116.

The timing controller 116 is a data control signal for controlling the data driver 110 by using synchronization signals (vertical synchronization signal, horizontal synchronization signal, etc.) supplied from an external system (for example, a graphics card). (DDC) and a gate control signal GDC for controlling the main scan driver 106 and the sub scan driver 108 are generated. In addition, the timing controller 116 selectively drives the main scan driver 106 or the sub scan driver 108 and selectively drives the main display panel 102 or the sub display panel 104. Generates the enable signal EN. In this case, the enable signal EN is supplied to the sub scan driver 108, the sub display panel 104, and the inverter 118, and the enable signal EN supplied to the inverter 118 is provided. The inverter 118 is inverted and supplied to the main scan driver 106 and the main display panel 102. Accordingly, the sub scan driver 108 and the sub display panel 104 are not driven when the main scan driver 106 and the main display panel 102 are driven. The timing controller 116 rearranges and supplies the digital data signal RGB DATA supplied from the external system to the data driver 110.

The inverter 118 inverts the state of the enable signal EN supplied from the timing controller 116 to convert the inverted enable signal EN ′ into the main scan driver 106 and the main display panel 102. Supplies). Accordingly, when the main scan driver 106 and the main display panel 102 are driven, the sub scan driver 108 and the sub display panel 104 are not driven, and the main scan driver 106 and When the main display panel 102 is not driven, the sub scan driver 108 and the sub display panel 104 are driven.

In the organic EL display device according to the first embodiment of the present invention described above, the main scan driver 106 or the sub scan driver 108 and the main display panel 102 or the sub display panel 104 are driven. The state of the enable signal EN may be arbitrarily set by the user.

3 is a circuit diagram illustrating a first embodiment of pixels formed in a main display panel and a sub display panel shown in FIG. 2.

Referring to FIG. 3, each of the pixels 112 and 114 formed in the main and sub display panels 102 and 104 includes a pixel driving circuit 120, an organic light emitting diode OLED, and a light emission control transistor T3. .

The pixel driver circuit 120 generates a driving current corresponding to the data signal of the data driver 110 in response to a selection signal of the main or sub scan driver 106 or 108 to the organic light emitting diode OLED. Supply. In more detail, the pixel driving circuit includes a switching transistor T1, a capacitor Cst, and a driving transistor T2.

The switching transistor T1 is turned on by the selection signal of the scan driver 106 or 108 applied to the gate electrode connected to the gate line GL, so that the first electrode, for example, the source, connected to the data line DL. The data voltage of the data driver 110 applied to the electrode is transferred.

The capacitor Cst is connected between the second electrode of the switching transistor T1, for example, the drain electrode and the first power supply voltage line VDD, and corresponds to the voltage difference between the first power supply voltage VDD and the data voltage. Stores charge for one frame.

The driving transistor T2 is a first electrode connected to the first power supply voltage line VDD, for example, the first power supply voltage VDD applied to a source electrode and a second electrode of the switching transistor, for example, a drain. A driving current corresponding to the data voltage applied to the gate electrode connected to the electrode is generated and supplied to the organic light emitting diode OLED. 3, the light emission control transistor T3, the switching transistor T1, and the driving transistor T2 are formed of a metal oxide semiconductor field effect transistor (P MOSFET).

The emission control transistor T3 is connected between the pixel driver circuit 120 and the organic light emitting diode OLED, and a gate electrode is commonly connected to the enable signal line ENSL to enable the enable signal EN. Alternatively, the pixel driving circuit 120 and the organic light emitting diode OLED are connected or disconnected under the control of the enable signal EN ′ inverted by the inverter 118. The light emission control transistor T3 is turned on or turned off according to a state of the enable signal EN or the enable signal EN ′ inverted by the inverter 118. The driving current from the driving transistor T2 is supplied to the organic light emitting diode OLED. That is, when the pixel is formed in the main display panel 102, the light emission control transistor T3 is turned on or turned on according to the state of the enable signal EN ′ inverted by the inverter 118. -Is off. In addition, when the pixel is formed in the sub display panel 104, the emission control transistor T3 is turned on or turned on according to the state of the enable signal EN supplied from the timing controller 116. -Is off. Accordingly, the driving of the main display panel 102 and the sub display panel 104 is selectively performed by the enable signal EN and the enable signal EN ′ whose states are inverted by the inverter 118. Is controlled.

The organic light emitting diode OLED has an anode electrode connected to a second electrode of the light emitting control transistor, for example, a drain electrode, a cathode electrode connected to a second power supply voltage line VSS, and the pixel driving circuit 120. Generates light corresponding to the driving current supplied from the. Here, the second power supply voltage VSS is lower than the first power supply voltage VDD and may be a ground GND or a negative voltage.

Accordingly, the light emission control transistor T3 is formed in the main and sub pixels 112 and 114 so that the main or sub scan driver 106 or 108 is driven by the enable signal EN or the inverted enable signal EN '. When not driven, since the light emission control transistor T3 is turned off at the same time, residual driving current remaining in the plurality of main or sub pixels 112 and 114 does not flow to the organic light emitting diode OLED. Therefore, not only can the image be displayed on the main or sub display panel 102 or 104 being blocked, but also the power consumption can be reduced.

Referring to the operation of the pixel circuit diagram shown in FIG. 3, first, the light emission control transistor T3 is turned on by the enable signal EN or the inverted enable signal EN ′ of the timing controller 116. on) At the same time, the switching transistor T1 is turned on by the selection signal transmitted through the gate line GL by driving the main or sub-scan driver 106 or 108. Next, the data voltage transferred through the data line DL is applied to the gate electrode of the driving transistor T2 through the switching transistor T1 turned on. Accordingly, the driving transistor T2 controls the driving current supplied from the first power supply voltage VDD in response to the corresponding data voltage and supplies the driving current to the organic light emitting diode OLED, and the organic light emitting diode OLED drives the driving voltage. The image is displayed by generating a predetermined light corresponding to the current.

FIG. 4 is a circuit diagram illustrating a second embodiment of pixels formed in the main display panel and the sub display panel shown in FIG. 2.

Referring to FIG. 4, each of the pixels 112 and 114 formed in the main and sub display panels 102 and 104 is the pixel driving circuit 120, the organic light emitting diode OLED, and the same as the first embodiment of FIG. 3. A light emission control transistor T3. Unlike the first embodiment, the pixel according to the second embodiment of the present invention further includes a current control transistor T4 in the pixel driving circuit 120. In detail, the pixel driving circuit 120 of the pixel according to the second exemplary embodiment includes a switching transistor T1, a capacitor Cst, a driving transistor T2, and a current control transistor T4.

The switching transistor T1 is turned on by the selection signal of the scan driver 106 or 108 applied to the gate electrode connected to the gate line GL, so that the first electrode, for example, the source, connected to the data line DL. The data voltage of the data driver 110 applied to the electrode is transferred.

The capacitor Cst is connected between the second electrode of the switching transistor T1, for example, the drain electrode and the first power supply voltage line VDD, and corresponds to the voltage difference between the first power supply voltage VDD and the data voltage. Stores charge for one frame.

The driving transistor T2 is a first electrode connected to the first power supply voltage line VDD, for example, the first power supply voltage VDD applied to a source electrode and a second electrode of the switching transistor, for example, a drain. A driving current corresponding to the data voltage applied to the gate electrode connected to the electrode is generated and supplied to the organic light emitting diode OLED.

The current control transistor T4 is connected between the driving transistor T2 and the emission control transistor T3 and is controlled by the emission control signal applied to the gate electrode connected to the emission control line EMI. ) To drive or cut off the drive current. That is, in order to prevent the wrong driving current from flowing to the organic light emitting diode OLED while the data voltage applied to the driving transistor T2 is charged, the driving current is blocked from flowing until the data voltage is sufficiently charged, and the battery is completely charged. Drive current flows. Here, the current control transistor T4 is a P-type MOSFET.

The pixel according to the second exemplary embodiment of the present invention is the same as the pixel according to the first exemplary embodiment except that the pixel driving circuit 120 further includes a current control transistor T4. 3 will be replaced with the above description.

FIG. 5 is a circuit diagram illustrating a third embodiment of pixels formed in a main display panel and a sub display panel shown in FIG. 2.

Referring to FIG. 5, each of the pixels 112 and 114 formed in the main and sub display panels 102 and 104 includes a pixel driver circuit 120, an organic light emitting diode OLED, and a light emission control transistor T3. .

The pixel driver circuit 120 generates a driving current corresponding to the data signal of the data driver 110 in response to a selection signal of the main or sub scan driver 106 or 108 to generate a first power voltage line VSS. To supply. In more detail, the pixel driving circuit includes a switching transistor T1, a capacitor Cst, and a driving transistor T2.

The switching transistor T1 is turned on by the selection signal of the scan driver 106 or 108 applied to the gate electrode connected to the gate line GL, so that the first electrode connected to the data line DL, for example, a drain, is turned on. The data voltage of the data driver 110 applied to the electrode is transferred.

The capacitor Cst is connected between the second electrode of the switching transistor T1, for example, the source electrode and the first power supply voltage line VSS, and corresponds to the voltage difference between the first power supply voltage VSS and the data voltage. Stores charge for one frame.

The driving transistor T2 generates a driving current corresponding to the data voltage applied to the second electrode of the switching transistor, for example, the gate electrode connected to the source electrode. That is, the driving current is supplied from the second power supply voltage VDD to the organic light emitting diode OLED. The light emission control transistor T3, the switching transistor T1, and the driving transistor T2 in the pixel circuit diagram according to the third exemplary embodiment illustrated in FIG. 5 are formed of an N-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

The emission control transistor T3 is connected between the pixel driver circuit 120 and the organic light emitting diode OLED, and a gate electrode is commonly connected to the enable signal line ENSL to enable the enable signal EN. Alternatively, the pixel driving circuit 120 and the organic light emitting diode OLED are connected or disconnected under the control of the enable signal EN ′ inverted by the inverter 118. The light emission control transistor T3 is turned on or turned off according to a state of the enable signal EN or the enable signal EN ′ inverted by the inverter 118. The driving current from the organic light emitting diode OLED is supplied to the driving transistor T2. That is, when the pixel is formed in the main display panel 102, the light emission control transistor T3 is turned on or turned on according to the state of the enable signal EN ′ inverted by the inverter 118. -Is off. In addition, when the pixel is formed in the sub display panel 104, the light emission control transistor T3 is turned on or turned on according to the state of the enable signal EN supplied from the timing controller 116. Is off. Accordingly, the driving of the main display panel 102 and the sub display panel 104 is selectively performed by the enable signal EN and the enable signal EN ′ whose states are inverted by the inverter 118. Is controlled.

The organic light emitting diode OLED has an anode electrode connected to a second power supply voltage line VDD and a cathode electrode connected to a second electrode of the light emitting control transistor, for example, a drain electrode, and the second power supply voltage VDD. Generates light corresponding to the driving current supplied from Here, the first power supply voltage VSS is lower than the second power supply voltage VDD and may be a ground GND or a negative voltage.

Accordingly, the light emission control transistor T3 is formed in the main and sub pixels 112 and 114 so that the main or sub scan driver 106 or 108 is enabled by the enable signal EN or the inverted enable signal EN '. ) Is not driven, the residual driving current remaining in the main or sub pixels 112 and 114 does not flow to the organic light emitting diode OLED because the light emission control transistor T3 is turned off at the same time. Therefore, not only can the image be displayed on the main or sub display panel 102 or 104 being blocked, but also the power consumption can be reduced. The operation of the pixel illustrated in FIG. 5 will be omitted since a person skilled in the art can easily understand the operation of the pixel illustrated in FIG. 3.

6 is a circuit diagram illustrating a fourth exemplary embodiment of pixels formed in a main display panel and a sub display panel of FIG. 2.

Referring to FIG. 6, each of the pixels 112 and 114 formed in the main and sub display panels 102 and 104 is the pixel driving circuit 120, the organic light emitting diode OLED, and the like. A light emission control transistor T3. Unlike the third embodiment, the pixel according to the fourth embodiment of the present invention further includes a current control transistor T4 in the pixel driving circuit 120. In detail, the pixel driving circuit 120 of the pixel according to the second exemplary embodiment includes a switching transistor T1, a capacitor Cst, a driving transistor T2, and a current control transistor T4.

The switching transistor T1 is turned on by the selection signal of the scan driver 106 or 108 applied to the gate electrode connected to the gate line GL, so that the first electrode connected to the data line DL, for example, a drain, is turned on. The data voltage of the data driver 110 applied to the electrode is transferred.

The capacitor Cst is connected between the second electrode of the switching transistor T1, for example, the source electrode and the first power supply voltage line VSS, and corresponds to the voltage difference between the first power supply voltage VSS and the data voltage. Stores charge for one frame.

The driving transistor T2 generates a driving current corresponding to the data voltage applied to the second electrode of the switching transistor, for example, the gate electrode connected to the source electrode.

The current control transistor T4 is configured to flow the driving current according to the control of the emission control signal applied to the gate electrode connected between the driving transistor T2 and the emission control transistor T3 and connected to the emission control line EMI. To act or to block. That is, in order to prevent the wrong driving current from flowing to the organic light emitting diode OLED while the data voltage applied to the driving transistor T2 is charged, the driving current is blocked from flowing until the data voltage is sufficiently charged, and the battery is completely charged. Drive current flows. Here, the current control transistor T4 is an N-type MOSFET.

The pixel according to the fourth exemplary embodiment of the present invention is the same as the pixel according to the third exemplary embodiment except that the pixel driving circuit 120 further includes a current control transistor T4. In FIG. 5, the content according to the third exemplary embodiment will be replaced.

Second embodiment

7 is a diagram showing an organic EL display device according to a second embodiment of the present invention.

Referring to FIG. 7, the organic EL display device according to the second embodiment of the present invention includes a main display panel 102 for displaying a main image and a sub display panel 104 for displaying a sub image. ), A data driver 110 for driving data lines DL1 to DLm formed on the main display panel 102 and the sub display panel 104, and main gate lines formed on the main display panel 102. A main scan driver 106 for driving the GL1 to GLn, a sub scan driver 108 for driving the sub gate lines GL1 to GLk formed on the sub display panel 104, and the main scan driver 106, a timing controller 116 for controlling the driving of the sub scan driver 108 and the data driver 110. The organic EL display device according to the second embodiment of the present invention further includes an inverter 118 for inverting an enable signal (EN) signal supplied from the timing controller 116.

In the organic EL display device according to the second exemplary embodiment of the present invention, the enable signal EN supplied from the timing controller 116 is supplied to the main scan driver 106 and the main display panel 102. According to the first embodiment of the present invention, the enable signal EN 'inverted by the inverter 118 is supplied to the sub scan driver 108 and the sub display panel 104. Since the organic EL display device and its components are the same, a detailed description of each component will be replaced with the above description. In addition, since the plurality of pixels formed in the main and sub display panels 102 and 104 are the same as those of FIGS. 3 to 6, a description thereof will be omitted.

As described above, the organic EL display device according to the present invention not only controls the main scan driver and the sub scan driver to be driven at the same time using an enable signal, but also does not drive the main display panel and the sub display panel at the same time. The effect is that it can be controlled.

In addition, according to the present invention, the main scan panel is driven only when the main scan driver is driven by using an enable signal, and only the sub display panel is driven when the sub scan driver is driven to reduce power consumption of the organic EL display device. There is an effect that can be reduced.

In addition, the present invention has the effect of forming a light emission control transistor which is blocked by the control of the enable signal in common to a plurality of main or sub pixels so that no leakage current flows when the panel is not driven. have.

Although the above has been described with reference to the preferred embodiment of the present invention, those skilled in the art will be variously modified and modified within the scope of the present invention without departing from the spirit and scope of the present invention described in the claims below. It will be appreciated that it can be changed.

Claims (28)

A main display panel having a plurality of main pixels formed in an area where main data lines, main gate lines, and main enable signal lines intersect, and displaying a main image; A sub display panel having a plurality of sub pixels formed in an area where sub data lines, sub gate lines, and sub enable signal lines intersect, and displaying a sub image; A main scan driver for selecting the plurality of main pixels by applying a selection signal to the main gate lines; A sub scanning driver for selecting the plurality of sub pixels by applying a selection signal to the sub gate lines; A data driver for supplying a data signal to the main or sub data lines; And And a timing controller for selectively controlling driving of the main scan driver and the sub scan driver, and outputting an enable signal for selectively controlling image display of the main display panel and the sub display panel. Organic electroluminescent display. The method of claim 1, The organic electroluminescent display device, And an inverter for inverting the enable signal output from the timing controller. The method of claim 2, The main enable signal lines, And an enable signal or an inverted enable signal simultaneously applied to the plurality of main pixels. The method of claim 3, wherein The sub-enable signal lines are And an enable signal or an inverted enable signal simultaneously applied to the plurality of sub-pixels. The method of claim 4, wherein The enable signal output from the timing controller is The organic electroluminescent display device is applied to the sub scan driver and the plurality of sub pixels in common. The method of claim 5, The enable signal inverted by the inverter, And the main scan driver and the plurality of main pixels in common. The method of claim 4, wherein The enable signal output from the timing controller is And the main scan driver and the plurality of main pixels in common. The method of claim 7, wherein The enable signal inverted by the inverter, The organic electroluminescent display device is applied to the sub scan driver and the plurality of sub pixels in common. The method of claim 6 or 8, Each of the main and sub pixels, A pixel driver circuit for generating a driving current corresponding to the main or sub data signal of the data driver in response to a selection signal of the main or sub scan driver; An organic light emitting element connected between the pixel driving circuit and a first power voltage line and configured to emit light corresponding to the driving current; And And an emission control transistor configured to connect or block the pixel driving circuit and the organic light emitting element according to the enable signal or the inverted enable signal. The method of claim 9, The pixel driver circuit, A switching transistor turned on by the selection signal applied to the gate electrode connected to the gate line to transfer the data voltage applied to the first electrode connected to the data line; A capacitor connected between the second electrode and the second power supply voltage line of the switching transistor and configured to store a charge corresponding to a voltage difference between the second power supply voltage and the data voltage for a predetermined time; And And a driving transistor connected between the second power supply voltage line and the light emission control transistor and generating a driving current corresponding to the data signal applied to a gate electrode connected to the second electrode of the switching transistor. Organic electroluminescent display. The method of claim 10, And the light emitting control transistor, the switching transistor, and the driving transistor are p-type MOSFETs. The method of claim 10, And the light emission control transistor, the switching transistor, and the driving transistor are N-type MOSFETs. The method of claim 10, The pixel driver circuit, An organic electroluminescence display connected between the driving transistor and the light emitting control transistor and further comprising a current control transistor for blocking or flowing a driving current of the driving transistor according to a control signal applied to a gate electrode. . The method of claim 13, And the light emitting control transistor, the switching transistor, the driving transistor, and the current control transistor are P-type MOSFETs. The method of claim 13, And the light emitting control transistor, the switching transistor, the driving transistor, and the current control transistor are N-type MOSFETs. The method of claim 1, And the main display panel and the sub display panel share the main and sub data lines in common. A main display panel having a plurality of main pixels formed in an area where main data lines, main gate lines, and main enable signal lines intersect, and displaying a main image; A sub display panel having a plurality of sub pixels formed in an area where sub data lines, sub gate lines, and sub enable signal lines intersect, and displaying a sub image; A scan driver for selecting the plurality of main or sub pixels by applying a selection signal to the main or sub gate lines; A data driver for supplying a data signal to the main or sub data lines; And And a timing controller for outputting an enable signal for selectively controlling image display of the main display panel and the sub display panel. The method of claim 17, The organic electroluminescent display device, And an inverter for inverting the enable signal output from the timing controller. The method of claim 18, The main enable signal lines, And an enable signal or an inverted enable signal simultaneously applied to the plurality of main pixels. The method of claim 19, The sub-enable signal lines are And an enable signal or an inverted enable signal simultaneously applied to the plurality of sub-pixels. The method of claim 20, Each of the main and sub pixels, A pixel driver circuit for generating a driving current corresponding to a data voltage of the data driver in response to a selection signal of the scan driver; An organic light emitting element connected between the pixel driving circuit and a first power voltage line and configured to emit light corresponding to the driving current; And And an emission control transistor configured to connect or block the pixel driving circuit and the organic light emitting element according to the enable signal or the inverted enable signal. The method of claim 21, The pixel driver circuit, A switching transistor turned on by the selection signal applied to a gate electrode connected to the main or sub gate line, and configured to transfer the data voltage applied to a first electrode connected to the main or sub data line; A capacitor connected between the second electrode and the second power supply voltage line of the switching transistor and configured to store a charge corresponding to a voltage difference between the second power supply voltage and the data voltage for a predetermined time; And And a driving transistor connected between the second power supply voltage line and the light emission control transistor and generating a driving current corresponding to the data voltage applied to the gate electrode connected to the second electrode of the switching transistor. Organic electroluminescent display. The method of claim 22, And the light emitting control transistor, the switching transistor, and the driving transistor are p-type MOSFETs. The method of claim 22, And the light emission control transistor, the switching transistor, and the driving transistor are N-type MOSFETs. The method of claim 22, The pixel driver circuit, An organic electroluminescence display connected between the driving transistor and the light emitting control transistor and further comprising a current control transistor for blocking or flowing a driving current of the driving transistor according to a control signal applied to a gate electrode. . The method of claim 25, And the light emitting control transistor, the switching transistor, the driving transistor, and the current control transistor are P-type MOSFETs. The method of claim 25, And the light emitting control transistor, the switching transistor, the driving transistor, and the current control transistor are N-type MOSFETs. The method of claim 1, And the main display panel and the sub display panel share the main and sub data lines in common.

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