KR100680477B1 - A oscillator using charge-sharing - Google Patents

Abstract

The present invention is to provide an oscillation circuit using a charge sharing that can generate a high output frequency while increasing the capacitance of the capacitor, for this purpose in accordance with the first signal to form a current path from the power supply terminal A main capacitor configured to charge the electric charge input from the power supply terminal through the first switching unit, the current path formed according to the operation of the first switching unit, or discharge the already charged electric charge, and the electric charges charged in the main capacitor And compares the charging voltage corresponding to the reference voltage with a reference voltage, and outputs a first signal having a predetermined level according to the comparison result, and shares the electric charges discharged from the main capacitor to rapidly decrease the charging voltage. A charge sharing part and a charge discharged from the main capacitor to a ground terminal An oscillation circuit including a current sink is provided.

Oscillators, Charge Sharing, Capacitors

Description

Oscillation Circuit Using Charge Sharing {A OSCILLATOR USING CHARGE-SHARING}

1 is a configuration diagram of a general oscillation circuit.

2 is a configuration diagram of an oscillation circuit according to a preferred embodiment of the present invention.

3 is a configuration diagram for generating the control signals CHP1 and CHP2 shown in FIG.

<Explanation of symbols for the main parts of the drawings>

10, 110, 151, 152: switching unit

20, 120: current sink

30, 130: comparison unit

40, 140: output buffer section

150: charge sharing unit

The present invention relates to an oscillating circuit using charge sharing, and more particularly to an oscillating circuit operating at a high speed.

The driver IC of a small liquid crystal display (LCD) device has an internal oscillation circuit. The oscillation circuit according to the prior art is shown in FIG.

As shown in FIG. 1, the oscillation circuit according to the related art includes a current path ON / OFF switching unit 10, a current sink part 20, and a capacitor C. And a comparator 30 and an output buffer part 40.

Looking at the operation characteristics of the oscillation circuit according to the prior art having such a configuration as follows.

First, the output voltage of the comparator 30 rises to be high enough to turn on the NMOS transistor of the switching unit 10. When the NMOS transistor is turned on, the current flows quickly through the switching unit 10. It is introduced to charge the capacitor (C). Accordingly, the voltage (hereinafter referred to as the charging voltage) input to the inverting input terminal (-) of the comparator 30 increases in response to the time constant. Here, the input terminal may vary depending on the operational amplifier constituting the comparator 30.

The comparator 30 compares the charging voltage input to the inverting input terminal (−) and the reference voltage Vref input to the non-inverting input terminal (+). At this time, the charging voltage gradually increases corresponding to the time constant, and the output voltage of the comparator 30 decreases when the magnitude thereof becomes higher than the reference voltage Vref. That is, the output voltage of the comparator 30 is output at a low level.

When the output of the comparator 30 is inverted from a high level to a low level, the NMOS transistor of the switching unit 10 is turned off to cut off the current path to the switching unit 10. . Accordingly, the charge charged in the capacitor C is gradually discharged to the ground terminal to a predetermined magnitude through the current sink 20, and the charging voltage input to the inverting input terminal (-) is reduced.

When the charging voltage is lower than the reference voltage Vref, the comparator 30 outputs a high level output voltage again, so that the NMOS transistor of the switching unit 10 is turned on so that the current path from the power supply terminal is turned off. It is formed to charge the capacitor (C). As such, the charging and discharging of the capacitor C is repeatedly performed to generate and output an oscillation frequency having a predetermined period.

In the oscillation circuit according to the related art, the output frequency Vosc is determined by the capacity of the current sink 120 and the capacitance of the capacitor C. As the output frequency Vosc increases, the current sink 120 is increased. Should improve the capacity of the capacitor, or reduce the capacitance of the capacitor (C). The method of increasing the capability of the current sink 120 should reduce the capacitance of the capacitor C because the power consumption is increased. That is, the capacitance of the capacitor C is inversely proportional to the frequency. However, the smaller the capacitance of the capacitor, the more difficult it is to generate an accurate frequency under the influence of process variation and surrounding parasitic components.

Accordingly, the present invention has been proposed to solve the above problems of the prior art, and an object thereof is to provide an oscillation circuit capable of generating a high output frequency while increasing the capacitance of a capacitor.

The present invention according to one aspect for achieving the above object, the first switching unit to operate in accordance with a first signal to form a current path from the power supply terminal, and the current path formed in accordance with the operation of the first switching unit The main capacitor charging the electric charge input from the power supply terminal or discharging the already charged charge and the charging voltage and the reference voltage corresponding to the electric charge charged in the main capacitor are received and compared, and according to the comparison result, A comparator for outputting a first signal having a level, a charge sharing unit for rapidly reducing the charging voltage by sharing charges discharged from the main capacitor, and a current sink for discharging charges discharged from the main capacitor to the ground terminal; It provides an oscillation circuit comprising a portion.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

Example

FIG. 2 is a configuration diagram illustrating an oscillation circuit according to a preferred embodiment of the present invention, and FIG. 3 is a circuit diagram for generating the control signals CHP1 and CHP2 shown in FIG.

As shown in FIG. 2, in the oscillation circuit according to the preferred embodiment of the present invention, the main capacitor Cm is implemented as a capacitor having a higher capacitance than in the prior art. For example, the oscillation circuit according to the prior art is implemented with a capacitor having a capacitance of 0.5pF to generate an output frequency of 10MHz, but in the oscillator circuit according to a preferred embodiment of the present invention implemented with a capacitor having a capacitance of approximately 4pF It was.

When implemented as a main capacitor (Cm) of the oscillation circuit using a capacitor having a capacitance of about 4pF, only an output frequency of about several hundred KHz can be generated, and to compensate for this, according to a preferred embodiment of the present invention The oscillation circuit includes a charge sharing part 150 that shares (ie, distributes) the charge of the main capacitor Cm so as to quickly discharge the charge charged in the main capacitor Cm during discharge. .

As shown in FIG. 2, the charge sharing unit 150 includes a dummy capacitor Cd sharing a charge charged in the main capacitor Cm, and between the dummy capacitor Cd and the main capacitor Cm. Connected between a switching unit 151 for generating a current path for discharging the charge charged in the dummy capacitor Cd to the ground terminal, and an inverting input terminal (-) of the comparator 130 and the dummy capacitor Cd. It includes a switching unit 152 for generating a current path to charge the charge discharged by the dummy capacitor (Cd) during the discharge of the main capacitor (Cm).

Here, the switching units 151 and 152 must be controlled so as not to be turned on at the same time. For example, when the switching units 151 and 152 are turned on at the same time, the discharge charge of the main capacitor Cm is discharged to the ground terminal through the switching units 151 and 152 during discharge, and the dummy capacitor Cd is charged. It doesn't work. That is, charge transfer from the main capacitor Cm to the dummy capacitor Cd does not occur. Therefore, in order to prevent the switching units 151 and 152 from being turned on at the same time, control signals CHP1 and CHP2 for controlling each switching unit should be generated.

To this end, a preferred embodiment of the present invention proposes a generation circuit of the control signals CHP1 and CHP2 as shown in FIG. As shown in FIG. 3, the generation circuit includes a plurality of NAND gates NAND1 and NAND2 and a plurality of inverters INV1 to INV7. First, when a predetermined input signal Vin is input at a high level, that is, while the outputs of the NAND gates NAND1 and NAND2 are low and high, respectively, the NAND gate NAND1 outputs a low state signal. The NAND gate NAND2 outputs a high state signal. In this state, when the low state input signal Vin is input, the NAND gate NAND1 outputs a high state signal, and the NAND gate NAND2 outputs a low state signal. As a result, the control signals CHP1 and CHP2 have different levels.

Hereinafter, the operating characteristics of the oscillation circuit according to the preferred embodiment of the present invention shown in FIG. 2 will be described.

First, when the output voltage of the comparator 130 rises to be high enough to turn on the NMOS transistor (or PMOS transistor) of the switching unit 110, and when the NMOS transistor is turned on, the switching unit (from the power supply terminal VDD) The current flows quickly through 110 to charge the main capacitor Cm. Accordingly, the charging voltage input to the inverting input terminal (-) of the comparator 130 increases in response to the time constant. At this time, the control signal CHP1 is input at a high level so that the NMOS transistor (or PMOS transistor) of the switching unit 151 is turned on, and thus, the charge charged in the dummy capacitor Cd is switched. Through the discharge to the ground terminal.

The comparator 130 compares the charging voltage input to the inverting input terminal (−) and the reference voltage Vref input to the non-inverting input terminal (+). At this time, the charging voltage gradually increases in response to the time constant, and the output voltage of the comparator 130 transitions to the low level at the instant when the magnitude thereof becomes higher than the reference voltage Vref.

When the output of the comparator 130 is inverted from the high level to the low level, the NMOS transistor of the switching unit 110 is turned off to cut off the current path to the switching unit 110. Accordingly, the electric charge charged in the main capacitor Cm is gradually discharged to the ground terminal through the current sink 120. At this time, the control signal CHP1 transitions to a low level and the control signal CHP2 transitions to a high level so that the switching unit 151 is turned off, while the switching unit 152 is turned on. Accordingly, the charge of the main capacitor Cm is moved to the dummy capacitor Cd through the NMOS transistor (or PMOS transistor) of the switching unit 152, so that the charging voltage rapidly input to the inverting input terminal (-) is reduced. . That is, the charge charged in the main capacitor Cm is discharged to the ground terminal through the current sink 120, while moving to the dummy capacitor Cd, thereby rapidly reducing the charging voltage. As a result, a high frequency output can be accurately generated without reducing the capacitance of the main capacitor Cm.

On the other hand, the output frequency Vosc is determined by the capacitance ratio between the main capacitor Cm and the dummy capacitor Cd, and the capacitance of the dummy capacitor Cd when a faster charge discharge is required to obtain a higher frequency. You can design large. This is possible because the magnitude of the capacitance of the dummy capacitor Cd is less affected by process variations and surrounding parasitic components.

Meanwhile, '140', which is not described in FIG. 2, is an output buffer.

Although the technical spirit of the present invention has been described in detail in the preferred embodiments, it should be noted that the above-described embodiments are for the purpose of description and not of limitation. In addition, it will be understood by those skilled in the art that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, according to the present invention, a high output frequency can be generated while increasing the capacitance of the capacitor by constructing a dummy capacitor in the oscillating circuit so as to share the charge when discharging the main capacitor so that the discharge can be performed quickly. Accordingly, stable operation and yield of the small LCD driving driver can be improved.

Claims (5)

A first switching unit operating according to the first signal to form a current path from the power supply terminal; A main capacitor configured to charge electric charges input from the power supply terminal or discharge electric charges already charged through the current path formed according to the operation of the first switching unit; A comparator configured to receive and compare a charging voltage corresponding to the charge charged in the main capacitor and a reference voltage, and output the first signal according to the comparison result; A charge sharing unit for rapidly reducing the charging voltage by sharing charges discharged from the main capacitor; And A current sink for discharging the electric charge discharged from the main capacitor to the ground terminal; Oscillation circuit comprising a. The method of claim 1, wherein the charge sharing unit, A dummy capacitor configured to charge electric charges discharged from the main capacitor; A second switching unit connected between the main capacitor and the dummy capacitor and discharging the charge charged in the dummy capacitor to the ground terminal while the current path is formed; And A third switching unit connected between the dummy capacitor and the input terminal of the comparison unit to which the charging voltage is input and transferring charge discharged from the main capacitor to the dummy capacitor while the current path is not formed; Oscillation circuit comprising a. The method of claim 2, The oscillation circuit controlled by the second and third signals, respectively, so that the second and third switching units are not turned on at the same time. The method according to claim 1 or 2, And an output buffer configured to output the output frequency by buffering the first signal. delete

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