KR100665290B1 - Method for manufacturing thin film capacitor embeded printed circuit board - Google Patents

Abstract

A method for manufacturing a thin film capacitor embedded printed circuit board is provided to promote the credibility of a product by increasing surface illumination to improve adhesion force. A method for manufacturing a thin film capacitor embedded printed circuit board includes the steps of: forming a lower electrode(21,22); forming a dielectric film with an amorphous dielectric; and forming an upper electrode(41,42). A method for manufacturing the lower electrode(21,22) includes the steps of: forming an electroless plating layer with a first lower electrode(21); forming an electrolyte plating layer with a second lower electrode(22); and processing plasma for modifying a surface of the electrolyte plating layer.

Description

Method for manufacturing thin film capacitor embeded printed circuit board

1 is a cross-sectional view illustrating a printed circuit board incorporating a conventional thin film capacitor.

2 is a cross-sectional view illustrating a printed circuit board having a thin film capacitor according to an embodiment of the present invention.

3 is an example of a process sequence showing a manufacturing process of a printed circuit board according to the present invention.

US 6,818,469

The present invention relates to a method for manufacturing a thin film capacitor-embedded printed circuit board, and more particularly, to a method for manufacturing a printed circuit board which can improve the interlayer adhesion of a thin film capacitor by increasing the surface roughness by plasma surface modification. .

Recently, there is an increasing demand for highly integrated passive devices for high performance of electronic devices. However, it has been recognized that various passive elements mounted on printed circuit boards act as a major obstacle in miniaturizing electronic devices. In particular, as semiconductor active devices are increasingly embedded and the number of input / output terminals thereof increases, space for more passive devices is required around the active devices, but such a requirement is not simply a problem that can be solved.

A typical passive element is a capacitor. The capacitor is required to be disposed appropriately to reduce the inductance as the frequency of the operating frequency increases. For example, the decoupling capacitor used to stably supply power is required to be disposed at the closest distance to the input terminal in order to reduce the inductance caused by the high frequency.

In order to meet these demands, research into the method of embedding a capacitor in a printed circuit board has been actively conducted. An example is shown in FIG. 1. A capacitor having a stacked structure of the lower electrode 20, the dielectric 30, and the upper electrode 40 is embedded between the insulating substrates 10a and 10b.

The built-in capacitor can be used in memory cards, PC motherboards and various RF modules to significantly reduce the size of the product. In addition, it is possible to arrange close to the input terminal of the active element has the advantage of minimizing the length of the lead wire and significantly reduce the inductance.

However, the built-in capacitor has a problem that it is difficult to form the electrode thick because the bonding between different materials such as the electrode and the dielectric is difficult. That is, when the upper and lower electrodes are each about 1.0 μm when the dielectric layer is 1.0 μm or less, a certain amount of bonding is possible. However, when the upper and lower electrodes are larger than that, the peeling phenomenon of the dielectric layer is caused by the residual stress of the metal layer. This is a problem caused by the different metallic structures of the metal materials.

The prior art for solving the problems of the built-in capacitor as described above is the invention disclosed in US Pat. No. 6,818,469. In this prior art, the upper and lower electrodes are formed by using a PVD method such as sputtering and an E-beam. Therefore, there is a difficulty in terms of cost in order to increase the thickness of the electrode. In addition, in the case of the electrode formed using the PVD method as described above, the surface roughness of the electrode is usually 100 nm or less, so that the interlayer adhesion strength may be weak and peeled off. That is, in FIG. 1, when the surface roughness of the upper electrode 40 is about 100 nm, the adhesive force with the insulating substrate 10b is difficult to secure.

An object of the present invention is to provide a method for manufacturing a printed circuit board which can improve the interlayer adhesion of the thin film capacitor embedded in the printed circuit board.

Method of manufacturing a printed circuit board of the present invention for achieving the above object,

Sequentially forming a lower electrode, a dielectric thin film, an upper electrode, and an insulating substrate on the insulating substrate;

And at least one surface of the lower electrode, the dielectric thin film, and the upper electrode is further subjected to a plasma treatment step for surface modification before formation of the upper layer.

In the present invention, the dielectric thin film is preferably an amorphous dielectric. A representative example of an amorphous dielectric material is BiZnNb-based metal oxide, where x, y, and z are 1.3 <x <2.0, 0.8 <y <1.5, 1.4 <z <1.6 when expressed as Bi _x Zn _y Nb _z O ₇ . Will be.

The plasma reforming treatment of the present invention can be applied when the electrode layer is formed by the PVD method, and of course, when the electrode is formed by plating.

The preferable example at the time of forming an upper electrode and a lower electrode by plating is as follows.

The forming of the lower electrode

After forming an electroless plating layer with a first lower electrode, an electroplating layer is formed with a second lower electrode and plasma treatment for surface modification is performed on the electroplating layer.

Forming the upper electrode,

After forming the metal seed layer with the first upper electrode, the electroplating layer is formed with the second upper electrode, and plasma treatment for surface modification to the metal seed layer.

The upper electrode and the lower electrode are preferably at least one metal selected from the group consisting of Cu, Ni, Al, Pt, Ta, and Ag.

The metal seed layer is preferably formed by PVD or electroless plating.

When the metal seed layer is formed by PVD, the formed metal seed layer is preferably subjected to plasma treatment for surface modification. The metal seed layer is preferably one metal selected from the group consisting of Cu, Ni, Ti, Au, Co, Ag, Pt, and Pd. As for the thickness of the said metal seed layer, 1.0 micrometer or less is preferable.

Plasma treatment for surface modification in the present invention is to increase the surface roughness. It is preferable to perform a plasma process for 5 to 15 second at atmospheric pressure. Plasma treatment is preferably performed in a condition of 5 slm or more of Hellum, preferably 5-30 slm or less than 3 slm of oxygen together with Hellum of the above conditions.

In the present invention, a buffer layer may be further formed between the dielectric thin film and the upper electrode. As the buffer layer, one metal selected from Ti or Cr is preferable.

In the present invention, the thickness of the dielectric thin film is 2.0 μm or less, the thickness of the upper electrode is 10 μm or less, the thickness of the first lower electrode is 1.0 μm or less, and the thickness of the second lower electrode is preferably 1-10 μm. .

Hereinafter, the present invention will be described in detail.

The present invention is characterized in that the surface modification to increase the surface roughness to improve the adhesion between the layers in the method of manufacturing a printed circuit board containing a thin film capacitor. Surface modification uses plasma treatment. Plasma treatment may be applied to the layer where the surface roughness of the thin film capacitor is required.

An example is a case where a metal electrode and a dielectric material or a heterogeneous material such as a metal electrode and an insulating substrate are joined. Alternatively, since the electrode layer formed by the PVD method has low surface roughness, plasma treatment for surface modification is preferably applied.

Surface modifications to increase the surface roughness include wet and dry methods. The wet method is a method of increasing the surface roughness by the sulfuric acid solution to increase the adhesion, the contact angle can be reduced from about 40 ° to about 15 °. The dry method is to increase the surface roughness by the plasma, it is possible to lower the contact angle from about 40 ° to about 10 °.

In the case of a thin film capacitor, the thickness of the dielectric layer and the electrode layer is so small that it is difficult to apply the wet method. In particular, when an amorphous dielectric is used as the dielectric thin film, it cannot be applied because it is dissolved in a wet solution.

In consideration of this aspect, the present invention is to apply a dry method.

An example of the most preferred thin film capacitor embedded printed circuit board manufactured by applying the present invention is shown in FIG. A method of manufacturing such a printed circuit board will be described in more detail with reference to FIG. 3. The following description should not be construed as limiting the application of the present invention to a thin film capacitor having such a structure as one embodiment.

As shown in FIG. 3A, lower electrodes 21 and 22 are formed on the insulating substrate 10a.

The insulating substrate 10a may be used widely in a printed circuit board. Such examples include, but are not limited to, polyimide or epoxy.

The lower electrodes 21 and 22 are conductive metals applied to the thin film capacitor and are applicable. It is preferably one selected from the group consisting of widely used Cu, Ni, Al, Pt, Ta and Ag. Most preferably Cu is preferable.

Considering that the insulating substrate 10a is a thermally weak polymer substrate, the lower electrode should use a low temperature film forming process. As such an example, it is preferable to use a low temperature film forming process such as low temperature sputtering, evaporation, electroless plating or electroplating.

The electroplating method is most advantageous in terms of time and cost. Therefore, it is preferable to form the first lower electrode thin by electroless plating or PVD, and to form the second lower electrode by electroplating thereon. Preferably, the first lower electrode is made of electroless plating. The adhesion between the electroless plating layer and the electroplating layer is good.

 The first lower electrode is about 1 탆 or less and the second lower electrode is thickly formed as necessary. Preferably, the second lower electrode is formed to about 1 ~ 10㎛.

Although FIG. 3A illustrates the first lower electrode 21 and the second lower electrode 22 as lower electrodes, the lower electrode may be formed at a time by electroless plating or PVD as necessary.

After forming the dielectric thin film on the surface layer of the lower electrode as shown in Fig. 3 (b), the surface of the dielectric thin film is modified by plasma treatment. Plasma treatment may also be applied to the surface layer of the lower electrode. However, when the surface roughness of the lower electrode is increased and the thickness of the dielectric thin film becomes too thin, shorting may occur between the lower electrode and the upper electrode.

The dielectric thin film may be applied to a thin film capacitor, and is preferably formed at a low temperature of about 400 ° C. or less due to the process characteristics of the printed circuit board. Such a process includes a sputtering process, a PLD process or a CVD method. Metal oxides exhibiting sufficient permittivity even when formed at low temperatures can be applied. An example is an amorphous metal oxide, which does not require a high temperature heat treatment process for crystallization. A representative example of an amorphous dielectric is composed of BiZnNb-based metal oxides,

When expressed as Bi _x Zn _y Nb _z O ₇ , x, y, z is 1.3 <x <2.0, 0.8 <y <1.5, 1.4 <z <1.6. A technique of using a BiZnNb-based amorphous dielectric in a thin film capacitor of a printed circuit board has been presented in Korean Patent Application No. 2005-57907. This patent application also details the formation method.

The thickness of the dielectric thin film is preferably 2.0 μm or less.

Plasma-treated dielectric thin film portions as shown in Figs. 3 (c) and 3 (d).

The upper electrode is formed and plasma treated.

The metal seed layer 41 is required for electroplating the upper electrode on top of the dielectric. Of course, the upper electrode may be formed directly by electroless plating or PVD. However, this method requires a lot of time and money.

Therefore, the metal seed layer is formed of the first upper electrode 41. The first upper electrode 41 is preferably formed using an electroless plating method or a PVD method.

The metal seed layer is preferably one metal selected from the group consisting of Cu, Ni, Ti, Au, Co, Ag, Pt, and Pd. As for the thickness of a metal seed layer, 1.0 micrometer or less is preferable.

The plasma treatment for surface modification is also applied to the first upper electrode 41.

The second upper electrode 42 is formed on the first upper electrode 41. The second upper electrode 42 is preferably applied with electroplating. The upper electrode may be applied as long as it is a conductive metal applied to a printed circuit board. As such an example, one metal selected from the group consisting of Cu, Ni, Al, Pt, Ta and Ag is preferably applied. More preferably, it is made of Cu. In addition, the upper electrode is preferably 10 탆 or less.

The surface of the second upper electrode is plasma modified.

After the insulating base 10b is laminated on the second upper electrode 42, a printed circuit board having a thin film capacitor embedded therein may be manufactured using a conventional process of compressing the laminate.

When the electroless plating is used in the present invention, the electroless plating method is not particularly limited. For example, in the case of Cu electroless plating, the electroless plating bath may include Cu ions, EDTA, NaOH, formaldehyde components. At this time, when the pH of the plating bath is raised to 11 or more by controlling the NaOH input amount, a strong reducing action occurs in the formaldehyde to generate electrons. The electrons thus generated flow into Cu ions and can be plated.

In the present invention, a buffer layer 50 may be further formed between the dielectric thin film and the upper electrode as shown in FIG. The buffer layer 50 may improve adhesion between the amorphous dielectric and the upper electrode, and serves to prevent migration of metal atoms constituting the upper electrode. Therefore, when the buffer layer is formed, the thickness of the electrode can be increased. The buffer layer 26 is preferably formed of Ti or Cr. As for the thickness of the said buffer layer, 1.0 micrometer or less is preferable. The buffer layer is preferably formed by the PVD method, since the adhesion to the amorphous phase dielectric film can be improved.

The buffer layer 36 is preferably formed by a PVD method such as sputtering or E-beam.

As described above, the present invention is to form a thin film capacitor sequentially on the insulating substrate, it is effective to manufacture a printed circuit board containing a thin film capacitor through a conventional build-up printed circuit board manufacturing process Can be.

In addition, it is possible to improve the reliability of the product by effectively preventing the peeling phenomenon between the upper electrode and the insulating substrate that occurred in the conventional thin film capacitor.

Plasma treatment for surface modification in the present invention is to increase the roughness of the surface, it is to select the plasma conditions in terms of surface modification. Plasma treatment in terms of surface modification can be applied even at atmospheric pressure. The treatment time is most preferably 5 to 15 seconds. In the plasma treatment, in consideration of the reaction aspect and the cost, it is preferable to use Hell alone or Hell (He) and oxygen (O ₂ ) together. When oxygen (O ₂ ) is used together with Hellum (He), oxygen plays an active role.

In the case of He, 5 slm or more is more preferably 5-30 slm. In the case of using O ₂ together, O ₂ is preferably ₃ slm or less. If the amount of He or O ₂ exceeds the above conditions or the processing time is longer than the above conditions, the dielectric layer may be destroyed, and the amount of current flowing due to damage to the electrode layer is not constant, which may cause deterioration of electrical characteristics.

In the embodiment of the present invention, the plasma treatment was carried out at 750 torr (1 atm) for 10 seconds under conditions of He: 10 slm and O ₂ : 2 slm.

In the present invention, slm is standard liters per minute, and 1 slm corresponds to a consumption of 1 liter per minute at a pressure of 1 atm. When converted into units, it is as follows.

          1slm = 1000 sccm (standard cc per minute)

          = 60000 sccs (standard cc per second)

          = 60000 atm cc / s

In the plasma treatment, the gas volume is expressed as the product of pressure and volume, and the leakage volume is expressed as [pressure x volume] / [time].

Hereinafter, the present invention will be described in more detail with reference to Examples.

EXAMPLE

When manufacturing a thin film capacitor-embedded printed circuit board as shown in FIG. 2 (a), plasma treatment was performed on the dielectric layer and the upper electrode.

In the dielectric layer, a PLD process was formed on the lower electrode of Cu to form a metal oxide of BZN with a thickness of 4000 kPa. As the PLD target, one having a Bi _1.5 Zn _1.0 Nb _1.5 composition was used.

The upper electrode was electroplated with a thickness of 9 µm on a Cu seed layer of 0.5 µm.

Plasma treatment was performed at 750 Torr for 10 seconds under conditions of He (helum) 10 slm and O 2 (oxygen) 2 slm.

Surface roughness (Ra) was measured five times before and after plasma application on the surfaces of the dielectric thin film and the upper electrode, and the results are shown in Tables 1 and 2. Table 1 is for the dielectric thin film, and Table 2 is for the upper electrode.

division Surface roughness before plasma treatment (nm) Surface roughness (nm) after plasma treatment 1 time 210 320 Episode 2 240 360 3rd time 220 390 4 times 240 320 5 times 210 310 Average 224 340

division Surface roughness before plasma treatment (nm) Surface roughness (nm) after plasma treatment 1 time 300 440 Episode 2 310 390 3rd time 320 450 4 times 310 500 5 times 290 420 Average 306 440

As can be seen from Tables 1 and 2, the surface roughness of the dielectric thin film and the upper electrode in the printed circuit board manufactured according to the present invention is expected to improve the bonding strength.

In the present invention, the above embodiment is only one example, and the present invention is not limited thereto. Anything that has substantially the same configuration as the technical idea described in the claims of the present invention and achieves the same operation and effect is included in the technical scope of the present invention. Accordingly, various forms of substitution, modification, and alteration may be made within the scope of the present invention by those skilled in the art without departing from the technical spirit of the present invention described in the claims of the present invention. Will belong. For example, in the embodiment of the present invention, although BiZnNb-based metal oxide is used as an amorphous dielectric, other dielectrics can be used.

As described above, according to the present invention, it is possible to improve the reliability of the product by improving the surface roughness by the plasma surface modification treatment in the printed circuit board in which the thin film capacitor is embedded.

Claims (18)

Sequentially forming a lower electrode, a dielectric thin film, an upper electrode, and an insulating substrate on the insulating substrate; And at least one surface of the lower electrode, the dielectric thin film, and the upper electrode is further subjected to a plasma treatment step for surface modification prior to the formation of the upper layer. The method of manufacturing a printed circuit board with a thin film capacitor according to claim 1, wherein the dielectric thin film is an amorphous dielectric. The method of claim 2, wherein the amorphous dielectric is a BiZnNb-based metal oxide, when expressed as Bi _x Zn _y Nb _z O ₇ The x, y, z is 1.3 <x <2.0, 0.8 <y <1.5, 1.4 <z A method of manufacturing a printed circuit board with a thin film capacitor, characterized in that <1.6. The method of claim 1, wherein the forming of the lower electrode A method of manufacturing a printed circuit board with a thin film capacitor, comprising: forming an electroless plating layer with a first lower electrode, and then forming an electroplating layer with a second lower electrode and performing plasma treatment for surface modification of the electroplating layer. The method of claim 1, wherein the forming of the upper electrode, Forming a metal seed layer with a first upper electrode, and then forming an electroplating layer with a second upper electrode and plasma treatment for surface modification to the electroplating layer characterized in that the manufacturing method of the printed circuit board with a thin film capacitor. The method of claim 5, wherein the metal seed layer is formed by PVD or electroless plating. 6. The method of claim 5, wherein the metal seed layer is formed by PVD, and plasma treatment for surface modification is performed on the metal seed layer. The method of manufacturing a printed circuit board with a thin film capacitor according to any one of claims 1 to 7, wherein the plasma treatment is performed at atmospheric pressure for 5 to 15 seconds. The method of claim 8, wherein the plasma treatment is performed under a condition of at least 5 slm or at least 5 slm and at most 3 slm of oxygen. The method of claim 8, wherein the plasma treatment is performed under a condition of Hellum 5-30 slm or under Hellum 5-30 slm and oxygen 3 slm or less. The method of claim 1, wherein a buffer layer is further formed between the dielectric thin film and the upper electrode. The method of claim 1, wherein the buffer layer is formed of one metal selected from Ti or Cr. The method of claim 1, wherein the upper electrode and the lower electrode are one metal selected from the group consisting of Cu, Ni, Al, Pt, Ta, and Ag. The method of claim 1, wherein the dielectric thin film has a thickness of about 2.0 μm or less. The method of claim 1, wherein a thickness of the upper electrode is 10 μm or less. The method of claim 4, wherein the first lower electrode has a thickness of 1.0 μm or less, and the second lower electrode has a thickness of 1 μm to 10 μm. The printed circuit board of claim 5, wherein the metal seed layer is formed of one metal selected from the group consisting of Cu, Ni, Ti, Au, Co, Ag, Pt, and Pd. Manufacturing method. The method of claim 5, wherein the thickness of the metal seed layer is 1.0 μm or less.

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