KR100664851B1 - Image sensor having fly-eye lens and method for fabrication thereof - Google Patents

Abstract

The present invention is to provide an image sensor and a method of manufacturing the same that can prevent the abnormally incident or scattered light is reflected to the metal line to enter the photodiode to cause a smear effect, for this purpose, the light receiving area ; A microlens disposed above the light receiving area to overlap the light receiving area; And a plurality of metal lines having a stacked structure disposed between the light receiving region and the microlens so as not to overlap with the light receiving region, wherein the plurality of metal lines do not reflect light incident through the microlenses from the side thereof. An image sensor having a spacer using an antireflection film is provided.

In addition, the present invention comprises the steps of forming a first insulating film on a substrate having a predetermined process including photodiode formation; Forming a metal line on the first insulating layer; Forming a spacer using an anti-reflection film on the sidewall of the metal line such that incident light is not reflected from the side of the metal line; Forming a photoresist pattern for masking the metal lines; Growing a second insulating film from the exposed first insulating film by using a liquid phase deposition (LPD) method; And removing the photoresist pattern.

Image sensor, micro lens, LPD (Liquid Phase Deposition), IMD, PMD, spacer, anti-reflection film, smear effect.

Description

IMAGE SENSOR HAVING FLY-EYE LENS AND METHOD FOR FABRICATION THEREOF}             

1 is a cross-sectional view showing a portion of a unit pixel of a CMOS image sensor according to the prior art.

2 is a photograph showing a smear effect.

3 is a cross-sectional view showing a portion of a unit pixel of a CMOS image sensor according to an embodiment of the present invention.

4A to 4E are cross-sectional views illustrating a metal line forming manufacturing process of a CMOS image sensor according to an exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

SUB: Substrate P-epi: P-type Epilayer

PD: Photodiode Tx: Transfer Transistor

Rx: Reset transistor PMD: Insulation film before metal line formation

M1, M2: Metal Line IMD: Metal Line Insulation

PL: Protective ARC: Spacer

CF: Color Filter ML: Micro Lens

OCL1 to OCL3: Overcoat Layer

The present invention relates to an image sensor, and more particularly, to an image sensor and a method of manufacturing the same to improve the optical characteristics by changing the metal line structure.

The image sensor is a semiconductor device that converts an optical image into an electrical signal. Among them, a charge coupled device (CCD) is a device in which charge carriers are stored and transported in capacitors while individual MOS (Metal-Oxide-Silicon) capacitors are located in close proximity to each other.

On the other hand, CMOS (Complementary MOS) image sensors use CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. It is a device that adopts a switching system that sequentially detects output.

1 is a cross-sectional view showing a part of a unit pixel of a CMOS image sensor according to the prior art.

Referring to FIG. 1, a P-type epi layer (P-epi) is stacked on a high concentration P-type (P ++) substrate SUB. Hereinafter, a structure in which a P-type epi layer (P-epi) is stacked on a high concentration P-type (P ++) substrate SUB is referred to as a semiconductor layer.

A field oxide film (not shown) is formed locally in the semiconductor layer, and a plurality of transistors including a transfer transistor Tx and a reset transistor Rx are formed on the semiconductor layer.

N-type region (hereinafter referred to as n-region) by deep ion implantation below the surface of the semiconductor layer aligned to one side of the transfer gate and P-type region (hereinafter referred to as P0 region) located in the region in contact with the surface of the semiconductor layer. A pinned photodiode PD is formed.

A high concentration N-type (N +) floating diffusion region FD is formed by ion implantation under the surface of the semiconductor layer aligned on the other side of the transfer gate.

The pre-metal dielectric (hereinafter referred to as PMD) is formed on the entire surface where the photodiode PD and the transistor are formed, and the first metal line M1 is formed on the PMD.

An inter-metal dielectric (hereinafter, referred to as IMD) is formed on the first metal line M1, and a second metal line M2 is formed on the IMD.

The first and second metal lines M1 and M2 are used to connect power lines, signal lines, unit pixels, and logic circuits, and serve as shields to prevent light from being incident on areas other than the photodiode PD. At the same time.

In addition, although the second metal line M2 is shown as a final metal line here, a case in which the second metal line M2 includes a third or fourth metal line or more may exist.

A passivation layer (hereinafter referred to as PL) is formed on the second metal line M2 to passivate the underlying structure, and on the PL, a first overcoating layer to reduce a step caused by metal line formation is formed. Over Coating Layer (hereinafter referred to as OCL1) is formed, and on the OCL1, a color filter (hereinafter referred to as CF) for implementing RGB color is formed for each unit pixel. Here, PL usually forms a double structure of a nitride film / oxide film.

On the CF, a second overcoating layer (hereinafter referred to as OCL2) is formed to secure a process margin when forming the microlens, and a microlens (Micro-Lens; hereinafter referred to as ML) is formed on the OCL2.

Low Temperature Oxide (LTO) is formed on the ML to prevent the ML from being scratched or broken.

As can be seen in the structure of Figure 1, ML is used to maximize the CF characteristics of the CMOS image sensor. In general, the ML performs only a function of condensing incident light, like a general lens.

Image sensor has many things to consider unlike general logic transistor formation.

In large terms, one generates noise despite no signal, and the other generates noise by an unwanted signal.

In the former case, there is thermal noise or leakage current, in which a signal is emitted even though light does not enter. In the latter case, an unwanted signal is incident.

One such phenomenon is the smear effect, which is designed to drop the light-receiving portion of the metal line and the photodiode and to close the microlens and the photodiode to reduce the degree of freedom in forming the metal line.

In order to prevent the smear effect, accurate overlay management of microlenses, LTO, color filters, photodiodes, etc. is required. In addition, it is desirable to keep the metal line away from the photodiode so that no light is incident on the diffuse reflection from the adjacent metal line.

Reference numeral 'a' indicates that the photodiode responds to a normal optical signal, and reference numeral 'b' indicates that light incident on the photodiode is reflected in the metal line direction.

Reference numeral 'c' indicates that abnormally incident or scattered light that is not normally incident is reflected on the metal line and incident on the photodiode.

The smear effect may occur in the case of 'c', and may generate an unwanted signal such as interfering with 'a' and a normal signal.

2 is a photograph showing a smear effect.

Referring to FIG. 2, barrier metal (BM) and metal line (M) are stacked and formed, and abnormally incident or scattered light is reflected by the metal line (M) and is incident on the photodiode to form 'X' and You can see that it causes diffuse reflection.

As the barrier metal (BM), Ti, TiN, etc. are used, and since they have much lower reflectivity than Al or Cu used as the metal line (M) material, they can serve as anti-reflective coatings simultaneously. The bottom and top surfaces of (M) have low reflectivity, but the side surfaces show high reflectivity due to the exposed metal line (M).

If the metal line (M) is revealed, the smear effect occurs due to high diffuse reflection.

The present invention proposed to solve the above problems of the prior art, an image sensor and a manufacturing method that can prevent the abnormally incident or scattered light is reflected on the metal line incident to the photodiode to cause a smear effect The purpose is to provide.

In order to achieve the above object, the present invention, a light receiving area; A microlens disposed above the light receiving area to overlap the light receiving area; And a plurality of metal lines having a stacked structure disposed between the light receiving region and the microlens so as not to overlap with the light receiving region, wherein the plurality of metal lines do not reflect light incident through the microlenses from the side thereof. An image sensor having a spacer using an antireflection film is provided.

In addition, to achieve the above object, the present invention comprises the steps of: forming a first insulating film on a substrate having a predetermined process including photodiode formation; Forming a metal line on the first insulating layer; Forming a spacer using an anti-reflection film on the sidewall of the metal line such that incident light is not reflected from the side of the metal line; Forming a photoresist pattern for masking the metal lines; Growing a second insulating film from the exposed first insulating film by using a liquid phase deposition (LPD) method; And removing the photoresist pattern.

In order to prevent diffuse reflection at the side of the metal line due to side exposure of the metal line, the present invention arranges the spacer using an antireflection film such as a silicon nitride film on the side of the metal line.

To this end, first, a metal line is formed, and an antireflection film such as a silicon nitride film is deposited on the side thereof, and then formed as a spacer through front etching.

When the silicon nitride film is used as a spacer, it is advantageous to form an oxide film using a subsequent LPD (Liquid Phase Deposition) method, and it is possible to prevent corrosion of the side of the metal line by an acidic solution used when forming the oxide film using the LPD method.

After forming the spacer, the upper portion of the metal line is masked using a mask pattern, and then an oxide film is selectively formed only in the region between the metal lines by LPD method using the deposition method at room temperature. Subsequently, the metal line forming process is completed by removing the mask pattern and then depositing and planarizing a capping insulating film (eg, an intermetallic insulating film).

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

3 is a cross-sectional view showing a part of a unit pixel of a CMOS image sensor according to an exemplary embodiment of the present invention.

Referring to FIG. 3, a P-type epi layer (P-epi) is stacked on a high concentration P-type (P ++) substrate SUB. Hereinafter, a structure in which a P-type epi layer (P-epi) is stacked on a high concentration P-type (P ++) substrate SUB is called a semiconductor layer.

A field oxide film (not shown) is formed locally in the semiconductor layer, and a plurality of transistors including a transfer transistor Tx and a reset transistor Rx are formed on the semiconductor layer.

N-type region (hereinafter referred to as n-region) by deep ion implantation below the surface of the semiconductor layer aligned to one side of the transfer gate and P-type region (hereinafter referred to as P0 region) located in the region in contact with the surface of the semiconductor layer. A pinned photodiode PD is formed.

A high concentration N-type (N +) floating diffusion region FD is formed by ion implantation under the surface of the semiconductor layer aligned on the other side of the transfer gate.

An insulating film (hereinafter referred to as PMD) is formed on the entire surface where the photodiode PD and the transistor are formed, and a first metal line M1 is formed on the PMD.

An intermetallic insulating film (hereinafter referred to as IMD) is formed on the first metal line M1, and a second metal line M2 is formed on the IMD.

The first and second metal lines M1 and M2 are used to connect power lines, signal lines, unit pixels, and logic circuits, and serve as shields to prevent light from being incident on areas other than the photodiode PD. At the same time.

In addition, although the second metal line M2 is shown as a final metal line here, a case in which the second metal line M2 includes a third or fourth metal line or more may exist.

A protective film (hereinafter referred to as PL) is formed on the second metal line M2 to protect the lower structure, and on the PL, a first overcoating layer (hereinafter referred to as OCL1) is used to reduce the step difference caused by the formation of the metal line. On the OCL1, a color filter (hereinafter referred to as CF) for implementing RGB color for each unit pixel is formed. Here, PL usually forms a double structure of a nitride film / oxide film.

On the CF, a second overcoating layer (hereinafter referred to as OCL2) is formed to secure a process margin when forming the microlens, and a microlens (hereinafter referred to as ML) is formed on the OCL2.

LTO is formed on the ML to prevent the ML from being scratched or broken.

As can be seen from the above structure, in the present invention, spacers ARC are formed on side surfaces of the first and second metal lines M1 and M2 to serve as antireflection films. As the spacer (ARC) material, an insulating nitride film such as a silicon nitride film or a silicon oxynitride film serving as an antireflection film is used.

By arranging the spacer ARC, which serves as an anti-reflection film, on the side surfaces of the first and second metal lines M1 and M2, smear due to reflection generated from the side surfaces of the first and second metal lines M1 and M2. Since the effect can be prevented, the optical characteristics of the image sensor can be improved.

That is, in the conventional case, light such as 'C' reflected by the first and second metal lines M1 and M2 and incident on the photodiode PD is absorbed by the spacer ARC, which serves as an anti-reflection film. The smear effect due to diffuse reflection at the side surfaces of the first and second metal lines M1 and M2 can be suppressed.

Hereinafter, the metal line forming process of the image sensor having the structure of FIG. 3 will be described with reference to the accompanying drawings.

4A through 4E are cross-sectional views illustrating a metal line forming process of a CMOS image sensor according to an exemplary embodiment of the present invention.

As shown in FIG. 4A, a lower structure forming process for forming an image sensor such as a light receiving unit including a photodiode and a plurality of metal lines is performed.

Subsequently, a first insulating layer 400 is formed on the lower structure.

Here, the first insulating film 400 represents PMD or IMD, and is formed using a normal oxide film insulating film.

The first barrier layer 401, the metal line 402, and the second barrier layer 402 are deposited on the first insulating layer 400, and then selectively etched to form a second barrier layer 402 / metalline 402. ) / First back rear film 401 is formed.

The first barrier layer 401 serves as a medium for connecting the lower conductive structure and the metal line 402, and the lower conductive structure is omitted here.

The first and second barrier films 401 and 403 include Ti, TiN, Ta, TaN, or the like. When the first and second barrier films 401 and 403 are deposited, a physical vapor deposition (PVD) method is used, and the thickness of the first and second barrier films 401 and 403 is about 100 mW to 500 mW.

In addition to the PVD method, chemical vapor deposition (hereinafter, referred to as CVD) may be used. The metal line 402 includes Al, Cu, W, or the like.

As shown in Fig. 4B, a nitride film 404a for spacers is formed along the entire profile including the laminated structure.

The spacer nitride film 404a serves as an insulating and antireflection film, and an insulating nitride film such as a silicon nitride film is used to prevent corrosion of the metal line 402 due to exposure during the subsequent LPD process.

The spacer nitride film 404a has a thickness of 500 kPa to 1000 kPa and uses a plasma enhanced chemical vapor deposition (hereinafter referred to as PECVD) method.

As shown in FIG. 4C, the spacer 404b is formed on the sidewalls of the stacked structure formed by the metal lines 402 by etching the entire surface with a target from which the nitride nitride film 404a disposed on the front surface is removed.

The front surface etching uses an etching method using a plasma, and an equipment having a density of 1E11 ions / cm 3 of a middle ion is used as an etching apparatus.

As etching conditions, a pressure of 30 mTorr to 50 mTorr, a source power of 1000 W to 1500 W, and a bias power of 100 W to 300 W are used. CHF ₃ and O ₂ are used at 20SCCM to 30SCCM and Ar is used at 400SCCM to 600SCCM.

A cleaning process is then carried out to remove the etch byproducts of the polymer component.

The spacer 404b may not only serve as the anti-reflection film and the corrosion protection film as described above, but also may prevent the attack of the metal line 402 due to mis-alignment during subsequent via contact processing. It also serves to prevent.

As shown in FIG. 4D, a photoresist pattern 405 is formed on the second barrier film 403, that is, a mask pattern that masks only the upper portion of the metaalin 402.

Subsequently, the second insulating film 406 is grown from the first insulating film 400 using an optional LPD method. At this time, the second insulating film 406 is grown to the height of the metal line 402 or the second barrier film 403.

The thickness of the second insulating film 406 is preferably about 4000 kPa to about 5000 kPa.

Hereinafter, a process of forming the second insulating layer 406 using the selective LPD method will be described in more detail.

The substrate (not shown) on which the photoresist pattern 405 is formed is boric acid (H ₃ BO) in a supersaturated aqueous solution of hydrofluoric acid (H ₂ SiF ₆ ) at 25 ° C. to 35 ° C. _It is immersed in the aqueous solution which added ₃ ). As a result, the first insulating film in which the photoresist pattern 405 remains, that is, the second insulating film 406 of SiO ₂ series is not formed on the metal line 402 and the photoresist pattern 405 does not remain. On the 400, a second insulating film 406 of SiO ₂ series is grown.

The mechanism of formation of the SiO ₂ by LPD method is as follows.

H ₂ SiF ₆ + ₂ H ₂ O ↔ SiO ₂ + HF

Accordingly, SiO ₂ is formed in an aqueous hydroflolic acid (H ₂ SiF ₆ ) solution, and HF for etching SiO ₂ and residues is generated. To decompose the generated HF, boric acid (H ₃ BO ₃ ) is added at about 20% to 30% of the total aqueous solution. At this time, the selectivity and deposition rate of the photoresist are increased by the following reaction.

_{H 3 BO 3 + 4HF ↔ BF} 4 - + H 3 O + + 2H 2 O

As shown in FIG. 4E, the second insulating layer 406 and the metal line, which are selectively grown by removing the photoresist pattern 405 using the O ₂ plasma and increasing the sputtering effect by the bias power, are selectively grown. The step is alleviated by faceting a slight step between 402 intentionally shaved by sputtering.

The photoresist strip conditions at this time are as follows.

A pressure of 100 mTorr to 200 mTorr, a source power of 1800 W to 2000 W, and a bias power of 300 W to 500 W are used. O ₂ is used to 200SCCM ~ 300SCCM.

After depositing an insulating film (not shown) with a thickness of 2000 Å to 3000 에 on the entire surface, a small amount (1000 Å to 1500 Å) of the insulating film was used by chemical mechanical polishing (hereinafter referred to as CMP) method to completely flatten the insulating film. It is flattened by removing. As such, planarization may be achieved by using a partial CMP method, and the film uniformity of the insulating film may be improved, the cost may be reduced, and the dishing problem may be solved due to excessive CMP.

Subsequently, a third insulating film 407 is formed on the entire surface by using a PECVD method.

The third insulating film 407 is formed to a thickness of 5000 kPa to 6000 kPa.

As described above, the planarization is minimized by minimizing the step difference of IMD caused by the step generated when the metal line 402 is formed by using a selective LPD method when forming the second insulating film 406, It facilitates the formation of metal lines and photoresist patterns and via holes.

In addition, by using the deposition method at room temperature, the HDP (High Density Plasma) process is omitted to reduce damage caused by plasma (Damage).

In addition, the step is reduced by selective LPD oxide film formation, and then a partial CMP process is performed to achieve perfect flattening, thereby increasing the amount of polishing compared to the conventional process of performing planarization by CMP process after thick capping oxide film deposition. The cost increase and uniformity deterioration and dishing can be suppressed.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

For example, in the above-described embodiment of the present invention, the CMOS image sensor is taken as an example, but it is also applicable to all image sensors having the light receiving unit and the microlens.

The present invention as described above, by improving the optical characteristics by reducing the smear effect, can improve the performance of the image sensor, there is an effect of increasing the yield by improving the process margin.

Claims (15)

Light receiving area; A microlens disposed above the light receiving area to overlap the light receiving area; And A plurality of metal lines having a stacked structure disposed between the light receiving region and the microlens so as not to overlap with the light receiving region, The plurality of metal lines has a spacer using an anti-reflection film so that the light incident through the microlens is not reflected from the side, the image sensor, characterized in that the barrier metal is laminated on the upper and lower. The method of claim 1, The spacer comprises an insulating nitride film. delete Forming a first insulating film on a substrate having a predetermined process including photodiode formation; Forming a metal line on the first insulating layer; Forming a spacer using an anti-reflection film on the sidewall of the metal line such that incident light is not reflected from the side of the metal line; Forming a photoresist pattern for masking the metal lines; Growing a second insulating film from the exposed first insulating film by using a liquid phase deposition (LPD) method; And Removing the photoresist pattern Image sensor manufacturing method comprising a. The method of claim 4, wherein The spacer is an image sensor manufacturing method characterized in that it comprises an insulating nitride film. The method of claim 5, Forming the spacers, Forming a spacer nitride film along the profile in which the metal line is formed, and forming a spacer on the sidewall of the metal line by performing a front-side etching with a target from which the spacer nitride film is removed from the front surface. Image sensor manufacturing method. The method of claim 6, And a nitride film for spacers having a thickness of 500 kPa to 1000 kPa. The method of claim 6, In the front etching step, An image sensor comprising a device having a density of heavy ions having 1E11 ions / cm 3, and using an etching condition as a pressure of 30 mTorr to 50 mTorr, a source power of 1000 W to 1500 W, and a bias power of 100 W to 300 W Manufacturing method. The method of claim 8, In the front etching step, CHF ₃ and O ₂ of 20SCCM to 30SCCM and 400SCCM to 600SCCM Ar using an image sensor manufacturing method. The method of claim 4, wherein And the first and second insulating films comprise SiO ₂ . The method of claim 4, wherein In the step of growing the second insulating film, Immerse the substrate in an aqueous solution of boric acid (H ₃ BO ₃ ) added to the supersaturated hydroflolic acid (H ₂ SiF ₆ ) at 25 ° C. to 35 ° C. at a rate of 25% to 30%. Sensor manufacturing method. The method of claim 4, wherein And growing the second insulating film to a thickness of 4000 kPa to 5000 kPa. The method of claim 4, wherein In removing the photoresist pattern, A pressure of 100mTorr to 200mTorr, a source power of 1800W to 2000W, a bias power of 300W to 500W, and O ₂ of 200SCCM to 300SCCM. The method of claim 4, wherein After the step of removing the photoresist pattern, Depositing a third insulating film having a thickness of 2000 mV to 3000 mW on the entire surface from which the photoresist pattern has been removed; Image sensor manufacturing method characterized in that it further comprises. The method of claim 14, And after the performing the chemical mechanical polishing process, forming a fourth insulating film having a thickness of 5000 kPa to 6000 kPa.

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