KR100660160B1 - Flash Memory Device Comprising Floating Gate Utilizing Nanocrystals Embeded In Polymer Formed On Tunneling Insulating Layer - Google Patents

Abstract

High-efficiency, low-cost flash memory devices with nano-floating gates using Ni _1-x Fe _x (0 <x <0.5) nanocrystals spontaneously formed in a polymer thin film on a tunneling insulating layer are electrically stable due to long charge retention time in the floating gate. Do. In addition, sputtering Ni _1-x Fe _x on the tunneling insulating layer, dissolving an acidic precursor containing an insulator polymer monomer on the sputtered Ni _1-x Fe _x layer in a solvent, spin coating and removing residual solvent And applying heat to the polymer material to form Ni _1-x Fe _x nanocrystals inside the coated polymer material. The size and density of the Ni _1-x Fe _x nanocrystals according to the method of manufacturing a flash memory device. It is easy to adjust, and this can improve the performance of the nano-floating gate.

Flash memory, nanocrystals, floating gates, polymer thin films, tunneling insulation layers

Description

Flash Memory Device Comprising Floating Gate Utilizing Nanocrystals Embeded In Polymer Formed On Tunneling Insulating Layer}

1 is a transmission electron microscope photograph of Ni _1-x Fe _x nanocrystals formed of nanocrystals in a polyimide thin film (top: plane, bottom: cross section).

2 is a Selected Area Electron Diffraction pattern image of Ni _1-x Fe _x nanocrystals formed of nanocrystals in a polyimide thin film.

3 is a schematic diagram of a flash memory device having a nano floating gate using Ni _1-x Fe _x nanocrystals formed in a polyimide over a tunneling insulating layer.

FIG. 4 is a graph illustrating capacitance values measured by applying a voltage to a flash memory device manufactured in an embodiment of the present invention.

FIG. 5 is a graph illustrating conductance by applying a voltage to a flash memory device manufactured in an embodiment of the present invention.

* Explanation of symbols for main parts of drawings *

100: semiconductor substrate 101: source region 102: drain region

110: tunneling insulating layer 120: polymer thin film 121: Ni _1-x Fe _x nanocrystals

130: control gate

The present invention relates to a highly efficient low cost flash memory device having a floating gate using nanocrystals.

Rapid advances in nanostructure formation technology have made it possible to manufacture nanoscale electronic and optoelectronic devices. Such nanoscale quantum structures have very good potential applications in next generation memory devices. Among the nanoscale memory devices, nonvolatile memory devices having nanoscale gates are very promising to be used as low power and ultra high density elements because they can be operated with low power consumption by using nanoscale floating gates.

Flash memory devices using nanoparticles have been extensively studied using various methods to develop their potential applicability so that nanoparticles act as charge and discharge islands. Oxidation (E. Leobandung, L. Guo, Y. Wang, and SY Chou, Appl. Phys. Lett . 67 , 938, (1995)), wet etching (H. Ishikuro, T. Fujii, T. Saraya, G. Hashiguchi, T. Hiramoto, and T. Ikoma, Appl. Phys. Lett . 68 , 3585, (1996)), ES Snow and PM Cambell, Appl. Phys. Lett. 64 , 1932 (1994) ), Nuclear microscope (K. Matsumoto, M. Ishii, K. Segawa, Y. Oka, BJ Vartanian, and JS Harris, Appl. Phys. Lett. 68 , 34 (1996)) and focused ion beam processes (TW Kim, Nanoparticles were formed using techniques such as DC Choo, JH Shim, and SO Kang, Appl. Phys. Lett. 80 , 2168 (2002)).

Recently, research on nanoparticles confined in three dimensions in an insulating layer has been extensively studied for application to nonvolatile flash memory devices having a nanoscale floating gate. Some studies are even intended to form Si particles in SiO ₂ using a scanning probe, e-beam and X-ray method (S. Huang, S. Banerjee, RT Tung, and S. Oda, J. Appl. Phys . 94 , 7261 (2003), SJ Lee, YS Shim, HY Cho, DY Kim, TW Kim, and KL Wang, Jpn. J. Appl. Phys. 42 , 7180 (2003), S. Huang, S. Banerjee , RT Tung, and S. Oda, J. Appl. Phys. 93 , 576 (2003))

However, no research has yet been reported on how simple techniques can be used to produce self-formed nanoparticles in alternative insulating layers.

Recently, development of new materials to replace SiO ₂ , which is mainly used as an insulator, is required. Among them, polyimide, an organic insulating material, has emerged as a material to replace the existing inorganic insulating material. Because of their unique thermal, mechanical, and dielectric properties, polyimides are widely used in the high-precision electronics industry in many fields, including insulated interlayers of integrated circuits and high-density interconnect package. In particular, the dielectric constant of polyimide is known to be lower than that of conventional inorganic materials.

Meanwhile, a flash memory device generally includes a tunnel oxide film of a thin film on a silicon substrate, a floating gate made of polysilicon on the silicon substrate, an insulating film between gate electrodes formed on the floating gate electrode, and a control applied with a predetermined voltage. ) A gate electrode is provided.

Conventionally, an insulating film formed on the floating gate and the floating gate electrode has to be formed in a separate step, and it is difficult to control the size or density of the nanoparticles.

Therefore, in forming a nano floating gate of a flash memory device, which is a next generation memory device, it is possible to control the particle size and density and the material capable of being constrained to the nanocrystals by the transmission of electrons from the substrate even at a low voltage at room temperature. Technology has been required.

There is also a need to develop a flash memory device that operates electrically stably by extending the charge retention time in the floating gate.

The present invention is to solve the above problems and to provide a high-efficiency low-cost flash memory including a floating gate using the Ni _1-x Fe _x nanocrystals spontaneously formed in the polymer on the tunneling insulating layer.

In another aspect of the present invention, a method of manufacturing a flash memory device is provided by simply forming Ni _1-x Fe _x nanocrystals in a polymer through a simple deposition method and heat treatment on a tunneling insulating layer.

In order to achieve the above object, the present invention provides a method for producing a floating gate by forming Ni _1-x Fe _x nanocrystals in the polymer layer by using a selective reaction of the Ni _1-x Fe _x film during curing of the polymer precursor. do.

The floating gate is preferably formed on the tunneling insulating layer.

It is preferred that the amount of nickel is relatively high compared to iron, in particular x being between 0 and 0.5.

Hereinafter, the configuration of the present invention in more detail.

A flash memory device of the present invention comprises a semiconductor substrate having an active region; A drain region and a source region formed in the active region and spaced apart from each other; A tunneling insulating layer formed on the channel region between the drain region and the source region; It is formed on the tunneling insulating layer, and comprises a floating gate consisting of Ni _1-x Fe _x nanocrystals in the polymer thin film and a control gate electrically separated by the polymer thin film on the floating gate. Ni _1-x Fe _x nanocrystals in the polymer thin film may be formed in a single layer or multiple layers.

The tunneling insulating layer may be omitted and is preferably composed of SiO ₂ .

Preferably, the polymer thin film is a polyimide thin film.

In addition, the method of manufacturing a flash memory device of the present invention comprises the steps of forming a tunneling insulating layer on the entire surface of the semiconductor substrate, forming a floating gate spontaneously formed Ni _1-x Fe _x nanocrystals in the polymer thin film on the tunneling insulating layer Forming a source and a drain on both sides of the floating gate; and sequentially forming a control gate on an entire upper surface thereof. Forming the tunneling insulating layer may be omitted. However, the formation of the tunneling insulating layer can increase the retention time of the electrons of the nanocrystals.

Preferably, the step of forming the floating gate, the acid precursor solvent, comprising the step, insulator polymeric monomer over the Ni _1-x Fe _x layer sputtered _1-x Fe _x layer Ni on the tunneling insulating layer Dissolving in spin coating, removing the solvent from the coated acidic precursor, and applying heat to the polymeric material to cause crosslinking within the coated acidic precursor.

The forming of the floating gate may be performed by dissolving an acidic precursor containing an insulator polymer monomer in a solvent to form a liquid phase before sputtering the Ni _1-x Fe _x layer, and then spin it on the semiconductor substrate. The method may further include coating and removing the solvent from the coated acidic precursor.

The solvent of the present invention may select one or more mixtures selected from N-Metyl-2-Pyrrolidone (NMP), water, N-dimethylacetamide, and diglyme according to the type of insulator precursor.

It is preferable that the said acidic precursor is an acidic precursor containing a carboxyl group.

According to the present invention, a floating gate in which high-density nanocrystals dispersed in a polyimide thin film can be formed. It is possible to control the size and density of the nanocrystals formed by varying the composition at Ni _1-x Fe _x , the deposited thickness, the mixing ratio of the solvent and precursor, and the conditions of the curing process. It is easy.

In general, the dielectric constant of the polyimide is about 2.9, so the polyimide thin film of the present invention can replace the tunneling insulating layer of the conventional flash memory device, but by additionally forming the tunneling insulating layer, the retention time of the charge in the floating gate is extended. The flash memory device can operate more electrically and stably.

Example

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Example 1 Ni in a Polyimide Thin Film _1-x Fe _x  Formation of Nanocrystals

A Ni _0.8 Fe _0.2 layer was formed on the silicon substrate by a sputtering process with a thickness of 5 nm. On top of that, N-Metyl-2-Pyrrolidone (NMP) was used as a solvent, and the precursor Biphenyltetracaboxylic Dianhydide-p-Phenylenediamine (BPDA-PDA) (PI2610D, Dupont) type polyamic acid was spin-coated at a volume ratio of 1: 3. The polyamic acid was added by heating PI / Ni _0.8 Fe _0.2 / PI / n-Si at 135 ° C. for 30 minutes to evaporate and remove the residual solvent at 400 ° C. for 1 hour under a pressure of about 10 ⁻³ Pa. Cured with polyimide. The first deposited PI layer was used as the tunneling film and the second deposited PI layer was used as the insulating layer.

Example 2: Ni in a Polyimide Thin Film _1-x Fe _x  TEM results of nanocrystals

Ni _0.8 Fe _0.2 nanocrystals in the PI thin film prepared in Example 1 were observed in a JEM 2010 JEOL transmission electron microscope (TEM) and are shown in FIG. 1. According to the planar bright field image of FIG. 1, Ni _1-x Fe _x nanocrystals were dispersed in a polyimide thin film, and the size of Ni _0.8 Fe _0.2 nanocrystals was 4-6 nm or less, and the surface density of the nanocrystals was about 2 × 10. ¹² cm ^-2 . According to the cross-sectional bright field below FIG. 1, the Ni _1-x Fe _x nanocrystals are located in a single layer. The lateral size of Ni _1-x Fe _x is between about 4-6 nm. The thickness of the tunnel film polyimide layer and the polyimide insulating layer was about 40 nm.

Example 3: Ni in a Polyimide Thin Film _1-x Fe _x  SADP Results of Nanocrystals

2 is a Selected Area Electron Diffraction pattern image of Ni _1-x Fe _x nanocrystals formed of nanocrystals in a polyimide thin film. From this, it can be seen that the nanocrystals have a face-centered cubic structure and a diffraction ring due to the small particle size appears.

Example 4 Flash Memory Device Fabrication

A flash memory device having an Al / PI / Ni _1-x Fe _x / PI / p-Si structure according to an embodiment of the present invention was manufactured. A Ni _0.8 Fe _0.2 layer is formed on the semiconductor substrate 100, for example, a silicon substrate doped with P-type impurities by a sputtering process. The acid precursor of polyimide was dissolved in NMP to form a liquid phase on the Ni _0.8 Fe _0.2 layer, followed by spin coating, followed by applying heat to laminate a polyimide thin film. After heating at 135 ° C. for 30 minutes to evaporate the remaining solvent, and heating at 400 ° C. for 1 hour under a pressure of about 10 ⁻³ Pa to cure the polyamic acid with polyimide, Ni _0.8 Fe _0.2 and polyimide were combined. To form Ni _0.8 Fe _0.2 nanocrystals. At this time, Ni _0.8 Fe _0.2 layer nanocrystals are formed in a uniform distribution within the polyimide thin film. Source and drain regions are formed on both sides of the polyimide thin film, and a control gate made of Al is formed on the polyimide thin film.

Example 5 Fabrication of a Flash Memory Device Including a Tunneling Insulation Layer

3 is a metal / PI / Ni _1-x Fe _x / PI / SiO ₂ / p-Si flash memory according to an embodiment of the present invention further comprising a tunneling insulating layer for the flash memory device manufactured in Example 4; Schematic diagram of the device. Referring to FIG. 3, a tunneling insulating layer is formed on a semiconductor substrate 100, for example, a silicon substrate doped with P-type impurities. For example, O ₂ is supplied to the silicon substrate at 900 ° C. for several hours to form a high quality tunneling insulating layer having a thickness of 4 to 8 nm. A Ni _1-x Fe _x (0 <x, 0.5), for example Ni _0.8 Fe _0.2 layer is grown on the tunneling insulating layer. The Ni _1-x Fe _x (0 <x, 0.5) layer may be formed to 5 nm or less by a sputtering process. The acid precursor of polyimide was dissolved in NMP to form a liquid phase on the Ni _0.8 Fe _0.2 layer, followed by spin coating, followed by applying heat to laminate a polyimide thin film. After heating at 135 ° C. for 30 minutes to evaporate the remaining solvent, and heating at 400 ° C. for 1 hour under a pressure of about 10 ⁻³ Pa to cure the polyamic acid with polyimide, Ni _0.8 Fe _0.2 and polyimide were combined. As a result, a floating gate 120 spontaneously formed with Ni _0.8 Fe _0.2 nanocrystals 121 is formed in the polyimide. At this time, Ni _0.8 Fe _0.2 layer nanocrystals 121 are formed in a uniform distribution throughout the polyimide thin film. Source and drain regions 101 and 102 are formed on both sides of the polyimide thin film by ion implantation, and a control gate 130 including a metal gate such as Al is formed on the polyimide thin film.

Since the flash memory device of the present embodiment further includes a separate tunneling insulating layer with respect to the flash memory device of Example 4, it is possible to increase the retention time of electrons trapped in the nanocrystals and is more chemically and electrically stable.

When writing to the memory device, the source and the drain are in a floating state, and a write voltage is applied to the gate and the substrate. Electrons formed in the inversion layer of the channel are trapped in the Ni _1-x Fe _x nanocrystals in the polyimide through the tunneling process. When electrons are trapped in the Ni _1-x Fe _x nanocrystals, the device's threshold voltage is high, so that no current flows in the channel at a given read voltage.

In the erase process of the memory device, a source and a drain are left in a floating state, and an erase voltage is applied to the gate and the substrate. The electrons trapped in the Ni _1-x Fe _x nanocrystals in the polyimide are tunneled and released to the substrate. It is left in the polyimide, and a write voltage is applied to the gate and the substrate. The electrons formed in the inversion layer of the channel pass through the tunneling process, and when there is no electron in the Ni _1-x Fe _x nanocrystals in the polyimide, the threshold voltage of the device is lowered again, and when a read voltage is applied, current flows in the channel.

Thus, by applying a read voltage to V _GB and applying a voltage to V _DS , it is possible to read the presence or absence of electrons in the Ni _1-x Fe _x nanocrystals from which no current flows or flows, from which data "1" or "0" can be read. Read ".

Example 5: Al / PI / Ni _1-x Fe _x Capacity-Voltage Characteristics at / PI / n-Si

4 is a capacitance of the Al / polyimide / Ni _1-x Fe _x nanocrystals / polyimide / p-Si structure having a nano-floating gate using Ni _1-x Fe _x nanocrystals prepared in Example 4- It is a graph showing the voltage characteristics. Arrow 1 is when the voltage is applied in the forward direction, arrow 2 is the capacitance-voltage value observed when the voltage is applied in the reverse direction. The CV results are similar to the CV results of metal-insulator-semiconductor (MIS) memory devices with floating gates using nanocrystalline Si with charge trap regions. Clockwise hysteresis in CV characteristics indicates that the nanocrystals have captured charge.

Example 6: Al / PI / Ni _1-x Fe _x Conductance-Voltage at / PI / n-Si

FIG. 5 is a conductance-voltage for Al / polyimide / Ni _1-x Fe _x nanocrystals / polyimide / p-Si structure having a nano-floating gate using Ni _1-x Fe _x nanocrystals prepared in Example 4. FIG. It is a graph showing the characteristics. In the forward and reverse GV measurements, there is a wide peak around the GV flatband voltage, which is related to the energy loss of Ni _1-x Fe _x nanocrystals. These results indicate that Al / polyimide / Ni _1-x Fe _x nanocrystals / polyimide / p-Si (100) structures can be used as floating gates in nonvolatile single electronic memory devices.

According to the present invention, a floating gate structure in which Ni _1-x Fe _x (0 <x <0.5) nanocrystals are formed in the tunneling insulating layer and the polyimide layer is capable of high-speed writing and erasing, and has a high charge retention time. Long flash memory devices can be fabricated. In addition, according to the method of manufacturing a flash memory device of the present invention, the size and density of nanocrystals can be controlled without agglomeration of crystals, and an insulating layer on the floating gate and the floating gate can be simultaneously formed. In addition, by using a nano-floating gate that is electrically and chemically more stable than conventional nano-floating gates, there is an excellent effect of providing a memory device of a high-efficiency low-cost nano-floating gate and is a very useful invention in the field of information and electronic communication.

Claims (14)

A semiconductor substrate having an active region; A drain region and a source region formed in the active region and spaced apart from each other; A tunneling insulating layer formed on the channel region between the drain region and the source region; A floating gate formed on the tunneling insulating layer and composed of Ni _1-x Fe _x nanocrystals in the polymer thin film; And a control gate electrically separated by the polymer thin film on the floating gate. The flash memory device of claim 1, wherein the polymer thin film is a polyimide thin film. The flash memory device of claim 1, wherein the tunneling insulating layer is formed of an SiO ₂ layer. The flash memory device of claim 1, wherein x is in the range of 0 <x <0.5. The flash memory device of claim 4, wherein x is 0.2. Sputtering a Ni _1-x Fe _x (0 <x <0.5) layer on the substrate or insulating layer; Spin coating by dissolving an acidic precursor containing an insulator polymer monomer in a solvent on the Ni _1-x Fe _x (0 <x <0.5) layer; Removing solvent from the coated acidic precursor and applying heat to the polymer material such that crosslinking occurs within the coated acidic precursor and the Ni _1-x Fe _x (0 <x < 0.5) A floating gate forming method in which nanocrystals are spontaneously formed. The method of claim 6, before the step of sputtering the Ni _1-x Fe _x (0 <x <0.5) layer is dissolved in a solvent spin coating acidic precursor containing an insulator polymer monomer in a solvent and the remaining solvent And removing the floating gate. The method of claim 6, wherein the polymer is a polyimide and the acid precursor is an acid precursor including a carboxyl group. The method of claim 6, wherein the solvent is one or more mixtures selected from N-methyl-2-pyrrolidone (NMP), water, N-dimethylacetamide, diglyme In-Floating Gate Formation Method. Forming a tunneling insulating layer on the front surface of the semiconductor substrate; Forming a floating gate on which the Ni _1-x Fe _x (0 <x <0.5) nanocrystals are spontaneously formed in the polymer thin film according to any one of claims 6 to 9 on the tunneling insulating layer; Forming a source and a drain on both sides of the floating gate, and sequentially forming a control gate on the floating gate. The method of claim 10, wherein the tunneling insulating layer is made of SiO ₂ . Forming a SiO ₂ tunneling insulating layer on the front surface of the semiconductor substrate; Sputtering Ni _1-x Fe _x (0 <x <0.5) over the insulating layer; On the sputtered Ni _1-x Fe _x (0 <x <0.5) layer, the solvent N-methyl-2-pyrrolidone (NMP) and the precursor biphenyltetracarboxylic dianhydride Mixing a spin-coated polyamic acid of the form of phenyl-p-phenylenediamine (BPDA-PDA) and removing residual solvent; And Applying heat to the polyimide layer to form Ni _1-x Fe _x nanocrystals in the polyimide layer. The method of claim 10, wherein x is 0.2. The method of claim 12, wherein x is 0.2.

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