CN1969386B - Flash memory device utilizing nanocrystals embedded in polymer - Google Patents

Flash memory device utilizing nanocrystals embedded in polymer Download PDF

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Publication number
CN1969386B
CN1969386B CN2005800103469A CN200580010346A CN1969386B CN 1969386 B CN1969386 B CN 1969386B CN 2005800103469 A CN2005800103469 A CN 2005800103469A CN 200580010346 A CN200580010346 A CN 200580010346A CN 1969386 B CN1969386 B CN 1969386B
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flash memory
memory device
floating boom
semiconductor substrate
polymer film
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CN1969386A (en
Inventor
金太焕
金暎镐
尹钟昇
金宰浩
郑载勋
林圣根
宋文燮
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Samsung Electronics Co Ltd
Industry University Cooperation Foundation IUCF HYU
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Samsung Electronics Co Ltd
Industry University Cooperation Foundation IUCF HYU
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Priority claimed from KR1020040088769A external-priority patent/KR100660159B1/en
Application filed by Samsung Electronics Co Ltd, Industry University Cooperation Foundation IUCF HYU filed Critical Samsung Electronics Co Ltd
Priority claimed from PCT/KR2005/000161 external-priority patent/WO2005093837A1/en
Publication of CN1969386A publication Critical patent/CN1969386A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate

Abstract

The present invention relates to a flash memory device with a nanoscale floating gate and a method for manufacturing thereof, more particularly, the flash memory device with a nanoscale floating gate of highly efficient and cost effective by utilizing self-assembled nanocrystals embedded in a polymer film. The present invention provides much simpler and easier method for manufacturing nanocrystalines for the flash memory device than the conventional method. Since the nanocrystalines is homogeneously dispersed as a polymer layer without agglomeration, size and density of the nanoparticles may be controlled. Additionally, the present invention provides memory devices with nanoscale floating gates of high efficient and cost effective and the method for manufacturing the same by employing electrically and chemically more stable nanosacle floating gates compared to the conventional ones.

Description

Adopt the flash memory device of the nanocrystal in the embedded polymer thing
Technical field
The present invention relates to a kind of flash memory device and manufacture method thereof that has the nanoscale floating boom, be specifically related to a kind of flash memory device that has the low nanoscale floating boom of the efficient height that adopts the self-assembled nanometer crystal in the embedded polymer thing film and cost.
Background technology
Flash memory is to combine with the electric erasable of EEPROM (electrically erasable ROM) to develop by the little memory cell areas with EPROM (erasable programmable ROM) to form, EEPROM like that entirely wipes and programming again so that be different from, be more prone to thereby make to rewrite, it is faster to work.
Flash memory can be used for various electronic equipments, for example, and nearly all mainboard BIOS chip, mobile phone, set-top box, digital camera, DVD player, MP3 player, game machine etc.
Three-dimensional limited nano junction crystal in the embedding medium layer has been widely studied the non-volatile flash memory that is used to have the nanoscale grid.Although about embedding SiO 2In some researchs of silicon nano used scanning validation (scanning prove), e-bundle and x-ray method (S.Huang, S.Banerjee, R.T.Tung, and S.Oda, J.Appl.Phys.94,7261 (2003); S.J.Lee, Y.S.Shim, H.Y.Cho, D.Y.Kim, T.W.Kim, and K.L.Wang, Jpn.J.Appl.Phys.42,7180 (2003); S.Huang, S.Banerjee, R.T.Tung, and S.Oda, J Appl.Phys.93,576 (2003)), done guiding, but be to use simple technique that the research that the self-assembled nanometer particle embeds selectable insulating barrier was not also carried out.
SiO 2Main at present as dielectric layer, replace its demand constantly to increase with new material.Polyimides is as a kind of organic media insulating material, is developed to be used for substituting traditional inorganic medium insulating material.Because thermal characteristic, mechanical property, the build-in attribute of polyimides, it has been widely used in various ultraprecise electronics field, comprises insulating intermediate layer, the high density interconnect encapsulation of integrated circuit.It should be noted that especially the traditional inorganic material of the permittivity ratio of polyimides is low.
Flash memory device generally comprises thereon the floating boom that is made of polysilicon of thin tunnel oxide on the silicon substrate, position, be formed on the insulating barrier between the grid that floating boom extremely goes up and allow the control grid of appropriate voltage.
The shortcoming of conventional tunnel oxide is to need complicated manufacturing process and high program voltage.
Therefore, flash memory of future generation very need be developed and can easily control the size of particle and the technology of density, and can be on substrate the nano material of low-voltage transmission electronic.
Summary of the invention
In view of this, the purpose of this invention is to provide a kind of flash memory device that has the low nanoscale floating boom of the efficient height that utilizes metal or metal oxide nano crystalline solid and cost, wherein, in order to solve above-mentioned shortcoming, the nano junction crystal is easy to form in polymer with simple evaporation and heat treatment, and does not need to form tunnel oxide.
For reaching aforementioned purpose, according to an aspect of the present invention, provide a kind of flash memory device, this flash memory device comprises: Semiconductor substrate; Be formed in the active region but drain region separated from one another and source area; And the channel region between drain region and the source area, wherein channel region forms near source area, and comprises the floating boom that is made of metal in the thin polymer film or metal oxide nano crystalline solid and be formed on the floating boom and by the control gate of thin polymer film electric insulation.
Metal in the thin polymer film or metal oxide nano crystalline solid can form in the single layer in multilayer.
Especially, thin polymer film is a polyimide film.
The example of metal oxide comprises: zinc oxide, Cu oxide, ferriferous oxide, cadmium oxide, cobalt/cobalt oxide, bismuth oxide, nickel oxide, indium oxide and tin-oxide; The example of metal comprises: copper, zinc, tin, cobalt, iron, cadmium, lead, magnesium, barium, molybdenum, indium, nickel, tungsten, bismuth, silver, manganese and their mixture.
Manufacturing comprises according to the method for flash memory device of the present invention: form floating boom on Semiconductor substrate, it is made of metal in the dielectric polymer film or metal oxide nano crystalline solid; And form source area and drain region at the floating boom two ends, and on polymer foil, form control gate.
The method that forms floating boom preferably includes: metallizing on Semiconductor substrate, spin coating contains the acidic precursor that is dissolved in the dielectric polymers in the solvent on metal coating, and removes residual solvent, and heating is to obtain the cross-bond between the coated polymer.
According to the preferred embodiments of the present invention, the method that forms floating boom further comprises: before metallizing on the Semiconductor substrate, spin coating contains the acidic precursor that is dissolved in the dielectric polymers in the solvent and removes residual solvent on Semiconductor substrate earlier.
The metal that is coated on the Semiconductor substrate preferably can be selected from copper, zinc, tin, cobalt, iron, cadmium, lead, magnesium, barium, molybdenum, indium, nickel, tungsten, bismuth, silver, manganese and their mixture; And acidic precursor is the acidic precursor with carboxyl.
Metal alloy is Ni 1-xFe x, wherein X is preferably 0＜X＜0.5.
After forming cross-bond, if coated metal and the acidic precursor reaction that contains dielectric polymers then form the metal oxide nano crystalline solid in thin polymer film.On the other hand, if therefore coated stabilized metal also has low activity, then form the metallic nanocrystalline body.
Can adopt the method for known evaporation or sputter to come metallizing.
The example of solvent comprises: N-N-methyl-2-2-pyrrolidone N-(NMP), water, N-dimethylacetylamide, diethylene glycol dimethyl ether or their mixture.
The method that forms floating boom preferably includes: use any deposition process coating thickness on substrate to be at least a metal or alloy of 1nm to 30nm, the precursor of biphenyl tetracarboxylic dianhydride-p-phenylenediamine (PPD) (BPDA-PDA) type polyamic acid on the substrate of metallizing in the spin coating N-N-methyl-2-2-pyrrolidone N-(NMP), and 300-400 ℃ of solidified coating 1 hour.
The present invention allows to form and has the floating boom that embeds the high density nano junction crystal in the polyimide film, and is easy to the further size and the density of control nano junction crystal such as mixing ratio, condition of cure by control metal types, original metal coating layer thickness, solvent and precursor.
The dielectric constant of polyimides generally is about 2.9, and the present invention adopts polyimides to replace traditional tunnel oxide.The nanocrystal body and function that embeds polyimides is made floating boom.Therefore, owing to do not need to form independent tunnel oxide, so can reduce the thickness of flash memory device of the present invention.
Description of drawings
Fig. 1 is for embedding transmission electron microscope (TEM) microphoto of the ZnO nano junction crystal in the polyimides.
Fig. 2 is the cross section TEM microphoto that contains the polyimide film of ZnO nano junction crystal.
Fig. 3 is for embedding the Cu in the polyimides 2The TEM microphoto of O nano junction crystal.
Fig. 4 is for embedding the Ni in the polyimides 1-xFe xThe TEM microphoto of nano junction crystal (last figure is the bottom surface, and figure below is the cross section).
Fig. 5 is for embedding the Ni in the polyimides 1-xFe xThe electron diffraction pattern in the selected zone of nano junction crystal.
Fig. 6 is for adopting the Ni that embeds in the polyimides 1-xFe xThe schematic diagram of the flash memory device that has the nanoscale floating boom of synthetic.
Fig. 7 serves as reasons and imposes on the figure of the determined electric capacity of voltage of flash memory device according to the preferred embodiment of the invention.
Fig. 8 serves as reasons and imposes on the figure that the determined electricity of voltage of flash memory device is according to the preferred embodiment of the invention led.
100: Semiconductor substrate
110: thin polymer film
111:Ni 1-xFe xThe nano junction crystal
121: source area
122: the drain region
130: control gate
Embodiment
Below in conjunction with accompanying drawing specific embodiments of the invention are described in more detail.
Example 1: the preparation that embeds the ZnO nano junction crystal in the polyimide matrix
The Zn film is deposited on the Si substrate, and thickness is 10nm, spin coating PI precursor on the Si substrate subsequently, and the PI precursor is biphenyl tetracarboxylic dianhydride-p-phenylenediamine (PPD) (BPDA-PDA) type polyamic acid (weight ratio 1: 3) in the N-N-methyl-2-2-pyrrolidone N-(NMP).After solvent evaporation, film is at 400 ℃ N 2Solidified 1 hour in the gas, make polyamic acid aggregate into corresponding polyimides.After nanocrystal system in the embedding polyimides is got ready, adopt the structure and the size of transmission electron microscope (TEM) check oxide nano-particles (ZnO), as shown in Figure 1.The particle size of ZnO is not more than 10nm, and the thickness of polymer film is 80nm, and this can check with α step height measurement instrument (step profiler) and TEM.Fig. 2 is the sectional view of polymer film, and this can prove that multilayer ZnO nano junction crystal evenly forms, and does not have metal residual between Si substrate layer and polyimide layer.Be for observing the used epoxy resin layer of TEM above the polyimide layer.
Example 2: embed the Cu in the polyimide matrix 2 The preparation of O nano junction crystal
The Cu film is deposited on the Si substrate, and thickness is 5nm, spin coating PI precursor on the Si substrate subsequently, and the PI precursor is biphenyl tetracarboxylic dianhydride-p-phenylenediamine (PPD) (BPDA-PDA) type polyamic acid (weight ratio 1: 3) in the N-N-methyl-2-2-pyrrolidone N-(NMP).After solvent evaporation, film is at 350 ℃ N 2Solidified 1 hour in the gas, make polyamic acid aggregate into polyimides.After nanocrystal system in the embedding polyimides is got ready, adopt transmission electron microscope (TEM) check oxide nano-particles (Cu 2O) structure and size, as shown in Figure 3.Cu 2The particle size of O is 5nm, and the thickness of polymer film is 60nm, and this can check with α step height measurement instrument and TEM.
Example 3: embed the SnO in the polyimide matrix 2 The preparation of nano junction crystal
The Su film is deposited on the Si substrate, and thickness is 5nm, spin coating PI precursor on the Si substrate subsequently, and the PI precursor is biphenyl tetracarboxylic dianhydride-p-phenylenediamine (PPD) (BPDA-PDA) type polyamic acid (weight ratio 1: 3) in the N-N-methyl-2-2-pyrrolidone N-(NMP).After solvent evaporation, film is at 400 ℃ N 2Solidified 1 hour in the gas, make polyamic acid aggregate into polyimides.After nanocrystal system in the embedding polyimides is got ready, adopt transmission electron microscope (TEM) check oxide nano-particles (SnO 2) structure and size.The thickness of polymer film is 60nm, and this can check with α step height measurement instrument and TEM.
Example 4: embed the Ni in the polyimide matrix 1-x Fe x The preparation of nano junction crystal
Spin coating PI precursor on the Si substrate, PI precursor are biphenyl tetracarboxylic dianhydride-p-phenylenediamine (PPD) (BPDA-PDA) type polyamic acid (volume ratio 1: 3) in the N-N-methyl-2-2-pyrrolidone N-(NMP).Went down to desolventize 30 minutes at 135 ℃.Utilize sputtering method deposit thickness on the substrate that is coated with the PI precursor to be the Ni of 5nm 0.8Fe 0.2Film.Another layer of spin coating PI precursor layer placed room temperature 2 hours then.PI/Ni 0.8Fe 0.2/ PI/n-Si sample is heated to 135 ℃ and kept 30 minutes, removes any residual solvent, and further at 400 ℃, 10 -3Solidified 1 hour under the pressure of Pa, make polyamic acid aggregate into polyimides.At first Chen Ji PI layer is as tunneling barrier, and the PI layer of deposition is as insulating barrier for the second time.
The above Ni among Zhi Bei the embedding PI 0.8Fe 0.2The nano junction crystal can be used in the TEM observation of carrying out among the JEM 2010JEOL, and its result as shown in Figure 4.Scheme according to bright field (plan-view-bright-field) TEM that overlooks among Fig. 4, embed the Ni in the PI matrix 1-xFe xThe nano junction crystal forms, and the size of nano particle is not more than 4-6nm, and the superficial density of nano particle is approximately 2 * 10 12Cm -2According to the figure of cross section bright field (cross-view-bright-field) TEM among Fig. 4, Ni 1-xFe xThe nanocrystal body is arranged in individual layer.
Ni 1-xFe xTo between the 6nm, and the thickness of following tunneling barrier PI layer and top grid PI layer is about 40nm to the lateral dimension of nano particle at 4nm.
Example 5: embed the Ni in the polyimide matrix 1-x Fe x The SADP of nano junction crystal
Fig. 5 is for embedding the Ni in the PI matrix 1-xFe xThe electron diffraction pattern in the selected zone of nano junction crystal (SADP).It is the cube structure at center that SADP is indicated as being with faxe, and has because the little diffuse ring that causes of particle size.
Fig. 6 is for having Al/PI/Ni according to the preferred embodiment of the invention 1-xFe xThe skeleton diagram of the flash memory device of nano junction crystal/PI/n-Si structure.As shown in Figure 6, after the acidic precursor of polyimides dissolves in NMP, solution is spun on the P-type doping Si substrate 100, and adds thermosetting polyimide matrix layer 110.Further, thereon by sputtering method deposition Ni 0.8Fe 0.2Layer.Then, form another polyimide layer with operation same as described above.After the residual solvent evaporation, sample was solidified 1 hour down at 400 ℃, makes polyamic acid aggregate into polyimides, polyimides further with Ni 0.8Fe 0.2Reaction forms Ni 0.8Fe 0.2The nano junction crystal.At this moment, Ni 0.8Fe 0.2The nano junction crystal is distributed in the polyimide matrix 110 equably.Source area 121 and drain region 122 are formed on the two ends of polyimide matrix, and are formed on the polyimide matrix 110 by the control gate 130 that the metal gate that comprises Al constitutes.
Under the situation of carrying out " writing " process on the storage device, by to V GBApply positive voltage, the electronics on the substrate is hunted down in transmission and enters the nano junction crystal, and the grid voltage of unit be on the occasion of.On the other hand, under the situation of carrying out " wiping " process, by to V GBApply negative voltage, to substrate, and the grid voltage of unit is a negative value to electronics from nano junction crystal reverse transfer.Under the situation of carrying out " reading " process, work as V DSBe applied with negative voltage, and V GSWhen being applied with 0V voltage, drain current depends on that grid voltage is that then, according to the result, drain voltage is decided to be " 1 " or " 0 " on the occasion of still negative value.
Example 7:Al/PI/Ni 1-x Fe x The capacitance-voltage characteristics of/PI/n-Si
Fig. 7 has to adopt prepared Ni in the example 6 1-xFe xAl/ polyimides/the Ni of the nanoscale floating boom of nano junction crystal 1-xFe xThe capacitance-voltage characteristics figure of nano junction crystal/polyimides/n-Si 100 structures.Arrow 1 is the capacitance-voltage value that applies forward voltage, and 2 of arrows are the capacitance-voltage values that applies reverse voltage.This C-V curve illustrates the similar C-V value to metal-insulator semiconductor (MIS) storage device, and this metal-insulator semiconductor storage device adopts the nano junction crystal that has charge trap (electric charge trap) district as floating boom.The clockwise hysteresis of observing out from the C-V characteristic proves that electronics is trapped in the nano junction crystal of embedding.
Example 8:Al/PI/Ni 1-x Fe x The electricity of/PI/n-Si is led-voltage characteristic
Fig. 8 has to adopt prepared Ni in the example 6 1-xFe xAl/ polyimides/the Ni of the nanoscale floating boom of nano junction crystal 1-xFe xThe electricity of nano junction crystal/polyimides/n-Si 100 structures is led-voltage characteristic figure.In forward and reverse measurement, all there is one section broad peak value, this and Ni near flat band voltage 1-xFe xThe energy loss of nano junction crystal is relevant.This result shows Al/ polyimides/Ni 1-xFe xNano junction crystal/polyimides/n-Si100 structure can be used for the floating boom in the non-volatile single electron storage device.It should be noted that especially with the thick tunnel layer of traditional 2nm and compare that the thick polyimide layer of following 40nm is as tunnel layer.
Industrial usability
The invention provides the method that more simply is easy to make the Nanocrystal that is used for flash memory device than conventional method. Owing to evenly distributing as polymeric layer, Nanocrystal do not have cohesion, so can control size and the density of nano particle. Further, because the present invention does not need independent tunnel layer, so the present invention also allows to reduce operating voltage, reduce simultaneously the thickness of flash memory device.
In addition, the present invention is by utilizing nanoscale floating booms more stable than traditional floating boom of electrology characteristic and chemical characteristic, storage device and manufacture method thereof with the low nanoscale floating boom of efficient height and cost are provided, therefore, so that this storage device and manufacture method thereof are applicable to information, electronics, telecommunications industry.

Claims (9)

1. flash memory device comprises:
Semiconductor substrate;
Be formed in the active region of described Semiconductor substrate but drain region and source area separated from one another wherein defines channel region and this channel region and form near described source area between described drain region and source area;
Be positioned at the thin polymer film on the described Semiconductor substrate;
By the floating boom that the metallic nanocrystalline body in the embedded polymer thing film constitutes, described floating boom is arranged on the described channel region; With
Be located immediately on the described thin polymer film and the control gate on described floating boom,
Wherein said metal is Ni 1-XFe X, 0＜X＜0.5 wherein.
2. flash memory device as claimed in claim 1, wherein, described thin polymer film is a polyimide film.
3. method of making flash memory device comprises:
Form floating boom on Semiconductor substrate, wherein this floating boom is made of the metallic nanocrystalline body in the embedding medium thin polymer film; And
Two ends at described floating boom form source area and drain region, and are directly forming control gate on the described thin polymer film and on described floating boom,
Wherein said metal is Ni 1-XFe X, 0＜X＜0.5 wherein.
4. the method for manufacturing flash memory device as claimed in claim 3, wherein, the step of described formation floating boom comprises:
Metallizing on Semiconductor substrate;
Spin coating contains the acidic precursor that is dissolved in the dielectric polymers in the solvent on this metal coating, and removes residual solvent; And
Heating is to obtain the cross-bond between the coated polymer.
5. the method for manufacturing flash memory device as claimed in claim 4, wherein, the step of described formation floating boom further comprises: before metallizing on the described Semiconductor substrate, spin coating contains the acidic precursor that is dissolved in the dielectric polymers in the solvent on Semiconductor substrate earlier, and removes residual solvent.
6. as the method for each described manufacturing flash memory device in the claim 3 to 5, wherein, described dielectric polymers is a polyimides.
7. as the method for each described manufacturing flash memory device in the claim 4 to 5, wherein, described acidic precursor is the acidic precursor with carboxyl.
8. as the method for claim 3 or 4 described manufacturing flash memory devices, comprising:
By evaporation or sputter, coating thickness is the Ni of 1nm to 30nm on described substrate 1-XFe X
Biphenyl tetracarboxylic dianhydride on the substrate of metallizing in the spin coating N-N-methyl-2-2-pyrrolidone N--p-phenylenediamine (PPD) type polyamic acid precursor; And
Coating is heating and curing.
9. the method for manufacturing flash memory device as claimed in claim 8, wherein, the volume ratio of biphenyl tetracarboxylic dianhydride-p-phenylenediamine (PPD) type polyamic acid and N-N-methyl-2-2-pyrrolidone N-is 1: 3.
CN2005800103469A 2004-03-29 2005-01-18 Flash memory device utilizing nanocrystals embedded in polymer Active CN1969386B (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
KR1020040021073A KR100585849B1 (en) 2004-03-29 2004-03-29 Flash Memory Device Comprising Floating Gate Utilizing Nanocrystals Embeded In Polymer Thin Film And Fabrication Method Thereof
KR1020040021073 2004-03-29
KR10-2004-0021073 2004-03-29
KR10-2004-0088769 2004-11-03
KR1020040088769 2004-11-03
KR1020040088769A KR100660159B1 (en) 2004-11-03 2004-11-03 Flash Memory Device Comprising Floating Gate Utilizing Ni1-xFex Nanocrystals Embeded In Polymer
PCT/KR2005/000161 WO2005093837A1 (en) 2004-03-29 2005-01-18 Flash memory device utilizing nanocrystals embeded in polymer

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CN1969386B true CN1969386B (en) 2010-06-16

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