KR100658368B1 - Image sensor having current mirror and driving method thereof - Google Patents

Abstract

An image sensor having a current mirror and a driving method thereof are provided to vary an amount of current according to the MOS(Metal Oxide Semiconductor) size of the current mirror. When the reference output current is 4 micro ampere, plural current mirrors(50) are equipped in order to selected an optimum MOS(Metal Oxide Semiconductor) relating to the output current with W of different sizes such as an order of 3.5, 4 and 4.5 micro ampere. The number of MOSs in the current mirror is not limited in order to implement the optimum image. In the MOS, L is fixed and W is controlled so that the current mirror having plural MOS structures is equipped.

Description

Image sensor having current mirror and driving method thereof

1A to 1B illustrate a conventional three-transistor CMOS active pixel,

2A to 2B illustrate a conventional 4-transistor CMOS active pixel;

3A to 3C illustrate a driving process of a conventional CMOS image sensor;

4a to 4c is a driving process of the image sensor according to the present invention,

4d is a structure of a current mirror of the image sensor according to the present invention;

5A to 5C are unit pixels of the image sensor according to the present invention.

<Description of the symbols for the main parts of the drawings>

40: pixel portion 41: column common contact

42a: first switch 42b: second switch

43a: first capacitor 43b: second capacitor

44a: first comparator 44a: first comparator

45a: MUX 46: CDS

47: SHA 48: PGA

49: ADC 50: Current Mirror

51: ISP 52: switch

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor having a current mirror and a driving method thereof, and more particularly, to a current mirror having a current mirror that prevents reverse loading of a current signal output from unit pixels (pixel section) into a pixel section. An image sensor and a driving method thereof.

An image sensor is a device that captures an image by using a property of a semiconductor device that responds to external energy (for example, light energy). Light generated from each subject existing in the natural world has a unique value in wavelength and the like. The pixel of the image sensor detects light generated from each subject and converts it into an electric value. That is, the pixel of the image sensor generates an electrical value corresponding to the wavelength of light in response to the light energy generated from the subject. Among them, a charge coupled device (CCD) is a device in which charge carriers are stored and transported in a capacitor while individual MOS capacitors are located in close proximity to each other, and a CMOS image sensor is a pixel array using a CMOS integrated circuit manufacturing technology. Is a device that employs a switching scheme that constructs and sequentially detects the output. CMOS image sensors have the great advantage of low power consumption, making them very useful for personal portable systems such as mobile phones.

FIG. 1A is a diagram illustrating a conventional three-transistor CMOS active pixel, showing a cross section of a photo-diode including a circuit of peripheral components, and FIG. 1B is an equivalent circuit diagram of FIG. 1A. In the conventional three-transistor CMOS active pixel, the N + type impurity layer 11 and the N + type floating diffusion layer 13 constituting one junction of the photodiode are in contact with each other. Therefore, the capacitance component of the photodiode is substantially the sum of the capacitor components produced by the N + type impurity layer 11 and the N + type floating diffusion layer. Therefore, the conventional image sensor applying the three-transistor CMOS active pixel has a disadvantage of low sensitivity. The four-transistor CMOS active pixel is to compensate for the disadvantage of the three-transistor CMOS active pixel.

FIG. 2A is a diagram illustrating a conventional 4-transistor CMOS active pixel, showing a cross section of a photodiode including a circuit of peripheral components, and FIG. 2B is an equivalent circuit diagram of FIG. 2A. In the 4-transistor CMOS active pixel, a transfer transistor 25 controlled by the transfer control signal Tx is used to remove noise generated in the 3-transistor TLMOS active pixel. The N + type impurity layer and the N + type floating diffusion layer constituting the Han group junction of the photodiode are separated from each other. Therefore, in the 4-transistor CMOS active pixel, the sensitivity of the image sensor can be increased and the image quality can be improved. However, in the four-transistor CMOS active pixel, there is a disadvantage that the light receiving area is reduced due to the addition of the transfer transistor.

As a result, the conventional three-transistor CMOS active pixel has a disadvantage of low sensitivity, and the conventional four-transistor CMOS active pixel has a problem in that a light receiving area is small.

FIG. 3A shows a circuit diagram connected to the pixel portion 30 formed of a combination of unit pixels shown in FIGS. 1A and 2A. The pixel unit 30 refers to one column of unit pixels. The pixel unit 30 is provided by the number of columns, and the number of unit pixels included in each pixel unit is provided by the number of rows. Generally, '640 × 480 VGA' and '1025 × 768 SGA' refer to a lens composed of '640 columns × 480 rows' and '1025 columns × 768 rows', respectively. In practice, the number of columns and rows is somewhat higher. FIG. 3B shows signals applied to the unit pixels shown in FIGS. 1A and 2A.

The processing on the circuit and signal shown in FIGS. 3A and 3B is as follows. When a select signal is applied to a row made up of a plurality of unit pixels, an image data signal captured during a row enable period (R_en, row enable) in the plurality of unit pixels is generated. ) Is applied to the CDS (36, Correlated Double Sampling). The image data signal includes data signals corresponding to various levels of illuminance according to the surrounding environment, from a high illuminance signal that is a bright light data signal to a low illuminance signal that is a dark light data signal.

However, in the circuit structure shown in FIG. 3A, a reverse loading phenomenon occurs to the pixel portion during voltage conversion of the current signal output from the pixel portion 30. That is, when the amount of light is excessively large or small, a problem arises in that the current signal output from the pixel portion 30 is reverse loaded or is too darkly distorted. This problem may be pointed out as a problem in the voltage conversion method of the current signal output from the pixel portion 30.

Accordingly, the present invention is to solve the problems of the prior art, and in the voltage conversion process of the current signal output from the pixel portion, by providing a plurality of current mirrors at the common contact output from the pixel portion, SUMMARY OF THE INVENTION An object of the present invention is to provide an image sensor and a driving method thereof which change the amount of current according to the MOS size of the current mirror in order to suitably match the rear end signal processing range due to the current signal when the amount of light is too small.

SUMMARY OF THE INVENTION An object of the present invention is to provide a plurality of different sized MOSs connected in parallel to an image data signal applied from a pixel portion and an image applied to the pixel portion among the plurality of output current signals. Connected to a selection means for selecting any one of the plurality of MOSs having different sizes to output an output current signal suitable for illuminance of the light source, and a current for applying an output current signal output from the MOS selected by the selection means to the CDS. Achieved by an image sensor comprising a mirror.

In addition, an object of the present invention is to apply a low enable signal and to generate an image data signal in the pixel portion; Selecting one of the plurality of MOSs connected in parallel to the pixel unit so as to convert the output current signal of the generated image data signal into an optimal state for image processing; And outputting the converted voltage signal in the selected MOS to perform image processing.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms or words used in the specification and claims should not be construed as having a conventional or dictionary meaning, and the inventors should properly explain the concept of terms in order to best explain their own invention. Based on the principle that can be defined, it should be interpreted as meaning and concept corresponding to the technical idea of the present invention. Therefore, the embodiments described in the specification and the drawings shown in the drawings are only the most preferred embodiment of the present invention and do not represent all of the technical idea of the present invention, various modifications that can be replaced at the time of the present application It should be understood that there may be equivalents and variations.

Figure 4a shows a circuit diagram connected to the pixel portion 40 of the image sensor according to the present invention, Figure 4b shows a signal applied to the unit pixels of the image sensor according to the present invention, Figure 4c The operation phenomenon according to the signal applied to the unit pixels of the image sensor is shown.

The processing shown in FIGS. 4A to 4C is as follows. When a select signal is applied to a row made up of a plurality of unit pixels, an image data signal captured during a row enable period (R_en, row enable) in the plurality of unit pixels is captured by the common contact 41 of the column. ) Is applied to CDS (46, Correlated Double Sampling). The image data signal includes data signals corresponding to various levels of illuminance according to the surrounding environment, from a high illuminance signal that is a bright light data signal to a low illuminance signal that is a dark light data signal.

The data signal according to the various levels of illumination lowers the image data voltage applied to the circuit including the CDS 46 at each level. That is, the low illuminance data signal causes the image data voltage to drop relatively little while the high illuminance data signal causes the image data voltage to drop relatively much. 4C illustrates a voltage drop phenomenon of the data signal according to the illuminance level. In FIG. 4C, three levels are illustrated for convenience of description, but in reality, there may exist a data signal having a much higher level than this.

In the 'A' section and the 'C' section of FIG. 4C, a stable section with no change in the signal and a 'B' section are sections in which the voltage drop of the signal occurs. When the low enable signal R_en of the signal of FIG. 4B is applied to each unit pixel of the row, and the image data signal is applied to the common contact 41 of the column, the first switch 42a of the CDS 46 is applied. Reset sampling (SR) is performed during the 'B' period by the reset sampling driving signal, and the value is stored in the first capacitor 43a and the signal is transmitted to the MUX 45 through the first comparator 44a. Is approved. After the reset sampling (SR) is performed and before the low enable is finished, the second switch 42b of the CDS 46 performs data sampling during the 'C' period by the data sampling driving signal. The value is stored in the second capacitor 43b and the signal is applied to the MUX 45 through the second comparator 44b.

When the series of signals R_en, SR, and SD progress for one period, image data stored in a unit pixel is acquired, and a differential amplifier (47, SHA, Sample and Hold Amplifier), PGA (48, Programmable Gain Amplifier) and Image data is output through an ADC (49, Analog-Digital Converter).

4d shows a current mirror 50 of the image sensor according to the invention in more detail. The current mirror 50 according to the present invention can fix the channel length L of the MOS and amplify or reduce the amount of current at a ratio of the width W of the MOS. That is, before the image data signal captured during the row enable period (R_en, row enable) in a plurality of unit pixels is applied to the CDS 46 from the common contact 41 of the column, the ISP 51, Through the control of the Image Signal Processor (W), one of the plurality of current mirrors 50 having two or more sizes of W is selected.

As shown in FIG. 4D, if the reference output current is 4 mA, for example, 3.5 mA → 4 mA → 4.5 mA or, extremely, 1.5 mA → 4 mA → 8 mA, etc. It is provided with a plurality of current mirrors 50 for selecting the optimal MOS for the output current of different sizes. In the image sensor according to the present invention, the number of MOSs of the current mirror 50 is not limited to the number for the optimal image, and the current mirror having a plurality of MOS structures in which only L is fixed and the ratio of W is adjusted ( 50). As shown in Fig. 4D, each of the MOSs is provided with switches 52a to 52c for controlling the driving, and on / off of the switches 52a to 52c is determined through control means such as an ISP. That is, the larger the amount of light, the thicker the thickness of W is selected. The smaller the amount of light, the thinner the thickness of W is selected.

In addition, as another embodiment of the present invention, the MOS structures shown in FIG. 4D are all the same, so that the larger the amount of light, the larger number of MOSs are selected, and the smaller the amount of light, the smaller the number of MOSs may be selected. have.

In addition, as another embodiment of the present invention, the MOS structure shown in Fig. 4d is fixed to L and a plurality of MOS structures in which the ratio of W is adjusted, but the larger the amount of light, the greater the number of MOS is selected, the amount of light The smaller the number, the smaller the number of MOS can be selected. That is, this method is more accurate than the method of selecting only one MOS according to the amount of light, and the method of selecting a plurality of MOS in the same MOS according to the amount of light. For example, in the state where a plurality of MOSs having a 0.5 kHz difference such as 3.5 kHz, 4 kHz, 4.5 GHz and the like are provided, a plurality of MOSs having more various and smaller differences such as 0.1 kHz, 0.2 kHz, 0.3 GHz It is provided with a plurality of ways to control.

In the unit pixel structure according to the present invention, since the output current of various magnitudes from ㎀ to several hundred ㎂ may flow depending on the amount of light, low light (eg indoor) or high light (eg summer beach) situations Therefore, the change of the amount of photocurrent is very large. According to the prior art for controlling the change in the amount of photocurrent, the ISP adjusts by the frame integration time (frame integration time), but in the end the adjustment limit occurs and has a maximum of about 60 kHz. However, in the current mirror structure of the image sensor according to the present invention, it is possible to amplify or reduce the current according to the illuminance situation, and to set the dynamic range (DR) in an analog manner. After all, it is a way to extend the range from ultra-low light to ultra-high light.

In the gate common current mirror 50 structure connected in parallel, the output voltage range is maintained in consideration of the resolution of the 8bit / 10bit / 12bit ADC. That is, the contrast of the image can be distinguished.

The MOSs mirrored by varying the range depending on the amount of light are all converted to voltage at the same time, but when out of the voltage range, only the mirroring MOS having the optimal W size is sequentially turned off and DR is automatically determined. However, if this method is used individually for each row, the brightness of the horizontal line may vary according to a subject having a large contrast difference, which may cause a problem of obtaining a distorted image. Therefore, the size of the mirroring MOS used for all pixels must be unified. This function can be performed through a feedback circuit in the analog circuit, and can also be performed by selecting a mirroring MOS by judging (controlling) the host appropriately without going through the analog circuit. The result is a control scheme that gives feedback within the average range (reference) with overall image brightness.

5A to 5C are diagrams for describing a unit pixel structure formed in the pixel unit 40 of the image sensor according to the present invention. FIG. 5A illustrates a unit pixel structure of an image sensor according to an embodiment of the present invention, in which a unit pixel is formed only by a conventional semiconductor MOS process. The structure of the unit pixel is a two-transistor structure of 1PMOS and 1NMOS, wherein the light-receiving portion is formed of a PMOS using a photoelectric conversion method by incident light and includes an NMOS connected to the PMOS to serve as a switch.

Therefore, the present invention implements the unit pixel of the conventional one photodiode and three-transistor or one photodiode and four-transistor structure in a two-transistor structure, so that the pitch size of the unit pixel is reduced, and the conventional reset and Since there is no control signal, the metal line is reduced in the layout of the pixel, thereby simplifying the structure of the unit pixel.

The unit pixel forming method according to the first embodiment of the present invention is as follows. In order to implement PMOS and NMOS on the P-type semiconductor substrate 200, an N-well 220 is formed in the PMOS region. In the N-well formation process, an ion implantation process is performed on an N-type impurity in a state in which a pattern is formed on a P-type semiconductor substrate and only the region where the N-well is to be formed is opened. Form. The gate oxide layer 260 and the polysilicon are sequentially deposited on the entire surface of the N-well, and are patterned and then etched to form a floating gate 240 in the PMOS and a select gate 250 in the NMOS.

Subsequently, a mask in which only the source / drain formation region of the PMOS region is opened is formed, a high concentration P-type implantation process is performed to form the source / drain 230 in the PMOS region, and the source / drain of the NMOS region is sequentially A mask in which only the formation region is opened is formed, and a source / drain 270 is formed in the NMOS region by performing a high concentration N-type ion implantation process. In addition, a salicide process may be additionally performed to reduce resistance in regions where the source / drain of the PMOS and NMOS is formed. However, since the PMOS of the present invention is an optical device that receives light, light must pass through the floating gate formed on the upper side of the PMOS. Therefore, it is essential not to perform the salicide process on the floating gate.

The processing principle according to the unit pixel of the first embodiment of the present invention is described as follows. When a voltage is applied to the source of the PMOS formed on the same substrate as the NMOS, the N-well of the PMOS forms a depletion region in an electrically neutral state. Subsequently, when a photon is incident on an N-well, which is a depletion region, by receiving light through a PMOS, which is a light receiving unit, an electron hole pair (EHP) is generated, thereby forming a P channel on a gate bottom of the PMOS device. A voltage is applied to the select gate formed in the NMOS connected to the PMOS, and an N channel is formed between the source and the drain formed in the NMOS to receive the signal charge formed in the PMOS and emit an output signal.

Referring to the graph of FIG. 5B, the conventional photodiode exhibits a tendency that the current increases as the light intensity increases linearly when the light intensity is greater than or equal to a critical point, but is implemented by the PMOS of the present invention. The image sensor pixel has a structure in which a current flows immediately upon receiving light, and there is no dark current, and as shown in area A of FIG. 5B, the slope of the current change with respect to a small amount of light is very sharp. In the region of 5b, the slope of the current change with respect to the light change is relatively gentle.

Therefore, in the first embodiment of the present invention, since there is no control signal as in the conventional reset, since the metal lines are reduced in the layout of the pixels, the pitch size can be reduced compared to the conventional unit pixels, and the conventional CMOS In the case of an image sensor, one photon generates one electron-hole pair, whereas the PMOS light-receiving device of the present invention generates a photocurrent in which one photon is amplified, so that the current gain of the photocurrent reaches 100 to 1000, so that a small amount of light The image can be realized even at the low light incident, and the charge accumulation time can be reduced by 100 ~ 1000 times compared to the conventional sensor, and the charge accumulation time is only enough for tens of clock delays instead of one frame or one line. No integration time is required, enabling high speed video.

In addition, since the unit pixel of the CMOS image sensor of the present invention implements the unit pixel in a general MOS process, a dedicated process of the conventional CMOS image sensor is unnecessary. Since the present invention receives light from the PMOS and outputs it through the NMOS with little integration time, it is possible to minimize the dark current of the sensor due to the long integration except the dark current caused by the leakage current of the switch MOS. Therefore, in the conventional CMOS image sensor forming process, an epitaxial layer is formed on the surface of the light receiving unit in order to prevent dark current, and the PMOS light receiving device of the present application generates light current in which one photon is amplified. In order to collect in the light-receiving portion of the pixel, a microlens forming process is not necessary on the unit pixel. Since all of these processes can be omitted, the cost is low.

In Embodiment 2 of the present invention, the gate of the PMOS is connected to the N-well of the PMOS.

FIG. 5C is a configuration diagram of a CMOS image sensor according to a second exemplary embodiment of the present invention. In manufacturing a unit pixel, the unit pixel is formed only by a MOS process of a general semiconductor. In the structure of the unit pixel, the light-receiving portion is a 2T structure of 1PMOS and 1NMOS including a PMOS using a photoelectric conversion method by light incidence and an NMOS connected to the PMOS and serving as a switch. The -wells form unit pixels of the type connected.

Therefore, the present invention reduces the pitch size of the unit pixel by implementing the unit pixel of the conventional 1PD + 3T or 1PD + 4T structure in a 2T structure, and also because there is no control signal such as the conventional reset (pixel layout) Layout reduces the metal lines, simplifying the structure of the unit pixel.

5C is a second embodiment of the unit pixel structure of the image sensor according to the present invention. In order to implement PMOS and NMOS on the P-type semiconductor substrate 200, an N-well 220 is formed in the PMOS region. In the N-well formation process, an ion implantation process is performed on an N-type impurity in a state in which a pattern is formed on a P-type semiconductor substrate and only the region where the N-well is to be formed is opened. Form. The gate oxide layer 260 and the polysilicon are sequentially deposited on the entire surface of the N-well, and are patterned and then etched to form a floating gate 240 in the PMOS and a select gate 250 in the NMOS.

Subsequently, a mask in which only the source / drain formation region of the PMOS region is opened is formed, a high concentration P-type implantation process is performed to form the source / drain 230 in the PMOS region, and the source / drain of the NMOS region is sequentially A mask in which only the formation region is opened is formed, and a source / drain 270 is formed in the NMOS region by performing a high concentration N-type ion implantation process.

A contact portion 210 is formed on the surface of the N well to connect the gate 240 formed in the PMOS to the N-well 220. The contact portion 210 of the N-well implants N-type ions at a concentration higher than that of the N-well, and forms a metal pattern 280 in a region where N-type ions of high concentration are implanted to form a PMOS and an N-well. Is electrically connected.

In this case, the PMOS is an optical device that receives light, and since the light must pass through the gate formed on the upper side of the PMOS, the gate on the upper side of the PMOS is not subjected to the salicide process.

The processing principle according to the unit pixel of the second embodiment of the present invention is described as follows. When a voltage is applied to the source of the PMOS formed on the same substrate as the NMOS, the N-well of the PMOS forms a depletion region in an electrically neutral state. At this time, when the light is received by the light-receiving part of the PMOS, photons are incident on the N-well, which is a depletion region, to generate an electron hole pair (EHP). When a voltage is applied to the gate, electrons remaining in the N-well connected to the gate are It acts as a substrate bias, thereby lowering the minimum voltage required to form the channel, thereby easily forming the P channel. Subsequently, a voltage is sequentially applied to the select gate formed in the NMOS connected to the PMOS, and an N channel is formed between the source and the drain formed in the NMOS to receive the signal charge formed in the PMOS and emit an output signal.

Referring to the graph of FIG. 5B, in the conventional photodiode, the current flows only when the intensity of light exceeds a critical point, so that the current tends to increase as the intensity of light increases linearly, but according to the second embodiment of the present invention. When the unit pixel applies a voltage to the gate, the electrons remaining in the N-well connected to the gate act as a sub-bias, thereby lowering the minimum voltage required to form a channel. It can be seen that the slope of the current change with respect to the small amount of light change is more rapid than the change shown in the first embodiment of the present invention. The slope is gentler than the change shown in the first embodiment.

Therefore, since the second embodiment of the present invention also does not have a control signal as in the conventional reset, since the metal lines are reduced in the layout of the pixels, the pitch size can be reduced as compared with the conventional unit pixels, and a small amount of the light receiving portion of the PMOS is achieved. Even if the light is incident, a large amount of current can flow, so that a clear image can be realized at low light, and the integration time requires almost no high speed video.

In addition, since the second embodiment of the present invention implements a unit pixel in a general MOS process, a dedicated process of a conventional CMOS image sensor is unnecessary, thereby inducing an effect of increasing process yield and reducing process cost in the future.

5A to 5C, the present invention provides a unit pixel implementation technique capable of realizing high speed and high quality images, and a plurality of current mirrors are provided at common contacts output from the pixel unit, as described with reference to FIGS. 4A to 4D. In this case, it is possible to simultaneously achieve a technique of appropriately matching the rear end signal processing range due to the current signal when the amount of light is too large and the amount of light is too small by changing the amount of current according to the MOS size of the current mirror.

Although the present invention has been shown and described with reference to the preferred embodiments as described above, it is not limited to the above embodiments and those skilled in the art without departing from the spirit of the present invention. Various changes and modifications will be possible.

Therefore, the image sensor having the current mirror of the present invention and its driving method include a plurality of current mirrors at the common contact output from the pixel portion, so that the rear end signal due to the current signal when the amount of light is too large and the amount of light is too small. It is similar to the principle of being activated when cone cells are bright and rod cells are dark like human eyes by providing an image sensor and a driving method thereof that change the amount of current according to the MOS size of the current mirror to suit the processing range appropriately. can do.

In addition, the image sensor of the present invention may include one NMOS and one PMOS light-receiving element to configure a unit pixel, thereby reducing the pitch size of the pixel itself.

In addition, the image sensor of the present invention is excellent in the image implementation even in low light, even if a small amount of light enters the light receiving element is a large amount of current flowing through the source and drain.

In addition, since the image sensor of the present invention does not require a conventional integration time, it is possible to realize high-speed and high-quality images.

Claims (11)

A plurality of MOSs of different magnitudes connected in parallel to provide an image data signal having different magnitudes with respect to an image data signal applied from the pixel portion, and an output suitable for illuminance of an image applied to the pixel portion of the plurality of output current signals; And a current mirror connected to a selection means for selecting any one of the MOSs having different sizes to output a current signal, and including a current mirror for applying an output current signal output from the MOS selected by the selection means to the CDS. Image sensor. The method of claim 1, And the pixel unit is a combination of a unit pixel including one NMOS and one PMOS light receiving element. The method of claim 1, The CDS is configured to process a reset sampling signal for sampling the reset voltage when the voltage corresponding to the output current signal output from the current mirror drops, and to process a data sampling signal for sampling the data voltage after the voltage drops. sensor. The method of claim 3, And the reset sampling signal and the data sampling signal are enabled while one row enable signal applied to the pixel portion is enabled. The method of claim 1, And said selecting means is an ISP. The method of claim 1, The MOS having different sizes may have the same channel length and different widths. In order to provide a plurality of output current signals having different sizes with respect to the image data signal applied from the pixel portion, an output current signal suitable for illuminance of an image applied to the pixel portion among the plurality of MOSs connected in parallel and the plurality of output current signals is provided. An image comprising a current mirror connected to selection means for selecting any one or more MOSs of the plurality of MOSs for output, and applying an output current signal output from the one or more MOSs selected by the selection means to the CDS; sensor. Applying a low enable signal and generating an image data signal in the pixel portion; Selecting one of the plurality of MOSs connected in parallel to the pixel unit so as to convert the output current signal of the generated image data signal into an optimal state for image processing; Outputting a voltage signal converted by the selected MOS to perform image processing Method of driving an image sensor comprising a. Applying a low enable signal and generating an image data signal in the pixel portion; Selecting one or more MOSs among the plurality of MOSs so as to voltage convert the output current signal of the generated image data signal to an optimal state for image processing; Outputting a voltage signal converted by the selected MOS to perform image processing Method of driving an image sensor comprising a. The method of claim 8 or 9, The outputting the voltage signal converted in the selected MOS and image processing, And resetting sampling when the output voltage falls, and data sampling after dropping the output voltage to determine an output value based on a difference between the reset sampling value and the data sampling value. The method of claim 10, And the reset sampling and data sampling are performed during one row enable signal period applied to the pixel portion.

Images