KR100655558B1 - Apparatus and method of interfacing a pon in the lot of the wdm-pon system - Google Patents

Abstract

A PON(Passive Optical Network) interface device within an OLT(Optical Line Termination) of a WDM(Wave Division Multiplex)-PON system and a method thereof are provided to perform optical communication by using a scramble/descramble function of a physical layer chip without employing an existing media converter, thus a cost is reduced while overall power consumption is cut down. A PON interface device determines whether the PMD(Physical Medium Dependent) layer is for an FX(Fiber Transceiver) mode by an external configuration bit which is set in hardware way through an internal register of a physical layer chip(S61). If so, the device confirms whether an MDIO(Management Data In Out) function is set by a switch that supports a layer 2(S62). If so, the device enables data of an address corresponding to a scramble of the internal register(S63). If the register is enabled, the device enables an internal scramble/descramble function part of the physical layer chip to turn on the part(S64).

Description

Apparatus and Method of Interfacing a PON in the LOT of the WDM-PON System}

1 is a block diagram illustrating a PON interface unit in an optical line termination (OLT) in a typical wave division multiplex-passive optical network (WDM-PON) system.

FIG. 2 is a detailed block diagram of a physical layer chip in FIG. 1; FIG.

3 is a detailed block diagram of a media converter in FIG. 1; FIG.

4 is a block diagram illustrating a PON interface device in an OLT in a WDM-PON system according to an exemplary embodiment of the present invention.

FIG. 5 is a detailed block diagram of the physical layer chip of FIG. 4; FIG.

6 is a flowchart illustrating a PON interface method in an OLT in a WDM-PON system according to an exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

41-1, 41-2: Physical Layer Chips

42-1 to 42-16: Fiber Transceiver

51: Physical Coding Sublayer (PCS) Layer

51-1: 4B / 5B Encoder / Decoder

52: Physical Medium Attachment (PMA) layer

52-1: Serializer / Deserializer

52-2: Scrambler / Descrambler

52-3: Non Return to Zero (MRZ) / None Return to Zero Invert (MRZI) encoder / decoder

53: Physical Medium Dependent (PMD) layer

53-1: MLT-3 (Multi Level Transmission 3) Encoder / Decoder

53-2: Digital to Analogue Converter (DAC) / Analogue to Digital Converter (ADC)

53-3: Pseudo Emitted Coupled Logic (PECL) Driver

The present invention relates to a PON interface device and method in an OLT in a WDM-PON system, and more particularly, to perform optical communication by using a scrambling / scramble function of a physical layer chip in an OLT of a WDM-PON system. PON interface device and method in the OLT in one WDM-PON system.

In a typical WDM-PON system, the PON interface device in the OLT is a twisted pair physical layer chip that provides a 100M SS-SMII (Source Synchronous Serial Media Independent Interface) interface as shown in FIG. 11-1 and 11-2, and a plurality of media converters 12-1 to chips for interfacing by converting the two physical layer chips 11-1 and 11-2 and the FX (Fiber Transceiver) mode. 12-16) and a plurality of optical transceivers 13-1 to 13-16 which are modules for converting or inverting electrical signals into optical signals. Here, the SS-SMII refers to a method of interfacing the 25M MII to a 125M serial signal.

As shown in FIG. 1, in a typical WDM-PON system, a PON interface device in an OLT includes an L2 switch, which is a switch supporting Layer 2 capable of configuring 4 Giga + 48 FE (Fast Ethernet). For convenience of description, a 100M serial signal received from the figure) is applied via the two pairs of physical layer chips 11-1 and 11-2, and the corresponding electrical signal is applied to the media converter 12-1. 12-16) and the optical patterns, such as optical transceivers 13-1 to 13-16, are converted into optical signals and output.

In the case of 100Base transmit / receive (100Base-TX), the NRZ data streams are scrambling, which reduces the emission of electromagnetic waves due to high frequency signals expected during transmission. In addition, the scrambling can be performed by a transmission signal having periodicity due to a specific bit string by randomly distributing an NRZ bit string using an 11-bit shift register whose polynomial is 'X11 + X9 + 1' and two EXOR gates. Disperses energy concentrated in a specific frequency domain over the entire band.

However, in the configuration of 100 base optical transmission / reception (100Base-FX), there is generally no function of converting an electrical signal into a scramble / scramble signal.

FIG. 2 is a block diagram showing the detailed configuration of the physical layer chips 11-1 and 11-2 as shown in FIG.

As shown in FIG. 2, the physical layer chips 11-1 and 11-2 include a PCS layer 21, a PMA layer 22, and a PMD layer 23.

The PCS 21 includes a 4B / 5B encoder / decoder 21-1 and a serializer / deserializer 21-2 for converting / inverting a 4-bit bit string into a 5-bit code group bit string. And encoding a 4-bit nibble transmitted from the L2 switch into a 5-bit code group (ie, a symbol) or vice versa, and performing the PMA (through the corresponding serializer / deserializer 21-2). Serialize a 5-bit code group or vice versa for delivery.

In the transmission of the PCS 21, the '/ I /' code group is continuously transmitted during an idle period in which there is no bit string to be transmitted, and if there is a received signal during transmission, a collision signal (Collision Signal) To the L2 switch. Here, the idle code group is a bit string consisting of five 1s, and the waveform changes in each bit during line coding by NRZI, which is advantageous for the receiver to extract synchronization.

Upon reception of the PCS 21, it is determined that there is a channel activity when there are two or more non-contiguous' 0's among the 10 code bits received, and the result is a carrier sense signal (CRS). Notify the L2 switch, and adjust the code group to enable 4-bit / 5-bit decoding by combining the code bits received when the corresponding channel is activated into '/ J /' and '/ K /' code groups. .

In addition, when a portion of the received two NRZI code groups constituting the Start of Stream Delimiter (SSD) indicating the start of a frame is correctly found in the shift register, the code of the corresponding SSD portion is respectively found in the corresponding 4-bit / 5-bit decoder ( 21-1), the 4-bit / 5-bit decoder 21-1 restores the code of the SSD portion to an 8-bit preamble used in Ethernet, and transmits the code of the SSD to the L2 switch by 4 bits. Then, when an End of Stream Delimiter (ESD) is received to indicate the end of the frame, the ESD is applied to the corresponding 4-bit / 5-bit decoder, and the 4-bit / 5-bit decoder 21-1 applies the ESD. The reason for doing this is to recover the idle code since the corresponding ESD is added after the frame check sequence (FCS), which is the end of the original MAC frame, at the transmitting side.

The PMA 22 converts an NRZ code bit string of 125 (Mbps) requested from the PCS 21 to an NRZI code and transmits the NRZI code to the PMD 23, and receives the NRZI bit string received from the PMD 23. Is recovered to the NRZ code and transferred to the PCS 21.

In addition, the PMA 22 includes a link carrier detector 22-1, collects 10 NRZI bit strings received from the PMD 23, and receives the 10 NRZI bit strings. If there are two or more non-contiguous' 0's, a signal is generated that a carrier is detected. In addition, the PMA 22 reports the current link state to the PCS 21 by a link monitor signal reported from the PMD 23, but without receiving data from the other party, the idle signal ( 11111 also transitions to the link down state if it is not received for a certain period of time.

The PMD 23 is divided into two types for the TP mode and the FX mode, and has a separate function. The scrambler / descrambler and the MLT-3 encoder / decoder 23-1, the DAC / ADC 23-2, A PECL driver 23-3 is included. Here, the scrambler / descrambler 23-1 is a shift register random spreader of the polynomial 'X11 + X9 + 1', and the MLT-3 encoder / decoder 23-1 converts the serial data into a MLT-3 format signal. Convert / reverse transform into.

First, when transmitting the PMD 23 for the TP mode, the NRZI bit stream transmitted from the PMA 22 is restored to the original bit string NRZ, and then the NRZ bit string is scrambled. The scrambled serial data is converted into MLT-3 format transmission code and transmitted to the transformer / RJ-45 connector. In this case, the transformer refers to an electrical isolator of the NRZ bit string, and the RJ-45 connector refers to a connector for a UTP cable interface. In addition, the scrambled serial data is further converted into an MLT-3 format signal to further reduce electromagnetic emission. The MLT-3 coding has a frequency of '1 /' compared to an NRZI signal in which '1' is repeated. It can be seen that it is reduced to 2 '.

When the PMD 23 receives the TP mode, the reverse operation of the above-described transmission operation is performed. In order for the descrambler 23-1 to operate properly, a bit string including an idle code pattern is first used. Once received, if each bit has been descrambled to see if it is a scrambled idle code pattern, then the scrambler 23-1 if all are restored to the normal idle pattern for at least 270 (ns) time by descrambling. ) And the descrambler 23-1 perform a synchronous operation. At this time, the operation in which the scrambler 23-1 and the descrambler 23-1 are synchronized is called lock.

Thus, once accurate descrambling is possible, the descrambler 23-1 is actually enabled after the descrambling 23-1 is started to start descrambling for all subsequent received codes. Counts the number of errors from the received row, and if 64 consecutive errors occur, determines that the lock has been released, and starts a new synchronization process with the scrambler 23-1.

Secondly, for the FX mode, the PMD 23 uses the NRZI bit stream received from the PMA 22 without passing through the scrambler 23-1 and the MLT-3 encoder 23-1. 23-2) is converted into an optical signal and transmitted to the optical transceiver, on the contrary, a clock is recovered from the optical signal received from the optical transceiver through the corresponding ADC 23-2, and an NRZI signal is extracted to the PMA 22. To pass.

As described above, the FX method does not use MLT-3 coding because the NRZI signal is directly converted to the optical signal. The reason for the direct conversion is no band limitation and no external electromagnetic emission in the case of the optical cable. Because there is not. However, due to the long transmission distance of more than about 10 (Km) in the FX scheme and the pulse spread of the signal pattern (i.e. dispersion effect), the signals of all '0' and all '1' patterns that are not scrambled For vulnerabilities, there is a weak spot for extraction and restoration.

3 is a block diagram showing a detailed configuration of the media converters 12-1 to 12-16 as shown in FIG.

As illustrated in FIG. 3, the media converters 12-1 to 12-16 may include a twisted pair interface 31 and a first clock / data recovery unit 32. ), A descrambler 33, a fiber optic interface 34, a second clock / data recovery unit 35, and a scrambler 36.

The characteristics of the optical module in a typical WDM-PON system are vulnerable to extracting clock and data at the time of reception, especially for signals of 10 (Km) or more, especially '0' and all '1' patterns. In order to add the scramble and descramble functions, the media converters 12-1 to 12-16 are used as shown in FIG.

When the physical layer chips 11 and 12 illustrated in FIG. 1 are set for the TP mode, the physical layer interface unit 31 receives the 100 base signal 100Base-TX as the TP interface, at which time Since the input signal of the layer chips 11 and 12 is for the TP mode, a signal that has already been scrambled is input. Therefore, the media converter 12-1 to 12-16 turns off the descrambling function and the first clock. The clock and data are extracted from the data recovery unit 32 and immediately converted into a 100 base optical signal 100Base-FX through the optical interface 34 and transmitted to the optical transceiver.

In the same manner as the opposite signal flow diagram, after the scramble function is turned off, the clock and data are extracted from the second clock / data recovery unit 35 and immediately transferred through the physical layer interface unit 31. -TX) to the physical layer chips 11 and 12.

As described above, in a PON interface device in an OLT in a typical WDM-PON system, the media converter used to improve transmission characteristics consumes a lot of power, especially since 32 pieces are assembled per PON interface device of the WDM-PON system. By taking up a large portion of the total power consumption, there is a problem in stabilizing the system power supply, and also a cost problem because a large amount of chips are used.

In order to solve the above problems, the present invention provides a PON interface device in the OLT in the WDM-PON system to perform optical communication by using the scrambling / descrambling function of the physical layer chip in the OLT of the WDM-PON system and To provide a method, the purpose is.

In addition, the present invention is to implement a scramble / descrambling to be suitable for the optical interface in consideration of the transmission distance and the up and down transmission quality for a specific pattern when optical transmission in the PON interface device in the OLT of the WDM-PON system, have.

In addition, the present invention by using the scramble / descrambling function of the physical layer chip in the PON interface device in the OLT of the WDM-PON system to perform optical communication without using a conventional media converter, thereby reducing the cost and overall of the PON interface device The power consumption is reduced, so that the overall power level of the unit is kept constant so that it is effective to stabilize the unit.

PON interface device in the OLT in the WDM-PON system according to an embodiment of the present invention for achieving the above object, two pairs of physical layer chips providing an SS-SMII interface, and converts electrical signals into optical signals A PON interface device in an OLT in a WDM-PON system having a plurality of optical transceivers for inverse / inverse conversion, wherein the SS-SMII signal of a switch supporting layer 2 is transmitted to the optical transceiver in FX mode in the physical layer chip. Or a scrambled / descrambled portion that performs the reverse operation or vice versa.

The scramble / descramble portion may include: a PCS having a 4B / 5B encoder / decoder for encoding a 4-bit nibble transmitted from the switch into a 5-bit code group bit string or vice versa; Serializes the code group bit string of the PCS and scrambles it with the logic of polynomial of 'X11 + X9 + 1', converts the NRZ code bit string requested to be transmitted through the PCS into an NRZI code, and restores the corresponding NRZI bit string to NRZ. A PMA which is descrambled and then converted into a 5-bit code group bit string and delivered to the PCS; And converts the NRZI bit string of the PMA into an optical signal and transmits the optical signal to the optical transceiver, and recovers a clock from the optical signal received from the optical transceiver to extract an NRZI signal and transmit the NRZI signal to the PMA. do.

The PMA may include a serializer / deserializer for serializing a code group bit string of the PCS or converting the serialized signal into a code group bit string for application to the PCS; A scrambler / descrambler that scrambles the serial signal of the serializer with a logic of 'X11 + X9 + 1' or descrambles the scrambled NRZ code bit string into a serial signal to apply to the deserializer; And an MRZ / MRZI encoder / decoder for converting the NRZ code bit sequence of the scrambler into an NRZI code and applying the same to the PMD or restoring the NRZI bit sequence of the PMD to NRZ and applying the descrambler to the descrambler.

On the other hand, the PON interface method in the OLT in the WDM-PON system according to an embodiment of the present invention for achieving the above object, in the PON interface device in the OLT in the WDM-PON system, the internal register of the physical layer chip Determining whether it is for the FX mode by an external configuration bit set in hardware through; If it is determined for the FX mode, checking whether a Management Data In Out (MDIO) is set up by a switch supporting Layer 2; Activating data of a address corresponding to scramble of the internal register when the MDIO is set up; And when the register enable is activated, enabling the internal scramble / disscramble function portion of the physical layer chip.

When the optical module interface is configured in the OLT of the WDM-PON system, the present invention implements logic using the scramble / descramble function of the physical layer chip without using a conventional media converter. Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In the WDM-PON system according to an embodiment of the present invention, the PON interface device in the OLT includes two pairs of physical layer chips 41-1 and 41-2 providing a 100M SS-SMII interface, as shown in FIG. It includes a plurality of optical transceivers 42-1 to 42-16, which are modules for converting or inversely converting electrical signals into optical signals.

The physical layer chips 41-1 and 41-2 include a scramble / descramble function for converting the FX modes to each other to interface with the optical transceivers 42-1 to 42-16. Optical transceivers (42-1 to 42-16), which are optical modules, transmit SS-SMII signals of L2 switches using 100M physical layer chips 41-1 and 41-2 including the corresponding scramble / descrambling function. Is made to pass on.

FIG. 5 is a block diagram showing a detailed configuration of the physical layer chips 41-1 and 41-2 as shown in FIG.

As illustrated in FIG. 5, the physical layer chips 41-1 and 41-2 include a PCS layer 51, a PMA layer 52, and a PMD layer 53.

The PCS 51 has a 4B / 5B encoder / decoder 51-1 that converts / inversely converts a 4-bit bit string into a 5-bit code group bit string, that is, a 4-bit nibble transmitted from an L2 switch. Encodes into a 5-bit code group (i.e. symbols) or vice versa.

The PMA 52 serializes a 5-bit code group applied from the PCS 51 and scrambles the converted serial signal with logic of polynomial of 'X11 + X9 + 1' and transmits a request from the PCS 51. Convert the 125 Mbps NRZ code bit stream into an NRZI code and apply it to the PMD 53, restore the NRZI bit stream received from the PMD 53 to NRZ, descramble the restored NRZ, and The descrambled serial signal is converted into a 5-bit code group and transmitted to the PCS 51.

The PMA 52 converts a serializer / deserializer 52-1 that serializes a 5-bit code group or vice versa, and the serial signal converted by the serializer / deserializer 52-1. A scrambler / descrambler 52-2 that is scrambled by X11 + X9 + 1 'polynomial logic or vice versa and applied to the serializer / deserializer 52-1, and the scrambler / descrambler 52- 2) receives an NRZ code bit stream of 125 (Mbps) transmitted from the PCS 51 and converts it into an NRZI code to be applied to the PMD 53 or to receive the NRZI bit string received from the PMD 53. And a MRZ / MRZI encoder / decoder 52-3, which is restored to NRZ and transferred to the PCS 51 through the scrambler / descrambler 52-2 and the serializer / deserializer 52-1.

The PMD 53 is divided into two types, one for the TP mode and one for the FX mode. The PMD 53 includes an MLT-3 encoder / decoder 53-1 for converting and inverting serial data into an MLT-3 format signal, and a DAC. / ADC 53-2 and PECL driver 53-3.

First, the PMD 53 for the TP mode restores the NRZI bit stream delivered from the PMA 52 to NRZ once in the form of the original bit string, and then the MLT-3 encoder 53-1. Converts the corresponding NRZ bit string into a MLT-3 format transmission code and transmits it to the transformer / RJ-45 connector through the DAC 53-2. That is, the MLT-3 format transmission code received from the transformer / RJ-45 connector through the ADC 53-2 is converted into an NRZ bit string through the MLT-3 encoder 53-1, and then the corresponding NRZ. The bit string is converted into an NRZI bit string and transferred to the PMA 52.

Secondly, in the PMD 53 for FX mode, the PECL driver 53-3 does not pass the NRZI bit string received from the PMA 52 through the MLT-3 encoder 53-1. The DAC 53-2 converts the optical signal into an optical signal and transmits the optical signal to the optical transceiver. On the contrary, a clock is recovered from the optical signal received from the optical transceiver through the ADC 53-2, and an NRZI signal is extracted to extract the NRZI signal. To 52.

6 is a flowchart illustrating a PON interface method in an OLT in a WDM-PON system according to an exemplary embodiment of the present invention.

In other words, in the case of using the scramble / descramble function portion formed in the physical layer chips 41-1 and 41-2, as shown in the flowchart of FIG. 6, an external configuration bit and an MDC ( It is operated by the control of Media Dependent Clock (MDIO) / Management Data In Out (MDIO). Here, the MDIO refers to a data interface for controlling the physical layer chips 41-1 and 41-2.

First, the physical layer chips 41-1 and 41-2 have internal registers and check whether they are for the TP mode or the FX mode by an external component bit set in hardware (step S61). If it is determined in step 61 (S61) for the TP mode to enable the internal scramble / descrambling function parts to turn on unconditionally (step S64), thereby performing the TP mode operation as described above.

On the other hand, when it is determined for the FX mode in the 61st step (S61), that is, determined by the internal register, the MDIO determines whether the operation is being performed by the L2 switch, That is, it is checked whether the MDIO setup has been made (step S62).

Accordingly, when MDIO setup is performed in step 62 (S62), the data of the address corresponding to the scramble of the internal register is activated, and after confirming that the enable of the register is activated (step S63). ), The internal scramble / descramble function portion is enabled, thereby warming up unconditionally (step S64), thereby enabling the FX mode operation as described above.

However, when MDIO setup is not performed in step 62 (S62) or when enable of the register is not activated in step 63 (S63), the internal scramble / descramble function is disabled. To be turned off (step S65).

As described above, according to the present invention, when optical transmission is performed by the PON interface device in the OLT of the WDM-PON system, the conventional media is used by using the scramble / descramble function of the physical layer chip in consideration of the transmission distance and the up and down transmission quality with respect to a specific pattern. By performing optical communication without using a converter, cost savings and power consumption of the entire PON interface device are reduced, thereby maintaining a constant unit power supply level, which is effective for stabilizing the unit.

Claims (4)

Wave Division Multiplex (WDM-PON) with two pairs of physical layer chips that provide an SS-SMII (Source Synchronous Serial Media Independent Interface) interface, and multiple optical transceivers for converting and inverting electrical signals into optical signals. In an optical network terminal (PON) interface device in an optical line termination (OLT) in a passive optical network system, And a scrambled / descrambled portion for transmitting the SS-SMII signal of the switch supporting the layer 2 to the optical transceiver or vice versa in the physical layer chip in the FX (Fiber Transceiver) mode. PON interface device in OLT in WDM-PON system. The method of claim 1, The scrambled / descrambled portion includes a 4B / 5B encoder / decoder, which encodes a 4-bit nibble transmitted from the switch into a 5-bit code group bit string or vice versa. )Wow; Serialize the code group bit string of the PCS and scramble it with the polynomial logic of 'X11 + X9 + 1', and convert the non-return to zero (NRZ) code bit string requested to be transmitted through the PCS to a non-zero return to zero invert (NRZI). A PMA (Physical Medium Attachment) for converting to a code, restoring the corresponding NRZI bit string to NRZ, descrambled, and converting the code bit into a 5-bit code group bit string to the PCS; Converts an NRZI bit string of the PMA into an optical signal and transmits the optical signal to the optical transceiver, and recovers a clock from the optical signal received from the optical transceiver to extract an NRZI signal and transmit the NRZI signal to the PMA. PON interface device in the OLT in the WDM-PON system, characterized in that made. The method of claim 2, The PMA includes: a serializer / deserializer for serializing a code group bit string of the PCS or converting the serialized signal into a code group bit string to apply to the PCS; A scrambler / descrambler that scrambles the serial signal of the serializer with a logic of 'X11 + X9 + 1' or descrambles the scrambled NRZ code bit string into a serial signal to apply to the deserializer; And a MRZ / MRZI encoder / decoder for converting the NRZ code bit sequence of the scrambler into an NRZI code and applying it to the PMD or restoring the NRZI bit sequence of the PMD to NRZ and applying the descrambler to the descrambler. PON interface device in OLT in PON system. 1. A PON interface device in an OLT in a WDM-PON system, comprising: determining whether for FX mode by an external component bit set in hardware through an internal register of a physical layer chip; If it is determined for the FX mode, checking whether a Management Data In Out (MDIO) is set up by a switch supporting Layer 2; Activating data of a address corresponding to scramble of the internal register when the MDIO is set up; And enabling the internal scramble / descramble function of the physical layer chip when the register enable is activated, wherein the PON interface method in the OLT in the WDM-PON system.

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