KR100646184B1 - Driving Method for Plasma Display Panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel. In the plasma display panel driving method according to an exemplary embodiment of the present invention, a plurality of subfields having different emission counts are divided into a reset period, an address period, and a sustain period, and a predetermined voltage is applied to the X, Y, and Z electrodes in each period. A method of driving a plasma display panel which expresses an image, comprising: a first surface discharge step of discharging between a Y electrode and a Z electrode by applying a rising ramp waveform to a Y electrode in a reset period of one of the subfields; A second surface discharge step of applying a ramp waveform falling to the Y electrode to discharge between the Y electrode and the Z electrode, and applying a ramp waveform falling to the Y electrode and the Z electrode, respectively, between the Y electrode and the X electrode, and the Z electrode. Resetting other subfields except for one of the subfields and the first reset period in which a second discharge step in which opposite discharges occur respectively between the X and X electrodes is sequentially generated. In the section, the first surface discharge step is generated between the Y electrode and the Z electrode by applying the rising ramp waveform to the Z electrode, and the falling ramp waveform is applied to the Y electrode and the Z electrode, respectively, so that the Y electrode and the X electrode, the Z electrode and And a second reset period in which a second discharge step in which opposing discharges occur between X electrodes is sequentially generated.

Address discharge, jitter characteristic, driving method, reset section, subfield, driving waveform

Description

Driving method for plasma display panel {Driving Method for Plasma Display Panel}

1 is a perspective view showing the structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a diagram illustrating a method of expressing image gradation of a conventional plasma display panel.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel.

4 is a view showing another driving waveform in accordance with a conventional method for driving a plasma display panel.

5 is a view showing a driving waveform according to the driving method of the plasma display panel of the present invention.

6 is a view for explaining the wall voltage change amount and the dark luminance amount according to the surface discharge and the counter discharge in the reset section when driving the plasma display panel of the present invention.

7 is a view showing a comparison of the wall voltage state in the cell after the reset discharge according to the drive waveform of the present invention and the wall voltage state in the cell after the reset discharge according to the conventional drive waveform.

<Explanation of symbols for the main parts of the drawings>

10: upper substrate 11: scanning electrode

12: sustain electrode 13a, 13b: dielectric layer

14: protective film 20: lower substrate

21: partition 22: address electrode

23: phosphor layer

The present invention relates to a method for driving a plasma display panel, and more particularly, to a method for driving a plasma display panel which improves a driving margin by improving a driving waveform of a reset section.

In general, a plasma display panel emits a phosphor by ultraviolet rays of 147 nm generated when a discharge of He + Xe or Ne + Xe inert gas is emitted, thereby displaying an image including text or graphics.

1 is a perspective view showing the structure of a conventional three-electrode AC surface discharge type plasma display panel. As shown, the three-electrode alternating surface discharge type PDP includes a scan electrode (hereinafter, abbreviated as 'Y electrode') and a sustain electrode (hereinafter, abbreviated as 'Z electrode') formed on the upper substrate 10. And an address electrode 22 (hereinafter, abbreviated as 'X electrode') formed on the lower substrate 20. Each of the Y electrode 11 and the Z electrode 12 is formed of a transparent electrode such as indium tin oxide (ITO, 11a, 12a). Bus electrodes 11b and 12b are formed in each of the Y electrode 11 and the Z electrode 12 to reduce resistance. An upper dielectric layer 13a and a passivation layer 14 are stacked on the upper substrate 10 on which the Y electrode 11 and the Z electrode 12 are formed. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 13a. The protective layer 14 prevents damage to the upper dielectric layer 13a due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 14, magnesium oxide (MgO) is usually used.

Meanwhile, the lower dielectric layer 13b and the partition wall 21 are formed on the lower substrate 20 on which the X electrode 22 is formed, and the phosphor layer 23 is formed on the surfaces of the lower dielectric layer 13b and the partition wall 21. Is applied. The X electrode 22 is formed in the direction crossing the Y electrode 11 and the Z electrode 12. The partition wall 21 is formed in parallel with the X electrode 22 to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 23 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. An inert mixed gas such as He + Xe or Ne + Xe for discharging is injected into the discharge space of the discharge cells provided between the upper and lower substrates 10 and 20 and the partition wall 21. A method of expressing image gradation of a conventional plasma display panel having such a structure will be described with reference to FIG. 2.

2 is a diagram illustrating a method of expressing image gray scale of a conventional plasma display panel. As shown, the image gradation of the plasma display panel is driven by dividing one frame into several subfields having different emission counts. Each subfield is divided into a reset section for uniformly generating a discharge, an address section for selecting a discharge cell, and a sustain section for implementing gray levels according to the number of discharges. For example, when displaying an image with 256 gray levels, a frame section (16.67 ms) corresponding to 1/60 second is divided into eight subfields. In addition, each of the eight subfields is divided into an address period and a sustain period. Here, the reset section and the address section of each subfield are the same for each subfield, while the sustain section increases at a rate of 2n (n = 0,1,2,3,4,5,6,7) in each subfield. do. Referring to the driving waveform according to the driving method of the plasma display panel as shown in FIG.

3 is a view illustrating a driving waveform according to a driving method of a conventional plasma display panel. As shown, the plasma display panel includes a reset section for initializing the entire screen, an address section for selecting a cell to be discharged, a sustain section for maintaining the discharge of the selected cell, and an erasing section for erasing wall charges in the discharged cell. Driven by dividing into.

In the reset section, the rising ramp waveform Ramp-up is simultaneously applied to all the Y electrodes (scan electrodes) in the setup section. This rising ramp waveform causes discharge to occur in the cells of the full screen. By this setup discharge, positive wall charges are accumulated on the X electrode (address electrode) and Z electrode (sustain electrode), and negative wall charges are accumulated on the Y electrode. During the set-down period, after the rising ramp waveform is supplied, the ramp ramp starts to fall from the positive voltage lower than the peak voltage of the rising ramp waveform and falls to a specific voltage level below the ground (GND) level voltage. By causing a weak erase discharge in the cells, the overcharged wall charge is sufficiently erased. By this set-down discharge, the wall charges such that the address discharge can be stably generated remain uniformly in the cells.

In the address period, the negative scan pulse Scan is sequentially applied to the Y electrodes, and the positive data pulse data is applied to the X electrode in synchronization with the scan pulse. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated during the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. In the cells selected by the address discharge, wall charges such that discharge can occur when the sustain voltage Vs is applied are formed. The positive electrode voltage Vz is supplied to the Z electrode so as to reduce the voltage difference between the Y electrode during the set-down period and the address period so as to prevent erroneous discharge from the Y electrode.

In the sustain period, a sustain pulse Su is alternately applied to the Y electrode and the Z electrodes. In the cell selected by the address discharge, as the wall voltage and the sustain pulse in the cell are added, a sustain discharge, that is, a display discharge occurs between the Y electrode and the Z electrode every time the sustain pulse is applied.

After the sustain discharge is completed, a voltage of an erase ramp waveform (Ramp-ers) having a small pulse width and a low voltage level is supplied to the Z electrode to erase the wall charge remaining in the cells of the full screen.

The driving method of the plasma display panel to which the conventional driving waveform is applied has a problem that the black brightness is relatively high during driving, thereby deteriorating the contrast characteristic of the panel. In order to solve this problem, conventionally, the contrast of the driving waveform is supplied to improve the contrast, which is illustrated in FIG. 4.

4 is a view illustrating another driving waveform in accordance with a conventional method for driving a plasma display panel. Referring to FIG. 4, another driving waveform according to the driving method of the conventional plasma display panel may not be supplied with the erase pulse in the erase period. That is, the waveform supplied from the reset section of the first subfield is supplied with the same waveform as the ramp waveform supplied from the conventional reset section of FIG. 3, and the waveform supplied from the reset section except the first subfield is not the rising ramp waveform. The waveform rises to a predetermined value and begins to fall from the positive voltage lower than the peak voltage of the square waveform, and the waveform falls down to a specific voltage level below the ground (GND) level voltage as a falling ramp waveform.

Such a driving waveform is conventionally sufficiently erased the wall charges in the cells held in the discharge in the previous sustain section even when the erase pulses are not applied to the Z electrode in the erasing section to equalize the distribution of the wall charges of the respective discharge cells. The wall charges of the cells that do not participate in the discharge are maintained in the interval, so that the wall charges in the entire discharge cells are uniformly distributed.

As a result, the dark brightness of the plasma display panel may be improved due to the discharge in the reset section, thereby improving the contrast characteristic.

On the other hand, in recent years, in order to increase the discharge efficiency of the plasma display panel, the content ratio of xenon (Xe) in the discharge cell is further increased. In this case, if the driving waveform according to the conventional driving method of the plasma display panel is applied, the interference of the X electrode with respect to the discharge between the Y electrode and the Z electrode is increased, thereby increasing the reset voltage during the discharge. In the case of applying to a large screen, there is a problem that the driving margin of the panel is deteriorated.

In addition, when the content of xenon (Xe) is increased, the address jitter characteristic is deteriorated in the method of driving a plasma display panel having a driving waveform as in the related art, and thus there is a problem that the sustain discharge becomes unstable in the sustain period.

In order to solve the above problems, the present invention suppresses an increase in the reset voltage during discharging even when the content ratio of xenon (Xe) charged in the discharge cell is increased, thereby securing a driving margin of the panel and at the same time improving the contrast characteristics. The purpose is to provide a panel driving method.

In addition, an object of the present invention is to provide a method of driving a plasma display panel in which sustain discharge can be stably generated in a sustain period by preventing deterioration of the address jitter characteristic as the content ratio of xenon (Xe) increases. .

In order to achieve the above object, a plasma display panel driving method according to an exemplary embodiment of the present invention includes a plurality of subfields having different emission counts divided into a reset period, an address period, and a sustain period, and each of the X, Y, and Z electrodes is divided into a plurality of subfields. In the driving method of a plasma display panel which expresses an image by applying a predetermined voltage, a reset period of one of the subfields is discharged between the Y electrode and the Z electrode by applying a rising ramp waveform to the Y electrode. A surface discharge step, a second surface discharge step of applying a falling ramp waveform to the Y electrode and discharging between the Y electrode and the Z electrode, and applying a falling ramp waveform to the Y electrode and the Z electrode, respectively, the Y electrode and the X electrode Excluding any one of the first reset section and subfield in which the second discharge step in which the opposite discharge is generated between the electrodes and between the Z electrode and the X electrode is sequentially generated The reset section of the other subfield applies a ramp waveform rising to the Z electrode to generate a first surface discharge between the Y electrode and the Z electrode, and applies a ramp waveform falling to the Y electrode and the Z electrode, respectively, so that the Y electrode and the X electrode are applied. And a second reset section in which a second discharge step in which opposing discharges are generated between the electrodes and between the Z electrode and the X electrode is sequentially generated.
The lowest voltage value of the first falling lamp applied to the Y electrode during the second surface discharge is characterized in that the negative voltage.

In the first reset period, a rising surface lamp is applied to the Y electrode and a ground (GND) level voltage is applied to the Z electrode to discharge between the Y electrode and the Z electrode, and the first surface discharge step. Subsequently, a second surface discharge step is applied to the Y electrode and a first falling lamp descending from a predetermined voltage value and a sustain voltage Vs is applied to the Z electrode to discharge between the Y electrode and the Z electrode. After the discharging step, a first falling discharge is applied to the Y electrode at a ground level voltage, and a second falling lamp that falls after a predetermined time is discharged between the Y electrode and the X electrode, and the ground level is applied to the Y electrode. And a second opposite discharge step in which a third falling lamp is applied to the Z electrode when the voltage is maintained, and is discharged between the Z electrode and the X electrode.

The lowest voltage value of the first falling lamp applied to the Y electrode during the second surface discharge is characterized in that the negative voltage.

The lowest voltage value of the second falling lamp applied to the Y electrode during the first opposite discharge is lower than the lowest voltage value of the first falling lamp supplied during the second surface discharge.

The lowest voltage value of the third falling lamp applied to the Z electrode during the second counter discharge is characterized in that the negative voltage.

The lowest negative voltage value of the third falling lamp is lower than the voltage value of the voltage of the first falling lamp plus the voltage of the second falling lamp.

The change in wall voltage according to the rising lamp of the Y electrode during the first surface discharge is | ΔVw1, yz |, and the change in wall voltage according to the first falling lamp of the Y electrode during the second surface discharge is | ΔVw2, yz |, and When the wall voltage change according to the second falling lamp of the Y electrode during one opposite discharge is | ΔVw3, yx |, the following equation | ΔVw2, yz | +0.5 | ΔVw3, yx | <| ΔVw1, yz |

In the second reset period, a ground level voltage is applied to the Y electrode, and a second rising ramp voltage having a smaller magnitude than that of the rising lamp in the first reset period is applied to the Y electrode. After the first surface discharge step and the first surface discharge step are discharged between the electrodes, a fourth falling lamp falling from the ground (GND) level voltage applied to the Y electrode is applied to discharge between the Y electrode and the X electrode. And a second opposite discharge step in which a fifth falling lamp is applied to the Z electrode and discharged between the Z electrode and the X electrode at the time when the fourth falling lamp is applied to the Y electrode. do.

The second rising ramp voltage applied to the Z electrode during the first surface discharge may be a sustain voltage.
The lowest voltage value of the fourth falling lamp applied to the Y electrode during the first counter discharge is characterized in that the negative voltage of the second falling lamp in the first reset period.

delete

The lowest voltage value of the fifth falling lamp applied to the Z electrode during the second counter discharge is characterized in that the negative voltage.

The lowest negative voltage value of the fifth falling lamp is lower than the voltage value of the fourth falling lamp.
In the first surface discharge step of the first reset section, the voltage of the ground (GND) level is applied to the Z electrode.
In the second surface discharge step of the first reset period, a sustain voltage Vs is applied to the Z electrode.
In the opposite discharge step of the first reset section, the second electrode is applied to the Y electrode at a ground level voltage, and a second falling lamp that falls after a predetermined time point is applied to the Z electrode, and a voltage lower than the sustain voltage Vs is applied to the Z electrode. It is characterized by.
In the first surface discharge step of the second reset section, a voltage of a ground (GND) level is applied.
During the second discharge period of the second reset section, a third falling lamp is applied to the Y electrode, which is maintained at a ground level voltage, and is lowered after a predetermined time, and is lowered from the ground (GND) level voltage to the Z electrode. A fifth falling lamp is applied so that the opposite discharge between the Y electrode and the X electrode and the Z electrode and the X electrode simultaneously occurs.

Hereinafter, a method of driving a plasma display panel according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a view showing a driving waveform in accordance with the plasma display panel driving method of the present invention. First, the driving method of the plasma display panel according to the present invention supplies a predetermined driving waveform to a reset section for initializing the entire screen, an address section for selecting a cell to be discharged, and a sustain section for maintaining the discharge of the selected cell. Driven.

Accordingly, in the plasma display panel driving waveform of the present invention, different reset waveforms are supplied in the reset periods of the first subfield and the remaining subfields. That is, the voltage of the first ramp-up waveform is supplied to the Y (scan) electrode in the setup period (Set Up: SU) in the reset period of the first subfield, and the set down (SD) period is provided. The voltages of the first and second ramp-down waveforms are supplied to the first and second ramp-down waveforms. In addition, a sustain voltage is supplied to the Z (sustain) electrode in synchronization with the first falling ramp waveform applied to the Y (scanning) electrode in a set down period (SD), and is lowered in synchronization with the second falling ramp waveform. The voltage of the ramp waveform is supplied.

As such, the first rising ramp waveform supplied to the setup section in the first subfield causes the first surface discharge between the Y electrode and the Z electrode, and the first falling ramp waveform supplied to the setdown section also includes the second between the Y electrode and the Z electrode. Causing a surface discharge, and then, the supplied second falling ramp waveform causes a first opposite discharge between the Y electrode and the X electrode, and the third falling ramp waveform supplied to the Z electrode causes the second opposite discharge between the Z electrode and the X electrode. Causes

During the set-up period (SU ') in the reset period of the remaining subfields except the first subfield, a voltage of ground (GND) level is supplied to the Y (scan) electrode, and a second rise is performed to the Z (sustain) electrode. The voltage of the ramp waveform is supplied. During the Set Down (SD ') period, the Y (scan) electrode is supplied with the voltage of the fourth ramp-down waveform, and the Z (Sustain) electrode is supplied during the Set Down (SD') period. The voltage of the fifth falling ramp waveform is supplied in synchronization with the fourth falling ramp waveform applied to the (scanning) electrode.

As such, the second rising ramp waveform supplied from the subfields other than the first subfield causes the first surface discharge between the Y electrode and the Z electrode, and the fourth falling ramp waveform supplied to the set-down period is connected between the Y electrode and the X electrode. The first opposite discharge is caused, and the fifth falling ramp waveform supplied to the Z electrode causes the second opposite discharge between the Z electrode and the X electrode.

The driving waveforms of the reset period in the remaining subfields except the first subfield and the first subfield described above will be described in more detail as follows.

<1st subfield>

When driving the plasma display panel according to the present invention, the first rising ramp waveform Ramp-up is simultaneously applied to all the Y electrodes Y1 to Yn during the setup period SU of the reset period of the first subfield. The voltage of the ground GND level is applied to the electrode and maintained during the setup period SU. At this time, the first surface discharge is generated between the Y electrode and the Z electrode in the cells of the full screen by the first rising ramp waveform.

In the set down period, the first and second falling ramp waveforms are supplied to all the Y electrodes Y1 to Yn, and the third falling ramp waveform is supplied to the Z electrodes Z1 to Zn.

The first falling ramp waveform begins to fall at a positive voltage lower than the peak voltage Vry of the first rising ramp waveform and falls to a specific voltage level (-Vmy) below the ground GND level. At this time, the lowest voltage value, which is the specific voltage level (-Vmy) of the first falling lamp, preferably has a negative voltage value so that sufficient surface discharge can occur between the Y electrode and the Z electrode. In addition, a predetermined voltage is applied to the Z electrode and maintained during the set-down period SD to which the voltage of the first falling lamp is supplied to generate a weak second surface discharge between the Y electrode and the Z electrode. The formed wall charges are partially erased. In this case, the predetermined voltage applied to the Z electrode is preferably a sustain voltage (Vs) for causing surface discharge by providing a sufficient potential difference between the Y electrode and the Z electrode.

The second falling ramp waveform rises from the end of the first falling ramp waveform, i.e., at a specific voltage level (-Vmy) to the ground (GND) level, maintains the ground (GND) level for a predetermined time, and then returns to the ground (GND) level. A voltage (-Vny) having a magnitude smaller than the following specific voltage level (-Vmy) is lowered. At this time, the lowest voltage value, which is the voltage of the second falling lamp (-Vny), is greater than the lowest value of the first falling lamp supplied at the time of the second surface discharge so that sufficient opposite discharge occurs between the Y electrode and the X electrode to completely eliminate the wall charge. It is desirable to have a lower negative voltage.

On the other hand, the reason why the second falling ramp waveform applied to the Y electrode is rapidly raised to the ground (GND) level at the end of the first falling ramp waveform and then supplied is due to the sudden drop in the voltage applied to the Z electrode. This is to prevent the instantaneous drop in the voltage of the Y electrode due to the coupling between the Y electrode and the Z electrode when the applied voltage is continuously dropped.

The third falling ramp waveform starts to fall at the ground (GND) level and falls to the specific voltage level (-Vz). At this time, the lowest voltage value, which is the specific voltage level (-Vz) of the third falling lamp, has a negative voltage value so that sufficient counter discharge is generated between the Z electrode and the X electrode to completely eliminate the wall charge. It has a lower voltage value (-Vz) than the voltage value of the falling lamp (-Vmy) plus the voltage of the second falling lamp (-Vny).

<Subfields other than the first subfield>

When driving the plasma display panel according to the present invention, the driving waveform supplied to the reset period of the remaining subfields except for the first subfield is first applied to all the Y electrodes Y1 to Yn in the setup period SU '. The voltage of the ground GND level is supplied and maintained, and the voltage Ve of the second rising ramp waveform smaller than the first rising ramp waveform supplied to the reset period of the first subfield is applied to the Z electrode. At this time, the cells not participating in the discharge in the sustain period of the first subfield are maintained without any discharge, and the cells participating in the discharge in the sustain period of the first subfield are the Y electrode and the Z electrode by the second rising ramp waveform. The first surface discharge is generated between them and the wall charge between the Y electrode and the Z electrode is erased to some extent.

On the other hand, although the voltage Ve of the second rising ramp waveform may be a voltage capable of causing surface discharge between the Y electrode and the Z electrode, the sustain voltage Vs is preferably supplied. This is to use the same voltage source used for sustain discharge.

In the set-down period SD ', the fourth falling ramp waveform is supplied to all the Y electrodes Y1 to Yn, and the fifth falling ramp waveform is supplied to the Z electrodes Z1 to Zn.

The fourth falling ramp waveform begins to fall at the ground (GND) level and falls to a specific voltage level (-Vny) below the ground (GND) level. At this time, it is preferable that the lowest voltage value, which is the specific voltage level (-Vny) of the fourth falling lamp, has a negative voltage value that can sufficiently eliminate wall charges by generating sufficient counter discharge between the Y electrode and the X electrode. The lowest voltage value, which is the specific voltage level (-Vny) of the fourth falling lamp, is equal to the lowest voltage value, which is the specific voltage level of the second falling lamp supplied from the first subfield.

The fifth falling ramp waveform starts to fall at the time when the fourth falling lamp is applied to the Y electrode, that is, the ground (GND) level and falls to the specific voltage level (-Vz). At this time, the lowest voltage value, which is a specific voltage level (-Vz) of the fifth falling lamp, has a negative voltage value capable of completely erasing wall charges due to sufficient counter discharge occurring between the Z electrode and the X electrode, and preferably the fourth voltage. It has a lower voltage value (-Vz) than the voltage of the falling lamp (-Vny).

As described above, when the plasma display panel is driven according to the present invention, by supplying a predetermined reset driving waveform in the reset section of all the subfields, the wall charges accumulated on the electrodes can be made uniform, thereby enabling stable discharge in the address section. .

Meanwhile, in the plasma display panel driving method according to the present invention, the variation in wall voltage and the dark luminance according to the surface discharge and the counter discharge in the reset section are as follows.

6 is a view for explaining the wall voltage change amount and the dark luminance amount according to the surface discharge and the counter discharge in the reset section when driving the plasma display panel of the present invention. FIG. 6 (a) shows the wall voltage change amount and the dark luminance amount in the reset period of the first subfield, and FIG. 6 (b) shows the wall voltage change amount and dark amount in the reset period of the remaining subfields except for the first subfield. It shows the measure.

First, when the wall voltage according to the surface discharge is changed in the setup period SU of the reset period of the first subfield of FIG. 6A, the first surface of the setup period SU of the reset period of the first subfield is shown. The discharge occurs above the Vf1, y voltage between the Y electrode and the Z electrode, and wall voltage accumulation occurs. The wall voltage variation | ΔVw1, yz | is the highest voltage Vry of the first rising ramp and the first surface discharge starts. This is the difference between the voltages Vf1 and y.

In the set-down period SD of the reset period of the first subfield, the wall voltage variation due to the surface discharge and the counter discharge is divided into two stages SD1 and SD2. First, in the first set-down period SD1, the second surface discharge causes surface discharge to occur at or below Vf2, y between the Y electrode and the Z electrode, thereby partially erasing wall charges. At this time, the wall voltage variation | ΔVw2, yz | Is the difference between the second surface discharge start voltage (Vf2, y) and the minimum voltage (-Vmy) of the first falling lamp.

In the second set-down period SD2, the first opposite discharge causes the opposite discharge to occur between -Y and X electrodes below -Vf3, y, so that most of the wall charges are erased, and the change in wall voltage | ΔVw3, yx | It is the difference between the one-discharge discharge start voltage (-Vf3, y) and the minimum voltage (-Vny) of the second falling lamp.

As described above, when the wall voltage changed according to the surface discharge and the counter discharge in the reset section of the first subfield satisfies Equation 1), the operation is stabilized in the reset section to secure a high driving margin.

Equation 1) | ΔVw2, yz | +0.5 | ΔVw3, yx | <| ΔVw1, yz |

In addition, when the wall voltage change amount according to the surface discharge is shown in the setup period SU 'of the reset periods of the remaining subfields except for the first subfield of FIG. 6B, the setup period SU of the reset period of the first subfield is shown. In the first surface discharge, when the voltage Ve of the second rising ramp is supplied, a surface discharge occurs between the Y electrode and the Z electrode at a predetermined voltage or more, thereby partially erasing wall charges. When the voltage drops to the lowest voltage (-Vny), the first opposite discharge occurs between the Y electrode and the Z electrode, and most of the wall charges are erased. At this time, the wall voltage is changed in the amount of change | ΔVw3, yx | It is equal to the difference between the first counter discharge start voltage (-Vf3, y) and the minimum voltage (-Vny) of the second falling lamp.

On the other hand, the dark luminance generated in the reset periods of the remaining subfields except for the first subfield of FIG. 6 (b) has a smaller dark luminance characteristic than when a high voltage rising ramp waveform is supplied as in the first subfield. You can see. That is, the contrast characteristics of the plasma display panel of the present invention are much lower than that of the related art because the amount of dark brightness is reduced.

Figure 7 compares the wall voltage state in the cell after the reset discharge according to the drive waveform of the present invention and the wall voltage state in the cell after the reset discharge according to the conventional drive waveform. Referring to FIG. 7, (a) the cell voltage (Vc, zy) between the Y electrode and the Z electrode after the reset discharge according to the conventional driving waveform satisfies the sustain surface discharge voltage (Vf, zy), and the cell between the Y electrode and the X electrode The voltages Vc and xy form wall voltages that satisfy the addressing counter discharge voltages Vf and xy. On the contrary, (b) after reset discharge according to the driving waveform of the present invention, the cell voltage (Vc, xy) between the Y electrode and the X electrode and the cell voltage (Vc, xz) between the Z electrode and the X electrode satisfy addressing opposite discharges, respectively. The wall voltages (Vf, xy) (Vf, xz) are formed, and the cell voltage (Vc, zy) between the Y electrode and the Z electrode is maintained at 0V.

The cell voltage (Vc, zy) that maintains 0 V between the Y electrode and the Z electrode after the wall voltage state in the cell according to the present invention, in particular the reset discharge, is 0 V which is the ground level at the voltage (-Vz) of the third falling lamp. The voltage rises rapidly and is relatively maintained by the voltage of the third falling lamp (-Vz). Therefore, after the address discharge, negative wall charges can be sufficiently accumulated on the Z electrode side, whereby stable discharge occurs in the sustain period.

As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive.

The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

As described above, according to the present invention, the wall charges of the X electrodes are completely erased in the reset period of the subfield, thereby improving the jitter characteristic due to the addressing discharge.

In addition, since a large number of wall charges are formed on the Y electrode and the Z electrode even after the addressing discharge, a stable driving discharge is performed in the sustain period, thereby securing a high driving margin.

In addition, the present invention does not supply the rising ramp waveform in the reset periods of the remaining subfields except the first subfield, thereby improving the contrast characteristic according to the decrease in the brightness.

Claims (18)

A method of driving a plasma display panel in which a plurality of subfields having different emission counts are divided into a reset period, an address period, and a sustain period, and a predetermined voltage is applied to the X, Y, and Z electrodes in each period. The reset period of any one of the subfields is A first surface discharge step of discharging between the Y electrode and the Z electrode by applying a ramp waveform rising to the Y electrode, and a discharge of the discharge between the Y electrode and the Z electrode by applying a ramp waveform falling to the Y electrode; A second surface discharge step and a second discharge step in which opposite discharges are generated between the Y electrode and the X electrode and between the Z electrode and the X electrode by applying ramp ramps falling to the Y electrode and the Z electrode, respectively; A first reset section sequentially generated, The reset section of the other subfield except one of the subfields is A first surface discharge step is generated between the Y electrode and the Z electrode by applying a ramp waveform rising to the Z electrode, and a ramp waveform falling on the Y electrode and the Z electrode is applied to the Y electrode and the X electrode. And a second reset period in which a second discharge step in which a counter discharge occurs respectively between the Z electrode and the X electrode occurs sequentially Method of driving a plasma display panel comprising a. The method of claim 1, And the first reset section is a first subfield, and the second reset section is a second and subsequent subfields. The method of claim 2, The first reset period is A first surface discharge step in which a first rising lamp is applied to the Y electrode and a ground (GND) level voltage is applied to the Z electrode to discharge between the Y electrode and the Z electrode; After the first surface discharge step, a first falling lamp is applied to the Y electrode, the first falling lamp being lowered from a predetermined voltage value, and a sustain voltage (Vs) is applied to the Z electrode to discharge between the Y electrode and the Z electrode. Discharge step; After the second surface discharge step, a first counter discharge step in which a second falling lamp is applied to the Y electrode and is maintained at a ground level voltage and is discharged from a predetermined time point and discharged between the Y electrode and the X electrode; And,  A second opposite discharge step of discharging between the Z electrode and the X electrode by applying a third falling lamp to the Z electrode when the ground level voltage is maintained at the Y electrode; Method of driving a plasma display panel comprising a. The method of claim 3, wherein And the lowest voltage value of the first falling lamp applied to the Y electrode during the second surface discharge is a negative voltage. The method of claim 3, wherein The lowest voltage value of the second falling lamp applied to the Y electrode during the first opposite discharge is a negative voltage lower than the lowest voltage value of the first falling lamp supplied during the second surface discharge. How to drive the display panel. The method of claim 3, wherein And the lowest voltage value of the third falling lamp applied to the Z electrode during the second opposite discharge is a negative voltage. The method of claim 6, And a lowest negative voltage value of the third falling lamp is lower than a voltage value obtained by adding the voltage of the first falling lamp and the voltage of the second falling lamp. The method of claim 3, wherein The wall voltage change amount according to the rising lamp of the Y electrode during the first surface discharge is | ΔVw1, yz |, and the wall voltage change amount according to the first falling lamp of the Y electrode during the second surface discharge is | ΔVw2, yz | When the amount of change in the wall voltage according to the second falling lamp of the Y electrode during the first opposite discharge is | ΔVw3, yx | Formula | ΔVw2, yz | +0.5 | ΔVw3, yx | <| ΔVw1, yz | is satisfied. The method of claim 2, The second reset period is A voltage of ground (GND) level is applied to the Y electrode, and the second rising lamp voltage having a smaller magnitude than the first rising ramp in the first reset period is applied to the Z electrode so that the Y electrode and the Z electrode are applied. A first surface discharge step of discharging the liver; A first opposite discharge step of applying a fourth falling lamp falling from the ground (GND) level voltage applied to the Y electrode after the first surface discharge step to discharge between the Y electrode and the X electrode; And,  A second opposite discharge step in which a fifth falling lamp is applied to the Z electrode and discharged between the Z electrode and the X electrode when the fourth falling lamp is applied to the Y electrode; Method of driving a plasma display panel comprising a. The method of claim 9, And the second rising ramp voltage applied to the Z electrode during the first surface discharge is a sustain voltage.  The method of claim 9, And the lowest voltage value of the fourth falling lamp applied to the Y electrode during the first opposite discharge is a negative voltage of the second falling lamp in the first reset section. The method of claim 9, And the lowest voltage value of the fifth falling lamp applied to the Z electrode during the second opposite discharge is a negative voltage. The method of claim 12, The lowest negative voltage value of the fifth falling lamp is lower than the voltage value of the fourth falling lamp. The method of claim 1, And a ground (GND) level voltage is applied to the Z electrode during the first surface discharge step of the first reset section. The method of claim 1, And a sustain voltage (Vs) is applied to the Z electrode during the second surface discharge step of the first reset section. The method of claim 1, In the opposite discharge step of the first reset section, the Y electrode maintains the ground level voltage, and a second falling lamp that descends from a predetermined time point is applied, and a voltage lower than the sustain voltage Vs is applied to the Z electrode. A driving method of a plasma display panel, characterized in that. The method of claim 1, And a ground (GND) level voltage is applied during the first surface discharge step of the second reset section. The method of claim 1, During the second discharge phase of the second reset section, a third falling lamp is applied to the Y electrode and maintained at a ground level voltage. And a fifth falling lamp is applied so that opposite discharges occur simultaneously between the Y electrode and the X electrode, and between the Z electrode and the X electrode.

Images