KR100645645B1 - Printed circuit board where the test coupon of the micro-via is had and the manufacturing method - Google Patents

Abstract

The present invention relates to a printed circuit board equipped with a test coupon of a micro via hole and a method of manufacturing the same. In particular, a daisy chain coupon is inserted into a free portion of a sheet of the printed circuit board to prevent leakage of defective products of the micro via hole. The present invention relates to a printed circuit board having a test coupon of a micro via hole, and a manufacturing method thereof.

In addition, according to the present invention, a pair of electrical inspection connections formed by exposing and developing the copper foil of the sheet outer layer, providing a connection with the probe of the inspection equipment to perform electrical inspection of the PCB; A plurality of holes having a hole diameter equal to or less than that of the micro via hole used in the product of the sheet, and located in close proximity to the electrical inspection connection to provide a connection between the first layer and the second layer, the first layer and the third layer, respectively. A first type via hole and a plurality of second type via holes; And a conductive pattern formed by exposing and developing copper foils of each layer to provide electrical connection between the electrical inspection connecting portion and the via hole, wherein the electrical inspection connecting portion and the via hole maintain electrical connection by the conductive pattern to daisy-chain. Provided is a printed circuit board having a test coupon of a micro via hole, which is formed of

Micro Via Hole, Poor Reliability, Daisy Chain, Coupon

Description

Printed circuit board where the test coupon of the micro-via is had and the manufacturing method}             

1 is a front view and an enlarged view of a sheet provided with a daisy test coupon according to an embodiment of the present invention.

2A to 2D are front views of each layer of a printed circuit board having a daisy test coupon according to an embodiment of the present invention.

3 is a cross-sectional view of a printed circuit board having a daisy test coupon according to an embodiment of the present invention.

4A to 4I are flowcharts of a method of manufacturing a daisy chain test coupon according to an embodiment of the present invention.

5A to 5K are flowcharts illustrating a method of manufacturing a test coupon of a micro via hole according to another exemplary embodiment of the present invention.

6A to 6D are cross-sectional views of a printed circuit board to which an RCC to which a daisy chain is applied according to an embodiment of the present invention is applied.

7A to 7D are cross-sectional views of a printed circuit board to which an RCC to which a daisy chain is applied according to an embodiment of the present invention is applied.

8A to 8E are exemplary views showing products to which a daisy chain of a rigid flexible substrate is applied.

<Explanation of symbols for the main parts of the drawings>

100, 111, 200, 211: electrical inspection points

101 ~ 110, 201 ~ 210: Micro Via Hole

300, 303: prepreg 301, 304: polyimide

302 and 305: Plating pattern layer 306: Micro via hole

400: CCL 401: prepreg

402: RCC 403: through hole

405: micro via hole 406: plating layer

500, 504: FCCL 501: Coverlay

502, 503: prepreg 505: through hole

507: micro via hole 508: plating layer

The present invention relates to a printed circuit board having a test coupon of a micro via hole and a method of manufacturing the same. In particular, a daisy chain coupon is inserted into a free portion of a sheet of the printed circuit board to prevent leakage of defective products from the micro via hole. The present invention relates to a printed circuit board provided with a test coupon of a micro via hole and a method of manufacturing the same.

Assembly and population of printed circuit boards require many batches, soldering and other processing steps. Therefore, in order to economically manufacture high quality products, testing and inspection are absolutely necessary.

This is especially true when chip circuit density, I / O density, and surface mount technologies affect printed circuit board circuit loadings.

The failure can be rooted in component chips and bare boards, in the insertion process or during the soldering process. Such failures include wrong values or labels, poor circuit performance, open circuits, short circuits, and components in the wrong position. ), Physical damage, improper solder, damaged or open lands, or failures due to out of tolerance.

If the quality required for PCB is largely divided, (1) there will be no problem in the process of mounting parts on the PCB and assembling it into the product (mounting), and (2) the assembled electronic device will move as designed (operation). (3) The electronic device will operate without failure for a long time (reliability). The problems of (1) and (2) are found in the manufacturers of electronic devices. The problem in (3) appears in the form of a failure during the consumer's use.

Set makers perform thorough quality control through drawings and specifications to make products that meet the above three conditions. For quality control, it is very important to manage each manufacturing process according to the specified specifications and to deal with the occurrence of defects by physically and electrically inspecting the completed PCB.

When PCB processing is completed, inspect the circuit for electrical abnormalities such as disconnection, short circuit, and insulation gap violation. During PCB manufacturing, defects such as disconnection and short circuit of wiring patterns occur most frequently. In order to discriminate such a defect, it is examined whether there is a disconnection in each wiring and whether it is shorted with a neighboring conductor. In other words, the test pins are contacted to all lands on the PCB to check for abnormalities. This is called a bare board test (BBT). This is the name used to distinguish the circuit test, operation test, etc. performed after mounting the component on the PCB.

BBT equipment can be classified into several categories according to the contact method of the pin and the shape of the jig for fixing the pin.

(1) Pin contact method

Electrical inspection is performed by contacting the pin directly to the circuit. There are fixed pin method, assembly pin method, fixing pin + assembly pin method.

① Fixed pin method: This method is the most commonly used method, and is divided into a basic grid process pin method and a dedicated jig method.

'Basic grid fixing pin method' examines the circuit by exposing the pin in the location where the contact is needed among the fixing pins located on the 2.54mm spacing grid and shielding the other pin with a mask. Use a shielding piece of paper punched only in the location of the pin that matches the PCB circuit to be inspected. Data for manufacturing the shielding paper is generated by CAT (Computer Aided Testing). BBT pin is made to have elasticity by using spring to prevent scratching.

This method uses low-cost shielding paper that can be made relatively simple, making it suitable for inspecting small quantities of PCBs. On the other hand, since the position of the inspection pin is fixed to the lattice point, there is a disadvantage that the inspection is difficult if the position of the circuit is out of the lattice position.

The dedicated jig method uses an inspection jig made for the PCB circuit to be inspected. This method is costly and time-consuming to manufacture the jig, but has the advantage of inspecting the entire circuit without exception, so it is applied to the inspection of mass-produced products with low cost.

② Assembly pin method: It utilizes the advantages of the basic grid fixing pin method and the dedicated jig method. This method assembles the pin to make the test fixture. Therefore, the pins can be reused and inspection can be performed at low cost. The disadvantage is that the pin position changes, making it difficult to compare the data. To overcome this, the jig must be stored separately. In addition, there is a disadvantage in that the assembly of the pin is difficult if the spacing of the wiring becomes narrow at the time of inspection.

③ Fixing Pin + Assembly Pin Method: This method is used when SMD (Surface Mounted Device) is mounted on both sides of PCB. It is expensive to produce a dedicated jig for both sides, so the top is to produce a dedicated jig, and the bottom is a jeep pin method to make a jig. This is usually a consideration of the fact that a large number of pins are required for inspection due to a large number of components mounted on one side of the PCB. That is, the surface where a large number of pins are required is made a dedicated jig and the other side is inspected by the assembly pin method.

(2) probe movement method

Although one probe is moved along the circuit, the test jig is not required, but the test jigsaw takes a lot of time, requires a program, and is not practically used.

(3) Challenge rubber contact method

This method is used to inspect lands and SMD-mounted PCBs that deviate from the reference grid position. In this method, the test is performed by contacting the pins with flexible conductive rubber to a circuit located outside the reference position.

On the other hand, some obscure defects cannot be detected by BBT alone. In order to compensate for this, the visual inspection is performed in parallel. Poor appearance is an important quality feature that not only degrades product value but also greatly affects reliability. This inspection is mainly performed by the operator to inspect the appearance by eye. Since the ratio of finding a defect by this method is not so high, it can be said that it is not enough as a means for sorting out defective products. However, experienced inspectors can not only inspect various defects at the same time, but also discover problems in the manufacturing process in the form of 'something strange'.

In addition, the external size of the PCB, the size, location and shape of the machined holes are inspected using an auxiliary inspection mechanism.

In addition to appearance inspection, in recent years, AOI (Automatic Optical Inspection), which automatically inspects defects in wiring patterns, is widely used. AOI is a device that automatically inspects the appearance of PCB. The device automatically checks the appearance of the substrate using image sensors and computer pattern recognition technology. After reading the pattern information of the circuit under test with the image sensor, it compares it with the reference data and reads out the defect. In this case, there are two methods of using design criteria as reference data to be compared and two methods of using data of a good quality substrate.

With AOI, you can check the minimum of the cannula ring in the land and the ground of the power supply. In addition, the width of the wiring pattern can be measured and missing holes can be checked. However, it is impossible to check the condition inside the hall.

Via holes, on the other hand, are only processed on double-sided PCBs and MLBs, so they are not on single-sided PCBs. Various defects are likely to occur in the via holes. If the degree of defect is severe, it will be disconnected from the beginning, but in practice, it is often broken during mounting of the part or a problem occurs while the consumer uses the electronic device. Defects are often caused by inadequate drill and plating process conditions. As a result, it is more likely that all PCBs are produced, rather than only a few PCBs.

Since the inside of the via hole is difficult to observe with the naked eye, the cross section of the hole is examined by observing the method. This method is called a microsection method. This method is a fracture inspection method.

In particular, the product applied with laser via hole is a product that always has a potential defect that can cause the product to be unreliable to the customer. It is required to develop a method that can detect the potential defect during the inspection in the final electrical inspection process before it is leaked to the customer. come.

Accordingly, the present invention has been made to satisfy the above needs, by providing a daisy test coupon containing a via hole in the free portion of the sheet having a level equivalent to or higher than that of the product to prevent leakage of defective products in the micro via hole. It is an object of the present invention to provide a printed circuit board equipped with a test coupon of a micro via hole and a method of manufacturing the same.

The present invention for achieving the above object is formed by exposing and developing the copper foil of the sheet outer layer, providing a connection with the probe of the inspection equipment to provide a pair of electrical inspection connection for the electrical inspection to the PCB; A plurality of holes having a hole diameter equal to or less than that of the micro via hole used in the product of the sheet, and located in close proximity to the electrical inspection connection to provide a connection between the first layer and the second layer, the first layer and the third layer, respectively. A first type via hole and a plurality of second type via holes; And a conductive pattern formed by exposing and developing copper foils of each layer to provide electrical connection between the electrical inspection connecting portion and the via hole, wherein the electrical inspection connecting portion and the via hole maintain electrical connection by the conductive pattern to daisy-chain. It is characterized by forming a.
In addition, the present invention is formed by exposing and developing the copper foil of the outer layer of the sheet, a pair of electrical test connection for providing a connection with the probe of the inspection equipment to perform the electrical test for the PCB; A plurality of holes having the same or less hole diameter than that of the micro via hole used in the product of the sheet, and located in close proximity to the electrical inspection connection to provide a connection between the first layer and the second layer, the second layer and the third layer, respectively. A first type via hole and a plurality of second type via holes; And a conductive pattern formed by exposing and developing copper foils of each layer to provide electrical connection between the electrical inspection connecting portion and the via hole, wherein the electrical inspection connecting portion and the via hole maintain electrical connection by the conductive pattern to daisy-chain. It is characterized by forming a.

In addition, the present invention includes a first step of forming an inner layer circuit including a conductor pattern for providing a mutual connection of a plurality of micro via holes constituting a daisy chain in a plurality of copper-clad laminate; A second step of laminating a prepreg between the plurality of copper foil chuck plates formed in the first step and laminating and pressing an RCC on top of the plurality of copper foil laminate plates; A third step of laser processing a plurality of micro via holes including predetermined micro via holes constituting a daisy chain; And a fourth step of forming an outer layer circuit having a conductor pattern and an electrical inspection connection for providing interconnection of a plurality of micro via holes constituting a daisy chain by performing copper plating on the outer layer, followed by exposure and development. Characterized in that the made up.

The present invention also provides a method comprising: a first step of forming an inner layer circuit including a conductor pattern for providing interconnection of a plurality of micro via holes constituting a daisy chain to a plurality of copper foil laminated plates; A second step of stacking and pressing the plurality of copper foil chuck layer plates and prepregs formed in the first step; A third step of laser processing a plurality of micro via holes including predetermined micro via holes constituting a daisy chain; And a fourth step of forming an outer layer circuit having a conductor pattern and an electrical inspection connection for providing interconnection of a plurality of micro via holes constituting a daisy chain by performing copper plating on the outer layer, followed by exposure and development. Characterized in that the made up.

The present invention also provides a method comprising: a first step of forming an inner layer circuit including a conductor pattern providing interconnection of a plurality of micro via holes forming a daisy chain to a plurality of FCCLs; A second step of attaching a coverlay to each of a pair of FCCLs of a plurality of FCCLs in which an inner layer circuit is formed in the first step; A third step of stacking prepregs between the pair of FCCL copper thin film layer plates formed in the second step, and stacking and pressing the FCCL formed in the first step on the pair of FCCL; A fourth step of laser processing a plurality of micro via holes including predetermined micro via holes constituting a daisy chain; And a fifth step of forming an outer layer circuit having a conductor pattern and an electrical inspection connection for providing interconnection of a plurality of micro via holes constituting a daisy chain by performing copper plating on the outer layer, followed by exposure and development. Characterized in that the made up.

Referring now to Figures 1 and below, the preferred embodiment of the present invention will be described in detail.

1 is a front view and an enlarged view of a sheet provided with a daisy test coupon according to an embodiment of the present invention.

Referring to the drawings, it can be seen that the Daisy Chain Coupon is inserted in the upper part of the seat (if there is a spare part in the lower part, of course, a daisy chain may be installed in the lower part).

Daisy-chain is a term used in computer architecture that refers to the method of connecting all devices in series based on the highest priority. Since it is connected by H / W, the response speed is very fast, but a separate H / W is required. This is uneconomical and difficult to change priorities between devices. Here, daisy chains are used in the same sense, and they are used to indicate how the tails are tied to each other, which means that each layer is zigzag connected to each other through via holes and conductive patterns. That is, for example, in the case of a four-layer printed circuit board, the electrical inspection point 100 and the first via hole 101 are connected in a conductive pattern, and the first via hole 101 connects the first layer and the second layer. Connect. The first via hole 101 is connected to the second via hole 102 through the conductive pattern of the second layer, and the second via hole 102 provides a connection between the second layer and the first layer. Another conductive pattern in one layer provides a connection of the second via hole 102 and the third via hole 103. In this way, the electrical test point at the front and the electrical test point at the rear are connected.

These daisy chain coupons may be inserted in the inner spare part when there is no margin in the outer part of the seat, or may be arranged in two rows of micro via holes arranged in a row.

In addition, the hole diameter and depth of the micro via hole are designed to be equal to or higher than the specification of the product to prevent leakage of defective products. The smaller the hole diameter and the deeper, the higher the difficulty of the product.

2A to 2D are front views of each layer of a daisy test coupon according to an embodiment of the present invention, and FIG. 3 is a cross-sectional view of a daisy test coupon according to an embodiment of the present invention.

Referring to FIG. 2A, in the first layer, the electrical inspection point 200a secures the electrical connection to the land of the first via hole 201a by copper foil, and the land of the second via hole 202a is the third via hole. It can be seen that the land of 203a maintains electrical connection through the copper foil, and the land of the fourth via hole 204a maintains electrical connection through the copper foil to the land of the fifth via hole 205a. . In addition, the land of the sixth via hole 206a maintains electrical connection through the copper foil from the first layer to the land of the seventh via hole 207a, and the land of the eighth via hole 208a is the ninth via hole. It can be seen that the electrical connection is maintained through the copper foil to the land of 209a, and the land of the tenth via hole 210a secures the electrical connection to the land of the electrical inspection point 211a by the copper foil.

Referring to FIG. 2B, the land of the first via hole 201b in the second layer maintains electrical connection through the copper foil to the land of the second via hole 202b, and the land of the third via hole 203b is The electrical connection is maintained to the land of the fourth via hole 204b through the copper foil, and the land of the fifth via hole 205b is maintained to the electrical connection through the copper foil to the land of the sixth via hole 206b. It can be seen. In addition, the land of the seventh via hole 207b maintains electrical connection through the copper foil from the second layer to the land of the eighth via hole 208b, and the land of the ninth via hole 209b is the tenth via hole. It can be seen that the electrical connection is secured through the copper foil to the land of 210b.

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On the other hand, it can be seen that the fourth layer and the third layer are also connected by the same method as that in which the copper foil is formed on the first laser and the second layer.

3, the polyimide 301a is stacked on the prepreg 300, and a conductive pattern 302a is formed on the prepreg 300 to provide conductivity of the via hole and the via hole. The prepreg 303a is formed thereon. The polyimide 304a is stacked and the polyimide 304a is stacked thereon, and a conductive pattern 305a is formed on the top thereof to provide conductivity of the via hole and the via hole, and the connection is maintained by the micro via hole 306a. In detail, the electrical inspection point and the first via hole are maintained in the topmost conductive pattern, and the first via hole provides a connection between the first layer and the second layer.

In addition, the first via hole maintains contact with the second via hole through the conductive pattern of the second layer, and the second via hole provides connection between the first layer and the second layer.

In this way, the connection is maintained from the front electrical test point to the rear electrical test point.

4A to 4I are flowcharts of a method of manufacturing a daisy chain test coupon according to an embodiment of the present invention.

Referring to FIG. 4A, first, an inner layer circuit is formed on the CCL 400, where the CCL 400 refers to a thin laminated plate coated with copper, and resin is used as a base material.

Resins have excellent electrical properties, but have the disadvantages of insufficient mechanical strength and a large dimensional change by temperature of about 10 times that of metals. To compensate for these drawbacks, paper, fiberglass and glass nonwoven fabrics are used as reinforcing materials.

Referring to FIG. 4B, an RCC 402a is stacked on the first CCL 400a, a prepreg 401 is stacked between the first CCL 400a and the second CCL 400b, and the second CCL is stacked. A Resin Coated Copper Foil (RCC) 402b is stacked below the 400b.

Referring to FIG. 4C, the CCLs 400a and 400b, the prepregs 401, and the RCCs 402a and 402b stacked in FIG. 4B are compressed using a press to make a single printed circuit board. I use a lot of heat press.

Referring to FIG. 4D, the target hole after trimming to prevent scratching and safety accidents of the product by trimming the resin and copper foil flowing out of the target of the target hole and the laminated substrate after processing the target hole for the drill processing, The hole 403 is processed in the substrate on the basis of the drill.

Referring to FIG. 4E, copper foils of portions 404a and 404b for forming via holes by laser processing by exposure / development are removed. Referring to FIG. 4F, micro via holes 405a and 405b by CO ₂ laser processing. ) And desmearing and deburring to remove contaminants from the hole wall and substrate. At this time, the micro via hole constituting the daisy chain is processed at the same time.The hole diameter and depth of the micro via hole are designed to be the same as or higher than the product specifications to prevent the leakage of defective products.The smaller the hole diameter and the deeper the depth, Product difficulty increases.

Referring to FIG. 4G, electroless copper plating and electrolytic copper plating are continuously performed to plate the inner walls of the holes (406a and 406b). Referring to FIG. 4H, a circuit is formed on the outer layer. After printing 407a and 407b, surface treatment, routing to router, and electrical inspection are performed, and after final inspection, packaging is performed.

5A to 5K are flowcharts of a method of manufacturing a test coupon of a micro via hole according to another embodiment of the present invention.

Referring to FIG. 5A, an inner layer circuit is formed on an FCCL substrate 500 in which copper foil is laminated on a polyimide film. Referring to FIG. 5B, a coverlay 501 for protecting the FCCL substrate 500 may include an FCCL substrate 500. ).

Referring to FIG. 5C, the prepreg 503a is stacked in addition to the coverlay fitting portion of the first FCCL 500a to which the coverlay 501a is welded, and the FCCL 504a is stacked thereon. In addition, the prepreg 503b is stacked below the coverlay 502b contact portion of the second FCCL 500b, and the FCCL 504b is stacked below.

In FIG. 5D, the laid-up FCCLs 504a and 504b, the prepregs 503a and 503b, and the FCCLs 500a and 500b to which the coverlays 501a and 502b are welded are pressed into a press. In FIG. The through hole 505 is processed.

In FIG. 5F, after the copper foils 506a and 506b are removed by etching and exposure, the micro via holes 507a and 507b are processed in FIG. 5G using a laser drill. At this time, the via hole forming a daisy pattern is also processed, and the diameter is smaller than that of the via hole processed using a drill. That is, at this time, the hole diameter and depth of the micro via hole constituting the daisy chain are designed to be equal to or higher than the product specification to prevent leakage of defective products, and the smaller the hole diameter and the deeper, the higher the product difficulty. .

In FIG. 5H, electroless copper plating 508a and 508b are applied to the processed via hole, an external circuit is formed in FIG. 5I, a coverlay is welded in FIG. 5J, and a photoresist is coated in FIG. 5K to manufacture a printed circuit board.

6A to 6D are cross-sectional views of a printed circuit board to which an RCC to which a daisy chain is applied according to an embodiment of the present invention is applied.

FIG. 6A shows that the first layer and the second layer to which the RCC is applied are provided through a micro via hole. Accordingly, the micro via hole of the daisy chain may also provide a connection between the first layer and the second layer. Is formed.

Referring to FIG. 6B, a layer structure including an interstitial via hole (IVH) is included between a first layer and a fifth layer to which an RCC is applied, and a connection is provided between the first layer and the second layer through a micro via hole. It can be appreciated that the micro via holes of the daisy chain are thus formed to provide a connection between the first layer and the second layer.

FIG. 6C illustrates a layer structure in which an interstitial via hole (IVH) is included between a first layer and a fifth layer to which an RCC is applied, and provides a connection between the first layer and the third layer through a micro via hole. As can be seen, the micro via holes of the daisy chain are thus formed to provide a connection between the first layer and the third layer.

FIG. 6D illustrates a layer configuration in which an interstitial via hole (IVH) is included between a first layer and a fifth layer to which an RCC is applied, and provides a connection between the first layer and the second layer through a micro via hole. It can be seen that the second layer and the third layer also provide a connection through the micro via hole, so that the micro via hole of the daisy chain is also formed to provide a connection between the first layer and the second layer. It can be seen that it is formed to provide a connection between and the third layer.

7A to 7D are cross-sectional views of a printed circuit board to which an RCC to which a daisy chain is applied according to an embodiment of the present invention is applied.

In FIG. 7A, it can be seen that the first via and the second layer to which the prepreg is applied are provided through a micro via hole. Accordingly, the micro via hole of the daisy chain also provides a connection between the first layer and the second layer. It is formed to.

Referring to FIG. 7B, a layer structure including an interstitial via hole (IVH) is included between a first layer and a fifth layer to which a prepreg is applied, and a connection is provided through a micro via hole between the first layer and the second layer. As a result, the micro via holes of the daisy chain are also formed to provide a connection between the first layer and the second layer.

FIG. 7C illustrates a layer configuration in which an interstitial via hole (IVH) is included between a first layer and a fifth layer to which a prepreg is applied, and provides a connection between the first layer and the third layer through a micro via hole. It can be seen that, accordingly, the micro via hole of the daisy chain is also formed to provide a connection between the first layer and the third layer.

FIG. 7D illustrates a layer configuration in which an interstitial via hole (IVH) is included between a first layer and a fifth layer to which a prepreg is applied, and provides a connection through a micro via hole between the first layer and the second layer. It can be seen that the second layer and the third layer also provide a connection through the micro via hole, so that the micro via hole of the daisy chain is also formed to provide a connection between the first layer and the second layer. It can be seen that it is formed to provide a connection between and the third layer.

FIG. 8A illustrates a product having a daisy chain of a 4-2-4 rigid substrate and FIG. 8B illustrates a product having a daisy chain of a 4-4-4 rigid flexible substrate.

FIG. 8C illustrates a product in which a daisy chain of a rigid flexible substrate having a 6-2-6 structure is applied, and FIG. 8D illustrates a product in which a daisy chain is applied to a rigid flexible substrate having a 6-4-6 structure, and FIG. 8E Shows a daisy chain with a 6-6-6 rigid flexible substrate.

According to the present invention as described above, by producing a daisy chain coupon that can represent a product that is equal to or higher than the specification of the product, there is an effect to prevent the leakage of poor reliability products of the micro via hole.

In addition, according to the present invention, the use of the daisy chain has the effect of preventing the leakage of open defects, void defects of micro via holes, poor delamination of micro via holes, short defects, detailed interlayer short defective products.

In addition, according to the present invention, the product during the electrical inspection is a method of inspecting all the circuits corresponding to the start point and the end point, but when inserting a daisy chain coupon that is continuously connected to the end of the test in a short time by inspecting only a little end This has the effect of verifying reliability.

In addition, according to the present invention, there is an effect that it is possible to prevent the leakage of short-circuit failure caused by the poor scale due to the interlayer eccentricity and the expansion / extension of the substrate.

Claims (14)

A pair of electrical inspection connections formed by exposing and developing the copper foil of the sheet outer layer, and providing a connection with a probe of the inspection equipment to allow electrical inspection of the PCB to be performed; A plurality of holes having a hole diameter equal to or less than that of the micro via hole used in the product of the sheet, and located in close proximity to the electrical inspection connection to provide a connection between the first layer and the second layer, the first layer and the third layer, respectively. A first type via hole and a plurality of second type via holes; And A conductive pattern formed by exposing and developing the copper foil of each layer to provide electrical connection between the electrical test connection and the via hole, And a test coupon for the micro via hole, wherein the electrical test connection part and the via hole maintain electrical connection by the conductive pattern to form a daisy chain. The method of claim 1, And a test coupon for the micro via hole, wherein the electrical test connection part and the via hole are provided at an outer side of the sheet. The method of claim 1, And a test coupon for the micro via hole, wherein the electrical test connection part and the via hole are provided inside the sheet. The method according to any one of claims 1 to 3, And a test coupon for the micro via hole, wherein the electrical test connection part and the via hole are formed in a row. The method according to any one of claims 1 to 3, And a test coupon for the micro via hole, wherein the electrical test connection part and the via hole are formed in a plurality of rows. delete delete delete A first step of forming an inner layer circuit including a conductor pattern providing interconnections of a plurality of micro via holes forming a daisy chain to a plurality of copper-clad laminates; A second step of laminating a prepreg between the plurality of copper foil chuck plates formed in the first step and laminating and pressing an RCC on top of the plurality of copper foil laminate plates; A third step of laser processing a plurality of micro via holes including predetermined micro via holes constituting a daisy chain; And After copper plating the outer layer, a fourth step of forming an outer layer circuit having a conductor pattern and an electrical inspection connection for providing interconnection of a plurality of micro via holes constituting a daisy chain by performing exposure and development. Method of manufacturing a printed circuit board provided with a test coupon of a micro via hole made by. A first step of forming an inner layer circuit including a conductor pattern providing interconnections of a plurality of micro via holes forming a daisy chain to a plurality of copper-clad laminates; A second step of stacking and pressing the plurality of copper foil chuck layer plates and prepregs formed in the first step; A third step of laser processing a plurality of micro via holes including predetermined micro via holes constituting a daisy chain; And After copper plating the outer layer, a fourth step of forming an outer layer circuit having a conductor pattern and an electrical inspection connection for providing interconnection of a plurality of micro via holes constituting a daisy chain by performing exposure and development. Method of manufacturing a printed circuit board provided with a test coupon of a micro via hole made by. The method according to claim 9 or 10, The via hole fabricated in the third step provides a electrical connection between the first layer and the second layer. The method according to claim 9 or 10, The via hole fabricated in the third step is a method for manufacturing a printed circuit board having a test coupon of a micro via hole, characterized in that to provide an electrical connection between the first layer and the third layer. A first step of forming an inner layer circuit including a conductor pattern providing interconnection of a plurality of micro via holes forming a daisy chain to a plurality of FCCLs; A second step of attaching a coverlay to each of a pair of FCCLs of a plurality of FCCLs in which an inner layer circuit is formed in the first step; A third step of stacking prepregs between the pair of FCCL copper thin film layer plates formed in the second step, and stacking and pressing the FCCL formed in the first step on the pair of FCCL; A fourth step of laser processing a plurality of micro via holes including predetermined micro via holes constituting a daisy chain; And After copper plating the outer layer, a fifth step of forming an outer layer circuit having an electrical test connection and a conductor pattern providing mutual connection of a plurality of micro via holes constituting a daisy chain by performing exposure and development. Method of manufacturing a printed circuit board provided with a test coupon of a micro via hole made by. A pair of electrical inspection connections formed by exposing and developing the copper foil of the sheet outer layer, and providing a connection with a probe of the inspection equipment to allow electrical inspection of the PCB to be performed; A plurality of holes having the same or less hole diameter than that of the micro via hole used in the product of the sheet, and located in close proximity to the electrical inspection connection to provide a connection between the first layer and the second layer, the second layer and the third layer, respectively. A first type via hole and a plurality of second type via holes; And A conductive pattern formed by exposing and developing the copper foil of each layer to provide electrical connection between the electrical test connection and the via hole, And a test coupon for the micro via hole, wherein the electrical test connection part and the via hole maintain electrical connection by the conductive pattern to form a daisy chain.

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