KR100624399B1 - Liquid crystal display device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a transverse electric field type liquid crystal display device which can improve flicker defects.

Conventionally, the Vcom wiring is located where the gator pad portion is formed, and the graph of the good flicker region and the Vcom wiring due to the structure of applying a common voltage through a plurality of voltage applying portions of the data pad portion and a voltage applying portion of the data pad portion. There is a problem that the flicker defect is further deepened because the curves according to the wiring resistance of the applied common voltage do not coincide.

In the present invention, the Vcom wiring is formed on the other side besides one side where the gate pad portion is located and on the upper side or the lower side connected to the other side, and applies a common voltage to one end of the Vcom wiring positioned on the data pad portion or the gator pad portion. By proposing a structure, a liquid crystal display device capable of improving flicker defects is provided.

Flicker improvement, Vcom wiring structure, transverse electric field liquid crystal display, common voltage

Description

Liquid crystal display device             

1 is a schematic view of a liquid crystal display panel;

2 is a schematic plan view showing a conventional array substrate for a transverse electric field type liquid crystal display device.

FIG. 3 is an enlarged view of one pixel area of FIG. 2; FIG.

An equivalent circuit diagram for one pixel in the liquid crystal display shown in FIG.

FIG. 5 is a graph showing a flicker good region according to the position of the liquid crystal panel based on the measurement result of varying Vcom with a flicker pattern.

6 is a schematic plan view of an array substrate for a liquid crystal display device according to a first embodiment of the present invention;

FIG. 7A is a graph showing a change in the liquid crystal driving voltage Vp based on the common electrode of pixels connected by the same gate wiring. FIG.

FIG. 7B is a graph showing a change in liquid crystal drive voltage Vp based on a common electrode of a pixel connected by the same gate wiring in a liquid crystal display having a conventional Vcom wiring structure. FIG.

FIG. 8 is a graph showing a change in liquid crystal driving voltage Vp based on a common electrode of a pixel connected by the same gate wiring in a liquid crystal display device having a Vcom wiring structure according to the first embodiment of the present invention.

9A and 9B are schematic plan views of an array substrate for a liquid crystal display device, showing the first and second modified examples according to the first embodiment.

10 is a schematic plan view of an array substrate for a liquid crystal display device according to a second embodiment of the present invention.

<Brief description of the main parts of the drawing>

140: substrate 143: gate wiring

146 data wiring 149 common wiring

153: common electrode 162: pixel electrode

172: Vcom wiring

DPA: Data Pad Section GPA: Gate Pad Section

AA: Display Area NA: Non-Display Area

P: Pixel (Area)

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array substrate for a liquid crystal display (LCD), and more particularly, to a wiring structure and driving of an array substrate.

In general, the liquid crystal display device is a device using the optical anisotropy of the liquid crystal.

That is, the liquid crystal display device is a device for representing an image by using a characteristic that can control the light according to the intensity of the electric field and the light is adjusted according to the molecular arrangement of the liquid crystal when the voltage is applied, comprising a common electrode The lower substrate includes an upper substrate and a pixel electrode, and a liquid crystal layer filled between the two substrates.

A liquid crystal display device will be described in more detail with reference to the drawings.

1 is a view schematically showing a general liquid crystal display device.

As shown in the drawing, a general liquid crystal display device 1 includes a black matrix 7 formed between a color filter 5 and each of the color filters 5 on the transparent insulating substrate, and the color filter 5 and the black matrix ( 7) the upper substrate 3 having the common electrode 9 deposited thereon, the pixel region P defined by the intersection of the gate wiring 13 and the data wiring 15, and the pixel region P. And a lower substrate 11 formed of a pixel electrode 17 and a switching element T formed therein, and a liquid crystal 19 is filled between the upper substrate 3 and the lower substrate 11.

The lower substrate 22 is also referred to as an array substrate, and the thin film transistor T, which is a switching element, is positioned in a matrix type, and includes a gate line 13 and a data line 15 passing through the plurality of thin film transistors. Is formed.

The general liquid crystal display device having the above-described structure is a method of driving the liquid crystal by an electric field applied up and down by applying a voltage to the common electrode of the upper substrate and the pixel electrode of the lower substrate, while having excellent characteristics such as transmittance and aperture ratio, The disadvantage is that the viewing angle is narrow.

Accordingly, in order to overcome this problem, a transverse field type liquid crystal display device in which the common electrode and the pixel electrode are formed on one substrate and the liquid crystal is driven by a horizontal electric field has been proposed.

FIG. 2 is a schematic plan view of an array substrate for a general transverse electric field type liquid crystal display device, and FIG. 3 is an enlarged view of one pixel area.

As shown in the drawing, in the display area AA displaying an image, a pixel area P is defined by crossing a horizontal gate line 43 and a vertical data line 46 and defining the pixel area P. The thin film transistor Tr, which is a switching element connected to the gate line 43 and the data line 46, is formed at the intersection of the gate line 43 and the data line 46.

In addition, the pixel region P has a common wiring 49 extending in the horizontal direction at regular intervals in parallel with the gate wiring 43, and a plurality of common electrodes branched from the common wiring 49. 53 extends in the longitudinal direction.

In addition, in the pixel region P, a plurality of pixel electrodes 62 having a vertical direction and arranged to be alternately arranged at a predetermined interval from the common electrode 53 are formed, and the pixel electrode 62 is a thin film transistor Tr. )

In the non-display area NA on the outside of the display area AA, a gate pad part GPA connected to the gate line 43 formed in the display area AA on one side and connected to an external driving circuit is provided. A data pad which is formed in the non-display area NA on the upper side of the display area AA and is connected to an external data driving circuit (not shown) and is connected to the data line 46 formed in the display area AA. A part DPA is formed.

In addition, the Vcom wiring 72 is connected to three side surfaces of the display area AA except for the data pad part DPA to apply a DC common voltage, and the Vcom wiring 72 has a respective gate. It is connected to the common wiring 49 formed in parallel with the wiring 43. In this case, the Vcom wiring 72 is applied with a DC common voltage from the outside through both ends positioned at both ends of the data pad part DPA, and the non-display area of one side of the substrate on which the gate pad part GPA is formed ( The Vcom wiring part located at NA) receives a DC common voltage from the outside in a plurality of areas of the gate pad part GPA. Applying a common voltage in various parts of the Vcom wiring 72 prevents the voltage applied to the pixel P formed near the Vcom wiring 72 from being different from the pixel P formed near the Vcom wiring 72 by the wiring self-resistance. For sake. That is, when the DC common voltage is applied through the Vcom wiring 72, a large number of input portions of the common voltage are formed to prevent the voltage from being changed in the cooling of the wiring.

However, as the liquid crystal display device becomes larger and larger, the length of the gate wiring increases, which makes it difficult to design a resistor.

That is, the gate wiring causes waveform distortion of the voltage applied by the resistor and the parasitic capacitance, and accordingly, the voltage applied to the liquid crystal, that is, the liquid crystal driving voltage Vp, varies. In the conventional Vcom wiring structure, the liquid crystal driving voltage There is a problem that it is difficult to compensate for the variation in Vp.

Variation of the driving voltage Vp applied to the liquid crystal causes flicker and afterimage of the screen, thereby causing deterioration in image quality.

Accordingly, in the present invention, the flicker is reduced by changing the Vcom wiring structure to reduce the variation of the liquid crystal driving voltage Vp applied to each pixel according to the change in the common voltage applied to the Vcom wiring in consideration of the gate wiring resistance, parasitic capacitance, and the like. The purpose of the present invention is to provide an excellent quality liquid crystal display device by preventing afterimage phenomenon.

An array substrate for a liquid crystal display device according to an embodiment of the present invention for achieving the above object is a substrate; An active region comprising a plurality of pixels defined on the substrate by crossing a horizontal gate line and a vertical data line; A thin film transistor configured for each pixel of the active region; A gate pad portion formed on a first side of the substrate outside the active region and connected to the gate wiring; A data pad part disposed on a second side surface or a third side surface that meets the first side surface and connected to the data line; A Vcom wiring configured on a fourth side surface of the substrate on which the gate pad portion and the data pad portion are not formed outside the active region, and one end of which is positioned at the data pad portion; A common line configured to be parallel to the gate line in the active region and electrically connected to the Vcom line; A plurality of common electrodes branched for each pixel from the common wiring; And a pixel electrode configured to alternately alternate with the plurality of common electrodes and electrically connected to the thin film transistor, wherein a common voltage applied through the Vcom wiring to the common wiring is directed from the fourth side to the first side. It is applied to the direction is characterized in that the direction opposite to the gate voltage direction applied in the direction of the fourth side from the first side through the gate pad portion of the first side.

In this case, the Vcom wiring is characterized in that the common voltage is applied to one end of the data pad portion.

In addition, the Vcom wiring disposed on the fourth side of the substrate may have the other end other than one end connected to the data pad portion further extended to either side of the second or third side where the data pad portion is not formed and positioned at the gate pad portion. In this case, the Vcom wiring has a common voltage applied to the other end extending to the gate pad portion, or the Vcom wiring has a common voltage at the other end extending to the gate pad portion and one end positioned at the data pad portion. It is characterized by being applied.

An array substrate for a liquid crystal display device according to another embodiment of the present invention is a substrate; An active region comprising a plurality of pixels defined on the substrate by crossing a horizontal gate line and a vertical data line; A thin film transistor configured for each pixel of the active region; A gate pad portion formed on a first side of the substrate outside the active region and connected to the gate line; A data pad part disposed on a second side surface or a third side surface that meets the first side surface and connected to the data line; A first Vcom wire configured to be connected to the data pad part at one end of the first side outside the active area; A second Vcom wiring configured at a fourth side of the substrate on which the gate pad portion and the data pad portion are not formed outside the active region, and one end of which is connected to the data pad portion; A common wiring disposed in the active region in parallel with the gate wiring and connected to the first and second Vcom wirings; A plurality of common electrodes branched for each pixel from the common wiring; And a pixel electrode interposed between the common electrodes and connected to the thin film transistor, wherein the common voltage applied to the first and second Vcom wirings varies in magnitude.

In this case, the first and second Vcom wirings are characterized in that a common voltage is applied to one end of each of the data pad portions.

A liquid crystal display according to an embodiment of the present invention includes a first substrate; An active region including a plurality of pixels defined on the first substrate by crossing a horizontal gate line and a vertical data line; A thin film transistor configured for each pixel of the active region; A gate pad portion formed on a first side of the substrate outside the active region and connected to the gate wiring; A data pad part disposed on a second side surface or a third side surface that meets the first side surface and connected to the data line; A Vcom wiring configured on a fourth side surface of the first substrate on which the gate pad portion and the data pad portion are not formed outside the active region, and one end of which is connected to the data pad portion; A common line configured to be parallel to the gate line in the active region and electrically connected to the Vcom line; A plurality of common electrodes branched for each pixel from the common wiring; A pixel electrode formed between the common electrode and connected to the thin film transistor; A second substrate facing the first substrate; And a liquid crystal layer interposed between the first and second substrates, wherein a common voltage applied through the Vcom wiring to the common wiring is applied in a direction from the fourth side toward the first side. The gate pad may be opposite to the gate voltage direction applied from the first side to the fourth side direction.

At this time, the Vcom wiring on the first substrate is characterized in that the common voltage is applied to one end of the data pad portion.

In addition, the Vcom wiring positioned on the fourth side of the first substrate may further extend to the side of any one of the second or third side where the other end other than one end connected to the data pad portion is not formed. In this case, the Vcom wiring is a common voltage is applied to the other end extending to the gate pad portion, or the Vcom wiring is common to the other end and the data pad portion located at the other end extending to the gate pad portion. It is characterized by the fact that a voltage is applied.

In another embodiment, a liquid crystal display device includes: a first substrate; An active region including a plurality of pixels defined on the first substrate by crossing a horizontal gate line and a vertical data line; A thin film transistor configured for each pixel of the active region; A gate pad portion formed on a first side of the first substrate outside the active region and connected to the gate wiring; A data pad part disposed on a second side surface or a third side surface that meets the first side surface and connected to the data line; A first Vcom wire configured to be connected to the data pad part at one end of the first side outside the active area; A second Vcom wiring line formed at a fourth side surface of the first substrate on which the gate pad portion and the data pad portion are not formed outside the active region, wherein one end thereof is connected to the data pad portion; A common wiring disposed in the active region in parallel with the gate wiring and connected to the first and second Vcom wirings; A plurality of common electrodes branched for each pixel from the common wiring; A pixel electrode formed between the common electrode and connected to the thin film transistor; A second substrate facing the first substrate; And a liquid crystal layer interposed between the first and second substrates.

In this case, the first and second Vcom wirings are characterized in that a common voltage is applied to one end of each of the data pad portions, and in this case, the common voltages respectively applied to the first and second Vcom wirings vary in magnitude. The common voltage applied to the second Vcom wiring has a value greater than the common voltage applied to the first Vcom wiring.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

First, a description will be given of the cause of flicker and afterimage in the liquid crystal display device.

In an array substrate, parasitic capacitance occurring at an overlapping portion of an electrode or wiring causes distortion of the signal and causes signal delay.

In one pixel, if the parasitic capacitor between gate and source is defined as Cgs, the parasitic capacitor between gate and drain is defined as Cgd and the parasitic capacitor between source and drain as Csd, the signal distortion is The change in voltage is caused by lowering the liquid crystal drive voltage through the parasitic capacitor between the gate and the source.

At this time, when the voltage change applied to the gate wiring is ΔVg and the parasitic capacitor of the liquid crystal is C _LC , the liquid crystal driving voltage is changed with reference to the equivalent circuit for one pixel in the liquid crystal display shown in FIG. 4 (ΔVp). When expressed as a formula is as follows.

At this time, the ΔVp lowers the driving voltage of the liquid crystal regardless of the polarity of the applied voltage, thereby generating flicker that causes the screen to flicker.

According to Equation (1), the variation of the liquid crystal driving voltage applied to each pixel is proportional to the parasitic capacitance between the gate and the source, and if the respective parasitic capacitances are constant, the variation is applied to the voltage variation applied to the gate wiring, that is, ΔVg.

In this case, the ΔVg becomes a voltage difference when the gate wiring is selected or unselected, and thus, when the voltage at selection is V _gh and the voltage at non-selection is V _gl , it can be seen that ΔV _g = V _gh −V _gl .

In general, the gate wiring has a slight difference depending on the characteristics of the wiring material at the beginning of the wiring and the end of the wiring to which voltage is applied due to the resistance of the wiring itself, but a voltage difference occurs. In particular, the thinner the wiring width and the longer the wiring, the greater the difference occurs in the applied voltage at the beginning and the end.

 FIG. 5 is a graph illustrating a flicker good region according to the position of the liquid crystal panel based on the measurement result of varying Vcom with a flicker pattern.

The flicker pattern refers to a dot inversion pattern in which voltages having different polarities are inverted and applied to pixels adjacent to each other at a period of 60 Hz. A flicker pattern is used to measure and change a common electrode by using the flicker pattern. The flicker good area accordingly was derived.

As shown in the figure, a flicker-good region has a higher Vcom voltage in a region where the gate pad portion is formed, i.e., a region near the portion where the signal is applied to the gate wiring, and farther from the region where the signal is applied. It can be seen that the flicker good region is formed in the right upward direction as a whole. The flicker good region is caused by a variation in the driving voltage of the liquid crystal, that is, ΔVp. For example, in the case of a 15-inch transverse electric field type liquid crystal display, the fluctuation of the flicker is about 0.2 V at the left end and the right end. At this time, the flicker is not only related to the Vcom wiring, but is represented by all the elements constituting the pixel such as the gate wiring, the data wiring and the switching element. In the present invention, the flicker is different from the conventional Vcom wiring structure. Since the purpose is to prevent the flicker phenomenon, a good flicker region is shown in the graph of the magnitude change of the DC common voltage applied to the Vcom wiring.

Since the conventional Vcom wiring structure and the DC common voltage are applied as shown in FIG. 3, the same Vcom DC voltage is applied at both ends of the Vcom wiring side of the gate pad portion and the Vcom wiring in the region where the data pad portion is formed. As shown in FIG. 5, the Vcom voltage input to the pixels in the entire row receiving the signal from the center is near the portion where the DC voltage is applied due to the resistance of the wiring itself, that is, the center portion at the left and right ends of the display area of the panel. It can be seen that the graph is formed in a shape in which the Vcom voltage decreases as the number decreases.

When the common electrode variation curve showing the variation of the common electrode in the common wiring connected to the wiring including the Vcom wiring in the graph is located in the flicker good region, flicker can be prevented. The common voltage fluctuation curve, which has a convex shape from the center to the bottom by the conventional Vcom wiring structure and the Vcom voltage application method, simultaneously shows flicker good areas at both ends of the panel and flicker good areas from the bottom to the right. It is impossible to position them within, so flicker occurs.

Therefore, the embodiment of the present invention proposes a structure in which the Vcom wiring structure is changed or the position of the portion to which the Vcom voltage is applied is changed to solve the conventional problem.

6 is a schematic plan view of an array substrate for a liquid crystal display according to a first embodiment of the present invention.

As shown, in the array substrate for a liquid crystal display according to the present invention, the Vcom wiring 172 is far from the gate pad portion GPA connected to the external circuit driver in the non-display area NA, that is, the gate pad ( The non-display area NA is formed near the display area AA where the end portions of the plurality of gate lines 143 connected to the 155 are positioned. In the illustrated drawing, the gate pad part GPA is formed in the non-display area NA on the left side of the substrate 140, and the Vcom wiring 172 is formed on the right side opposite to the area where the gate pad part GPA is formed. It is formed only in the non-display area NA and is characterized in that the input of the Vcom voltage is applied to one end of the Vcom wiring 172 located in the data pad part DPA.

In this case, the Vcom wiring 172 is connected to the common wiring 149 formed through the pixels P positioned in the same row in the display area AA, and finally, each pixel from the common wiring 149. A common voltage connected to the common electrodes 153 branched by (P) and applied to the Vcom wiring 172 is applied into the pixel P.

Here, the change of ΔVp, which is the rate of change of the voltage for driving the liquid crystal on the pixel P, will be described.

There are many factors that influence the variation rate ΔVp of the voltage for driving the liquid crystal, but among them, the influence due to the gate wiring is particularly important. Due to the resistance of the gate wiring itself, the correct gate signal voltage is applied to the pixel where the gate signal voltage is applied, i.e., the pixel located close to the gate pad portion, but the signal delay and voltage drop due to the wiring resistance occur at the pixel far from the gate pad portion. As a result of the initial waveform, the correct gate signal voltage is not applied, but a voltage lower than the initially applied voltage is applied. Reflecting this, the ΔVp of the pixel located far from the gate pad has a smaller value than the ΔVp of the pixel located near the gate pad. Experimentally, in the case of a 15.0 inch transverse field type liquid crystal display, the ΔVp of the pixel located far from the pixel located near the gate pad is formed to be about 0.2V smaller.

For example, when the data signal voltage is applied at 10V and 0V while the common voltage is applied at 5V, ΔVp, which is a change rate of the liquid crystal driving voltage, is reflected, and Vp, which is a driving voltage of the actual liquid crystal, is applied to the pixel located near the gate pad. The values of 10V and 0V are experimentally found to be 10.2V and 0.2V for pixels located far from the gate pad. (LCD driving voltage based on common electrodes of pixels connected by the same gate wiring) See FIG. 7a showing the change in Vp)

Accordingly, when the common electrode is used as a reference, the polarity is inverted so that a difference occurs in the voltage felt by the liquid crystal with respect to the input data signal voltage, thereby deepening the flicker. Furthermore, in the common wiring configuration and common electrode input according to the related art, the voltage drop occurs due to the resistance of the common voltage and the Vcom wiring itself toward the farther side from the gate pad, thereby deepening the flicker due to the voltage difference during inversion. (Refer to FIG. 7B showing a change in the liquid crystal driving voltage with respect to the common electrode of the pixels connected by the same gate wiring in the liquid crystal display device according to the conventional Vcom wiring structure.)

However, as shown in the first embodiment of the present invention illustrated in FIG. 6, the Vcom wiring 172 is far from the gate pad part GPA, that is, the non-display of one side of the substrate on which the gate pad part GPA is located. The Vcom voltage, that is, the common voltage, is formed in the non-display area NA on the other side corresponding to the area NA, and is applied to the Vcom wiring 149 from a driving circuit (not shown) connected through the data pad part DPA. The common electrode is input to the pixel P through the common wiring 149 connected to the Vcom wiring 172.

Therefore, in the liquid crystal panel having the Vcom wiring structure according to the first embodiment of the present invention, referring to FIG. 8, which illustrates a change in the liquid crystal driving voltage based on the common electrode of the pixels connected by the same gate wiring, The common voltage applied to the pixel far away from the Vcom wiring, that is, near the data pad portion, causes a voltage drop to occur naturally, so that when the polarity of Vp changes with respect to the voltage applied to the common electrode by the Vcom wiring, the common voltage is referred to. It is possible to prevent flicker by reducing the change in voltage magnitude.

In more detail, when the first embodiment of the present invention is applied to the above-described example, the Vcom wiring is formed on the other side of the array substrate of the liquid crystal panel which does not meet the gate pad portion, so that the When a common voltage is applied, a common voltage of 5.2 V is applied to a pixel located far from the gate pad portion, that is, near the Vcom wiring, and a voltage drop is generated by wiring resistance to a pixel near the pad portion to apply 5 V. do. Therefore, in the pixel near the gate pad part, the signal voltage applied from the data line is inverted at 10 V and 0 V based on the common voltage to display an image, and in the pixel near the Vcom line, the image voltage is centered on the common electrode of 5.2 V. By applying 10.2V and 0.2V, it is possible to prevent the flicker due to the inversion by correcting the magnitude change of the data signal voltage applied around the common electrode.

9A and 9B show a modification according to the first embodiment.

As shown, the non-display area NA of the other side of the array substrate 240 of the liquid crystal display device corresponding to one side of the gate pad portion GPA formed in the same manner as in the first embodiment is formed. And a non-display area (NA) on the lower side corresponding to the upper side where the data pad part (DPA) is formed in the region, wherein the Vcom wiring ( The driving circuit for inputting the common electrode to the contact points of the pad parts DPA and GPA through the data pad part DPA and the gate pad part GPA at both ends of the Vcom wiring 272 ( The second modification is characterized in that the common electrode is input through the gate pad part GPA in which one end of the Vcom wiring 372 is located.

Also in the liquid crystal display device according to the first and second modifications, the Vcom wiring in which the common wirings 249 and 349 in each pixel P are eventually formed on the other side corresponding to one side on which the gate pad portion GPA is formed. Since it is connected to the (272, 372) in the pixel (P) near the Vcom wiring (272, 372) has the size of the applied common electrode as it is, but is far from the Vcom wiring (272, 372), that is, the gate pad portion In the pixel P located near the GPA, a common voltage smaller than the common voltage applied due to the occurrence of the voltage drop due to the wiring resistance is applied, thereby having the same flicker reduction effect as in the first embodiment.

Second Embodiment

10 is a schematic plan view of an array substrate for a liquid crystal display according to a second embodiment of the present invention.

As illustrated, first and second Vcom wirings 472a and 472b are formed on one side of the non-display area NA of the liquid crystal display device where the gate pad part GPA is formed and on the other side of the non-display area NA, respectively. The 1, 2 Vcom wirings 472a and 472b are common from a data pad part DPA at which one end of each wire is located, more precisely from a driving circuit (not shown) connected to the data pad part DPA. It is characterized in that the electrode is applied. In this case, the common electrodes applied to the first and second Vcom wirings 472a and 472b have different sizes, and the common electrodes applied to the first Vcom wiring 472a formed in the region where the data pad part DPA is located. The size is smaller than the size of the common electrode applied to the second Vcom wiring 472b formed on the other side. The difference in voltage size may vary depending on the size of the liquid crystal display, but is preferably 0.5V or less. More precisely, the difference in voltage magnitude may be a difference between voltages at both ends of the gate line 443 included in the liquid crystal display, that is, a gate voltage applied through the gate pad 455 and the applied gate voltage may correspond to the gate line ( 443) It is preferable that the magnitude of the voltage is reduced by the resistance of itself and is equal to the difference between the final gate voltage when the end of the gate wiring 443 is reached.

In the second embodiment of the present invention, the Vcom wirings 472a and 472b having different magnitudes of common voltages are formed on one side and the other side of the liquid crystal display where the gate pad unit GPA is located, respectively. The common wiring 449 in the pixel P connected to the 472a and 472b has an increasingly larger common voltage as the distance from the gate pad portion GPA results in the same effect as the first embodiment. .

Since flicker is prevented by having the common wiring in the pixel become larger and larger from the gate pad portion, the flicker is prevented from the second embodiment.

 In the liquid crystal display having the Vcom wiring structure according to the present invention, the Vcom wiring is formed on the side where the gate pad portion is located, and the problem of flicker generation that is further exacerbated by applying the common electrode through the gate pad portion is that the gate gate Vcom wiring is gated. A common electrode is applied to the other side of the panel on which the pad is not formed, or the lower side of the panel where the data pad is further extended from the other side and through the end of the Vcom wiring located at the data pad portion or the gate pad portion. By suggesting the structure of the present invention, the flicker phenomenon can be improved by matching the flicker stable region on the screen with the curve showing the internal change due to the wiring self resistance of the common voltage applied through the Vcom wiring.

Accordingly, it is possible to provide a liquid crystal display device having improved screen quality.

Claims (16)

A substrate; An active region comprising a plurality of pixels defined on the substrate by crossing a horizontal gate line and a vertical data line; A thin film transistor configured for each pixel of the active region; A gate pad portion formed on a first side of the substrate outside the active region and connected to the gate wiring; A data pad part disposed on a second side surface or a third side surface that meets the first side surface and connected to the data line; A Vcom wiring configured on a fourth side surface of the substrate on which the gate pad portion and the data pad portion are not formed outside the active region, and one end of which is positioned at the data pad portion; A common line configured to be parallel to the gate line in the active region and electrically connected to the Vcom line; A plurality of common electrodes branched for each pixel from the common wiring; A pixel electrode configured to alternate with the plurality of common electrodes and electrically connected to the thin film transistor; And a common voltage applied through the Vcom wiring to the common wiring in a direction from the fourth side toward the first side, from the first side to the fourth side through the gate pad part of the first side. And a gate voltage direction applied in a direction opposite to the gate voltage direction. The method of claim 1, And the Vcom wiring is a common voltage applied to one end of the data pad unit. The method of claim 1, The Vcom wiring positioned on the fourth side of the substrate may be positioned at the gate pad portion because the other end of the substrate other than the one end connected to the data pad portion extends further to either side of the second or third side on which the data pad portion is not formed. Array substrate for a liquid crystal display device characterized in that configured to. The method of claim 3, wherein And wherein the Vcom wiring is applied with a common voltage to the other end of the gate pad portion. The method of claim 3, wherein And the Vcom wiring is simultaneously applied with a common voltage to the other end extending from the gate pad part and the one end positioned in the data pad part. A substrate; An active region comprising a plurality of pixels defined on the substrate by crossing a horizontal gate line and a vertical data line; A thin film transistor configured for each pixel of the active region; A gate pad portion formed on a first side of the substrate outside the active region and connected to the gate line; A data pad part disposed on a second side surface or a third side surface that meets the first side surface and connected to the data line; A first Vcom wire configured to be connected to the data pad part at one end of the first side outside the active area; A second Vcom wiring configured at a fourth side of the substrate on which the gate pad portion and the data pad portion are not formed outside the active region, and one end of which is connected to the data pad portion; A common wiring disposed in the active region in parallel with the gate wiring and connected to the first and second Vcom wirings; A plurality of common electrodes branched for each pixel from the common wiring; A pixel electrode formed between the common electrode and connected to the thin film transistor And an array of common voltages applied to the first and second Vcom lines. The method of claim 6, And each of the first and second Vcom wires is provided with a common voltage at one end of each of the data pad parts. A first substrate; An active region including a plurality of pixels defined on the first substrate by crossing a horizontal gate line and a vertical data line; A thin film transistor configured for each pixel of the active region; A gate pad portion formed on a first side of the substrate outside the active region and connected to the gate wiring; A data pad part disposed on a second side surface or a third side surface that meets the first side surface and connected to the data line; A Vcom wiring configured on a fourth side surface of the first substrate on which the gate pad portion and the data pad portion are not formed outside the active region, and one end of which is connected to the data pad portion; A common line configured to be parallel to the gate line in the active region and electrically connected to the Vcom line; A plurality of common electrodes branched for each pixel from the common wiring; A pixel electrode formed between the common electrode and connected to the thin film transistor; A second substrate facing the first substrate; Liquid crystal layer interposed between the first and second substrates And a common voltage applied through the Vcom wiring to the common wiring in a direction from the fourth side toward the first side, from the first side to the fourth side through the gate pad part of the first side. And a gate voltage direction applied in a direction opposite to each other. The method of claim 8, And a common voltage applied to one end of the Vcom wiring on the first substrate. The method of claim 8, The Vcom wiring disposed on the fourth side of the first substrate may be positioned such that the other end of the first substrate other than the one end connected to the data pad portion extends further to either side of the second or third side on which the data pad portion is not formed. Liquid crystal display device characterized in that the configuration. The method of claim 10, The Vcom line is a liquid crystal display characterized in that the common voltage is applied to the other end extending to the gate pad portion. The method of claim 10, The Vcom wiring is characterized in that a common voltage is simultaneously applied to the other end extending from the gate pad portion and the one end positioned in the data pad portion. A first substrate; An active region including a plurality of pixels defined on the first substrate by crossing a horizontal gate line and a vertical data line; A thin film transistor configured for each pixel of the active region; A gate pad portion formed on a first side of the first substrate outside the active region and connected to the gate wiring; A data pad part disposed on a second side surface or a third side surface that meets the first side surface and connected to the data line; A first Vcom wiring configured to be disposed at the first side of the active region outside the active region, and one end of which is positioned at the data pad portion; A second Vcom wiring configured at a fourth side surface of the first substrate on which the gate pad portion and the data pad portion are not formed outside the active region, wherein one end thereof is positioned at the data pad portion; A common wiring configured to be parallel to the gate wiring in the active region and electrically connected to the first and second Vcom wirings and both ends thereof; A plurality of common electrodes branched for each pixel from the common wiring; A pixel electrode configured to be alternately alternate with the plurality of common electrodes and electrically connected to the thin film transistor; A second substrate facing the first substrate; Liquid crystal layer interposed between the first and second substrates And a common voltage applied to the first and second Vcom wires having different magnitudes. The method of claim 13, And the common voltage is applied to the first and second Vcom wires, respectively, at one end of the data pad unit. delete The method of claim 14, And a common voltage applied to the second Vcom wiring is greater than a common voltage applied to the first Vcom wiring.

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