KR100611385B1 - Semiconductor device including fuse which is broken down by junction leakage and method of forming the same - Google Patents

Abstract

Disclosed are a semiconductor device having a fuse that is insulated and destroyed by junction leakage, and a method of manufacturing the same. The semiconductor device of the present invention includes a gate electrode on a silicon substrate having a first conductive well, a first impurity region in which a second conductive impurity is injected at a low concentration into a first region of a substrate exposed between the gate electrode, and a substrate. The first impurity region is contacted through a contact hole of a transistor having a second impurity region in which a second conductive type impurity is injected into another second region at a high concentration, and an interlayer insulating film formed on the front surface of the substrate having the transistor. Sequentially stacked to contact the second impurity region through a spacer wall made of a metal electrode including a barrier metal film that reacts with silicon in the junction portion of the region to cause a large leakage current, and an inner wall of the other contact hole of the interlayer insulating film. A fuse including an insulator thin film and a conductive film is provided. Accordingly, the semiconductor device of the present invention is generated at the other contact electrode flowing through the channel of the transistor even by a low potential applied to the transistor between the conductive film used as the electrode of the fuse and the impurity region used as another electrode. The insulation is broken and programmed by the leakage current.

Description

Semiconductor device including fuse which is broken down by junction leakage and method of forming the same}             

1 is a vertical cross-sectional view showing the structure of a semiconductor device having a fuse that is insulated and destroyed by junction leakage in accordance with the present invention.

2A and 2B are vertical cross-sectional views and plan views for explaining a transistor manufacturing process in a method of manufacturing a semiconductor device having a fuse that is insulated and destroyed by junction leakage according to the present invention, respectively;

3A and 3B are a vertical sectional view and a plan view for explaining a manufacturing process of forming an insulator thin film and a conductive film in contact with a high concentration impurity region of a transistor to form a fuse in the method of manufacturing a semiconductor device according to the present invention, respectively;

4A and 4B are vertical cross-sectional views and plan views showing that the insulator thin film and the conductive film are patterned by a photographic process in the method of manufacturing a semiconductor device according to the present invention, respectively.

5A and 5B are a vertical sectional view and a plan view, respectively, for explaining a manufacturing process of a metal electrode in contact with another low concentration impurity region of a transistor in the method of manufacturing a semiconductor device according to the present invention;

* Description of the symbols for the main parts of the drawings *

10 silicon substrate 12 gate oxide film

14 gate electrode 16, 24 spacer wall

18, 19: low concentration impurity region 20: high concentration impurity region

22: first interlayer insulating film 26: insulator thin film

28 conductive film 30 photoresist pattern

32: upper pattern of the fuse 34: second interlayer insulating film

36: barrier metal film 38: metal

40, 44: contact electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device including a fuse and a method for manufacturing the same, and more particularly, to a semiconductor device having a fuse that is insulated and destroyed by junction leakage generated in an internal device and a method for manufacturing the same.

In the semiconductor memory device, redundancy cells of memory are installed for each sub-array block. For example, redundant rows and columns are pre-installed for each 256K cell array. Replace with extra memory redundancy cells. This repair circuit performs programming in the internal circuit that selects the defective memory cell through the test and replaces it with the address signal of the corresponding redundancy cell when the wafer fabrication process is completed. Accordingly, the address corresponding to the defective line is actually input in actual use. The selection changes to a line of redundancy cells.

Such programming methods include an electric fuse method of melting and cutting a fuse by overcurrent, and a method of burning a fuse with a laser beam. Among these methods, a method of cutting a fuse using a laser is simple, reliable, and easy to lay out. It is used.

However, the laser programming method requires a repair process using expensive laser equipment to replace a separate defective cell with a redundancy cell, and in order to cut the fuse by performing an additional fuse window process during the manufacturing process. The repair process is complicated and cumbersome because the passivation process is performed after programming by irradiating the laser to the part.

An object of the present invention is to breakdown an insulator thin film in contact with another impurity region by using a leakage current generated by the barrier metal film between the metal electrode and the impurity region at turn-on of the transistor. Accordingly, the present invention provides a semiconductor device having a fuse in which a conductive film on an insulator thin film and a substrate are conducted to act as a fuse, and a repair or programming method of the semiconductor device is insulated and destroyed at a simple junction leakage even at the wafer and package levels. .

In order to achieve the above object, the present invention provides a semiconductor device including a fuse that is electrically insulated and destroyed, wherein a gate electrode made of a conductive polysilicon on a silicon substrate having a first conductive well is disposed between the gate electrode and the gate electrode. A transistor having a first impurity region in which a second conductivity type impurity is injected into the first region of the exposed substrate at a low concentration, and a second impurity region in which a second conductivity type impurity is highly injected into the other second region of the substrate; A metal electrode including a barrier metal film contacting the first impurity region through a contact hole of an interlayer insulating film formed on the front surface of the substrate having a transistor, and including a barrier metal film reacting with silicon to a junction portion of the interlayer insulating film and the impurity region to increase leakage current; A cone is formed in the second impurity region through a spacer wall made of an insulating film on the inner sidewall of the other contact hole of the insulating film. A fuse including an insulator thin film and a conductive film which are sequentially stacked as follows, wherein the insulator thin film is destroyed by the leakage current generated between the metal electrode and the first impurity region when the transistor is turned on, so that the upper conductive film and the second impurity region are conducted. Characterized in having a.

In the present invention, it is preferable that the junction area between the metal electrode and the first impurity region is larger than between the insulator thin film and the second impurity region of the fuse. In addition, the barrier metal film uses any one material selected from Ti and TiN to sequentially, and the conductive film constituting the fuse is made of polysilicon, and the insulator thin film is selected from an oxide film, a nitride film, a natural oxide film, and a thermal oxide film. It is preferable to use either.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

1 is a vertical cross-sectional view showing the structure of a semiconductor device having a fuse that is insulated and destroyed by junction leakage in accordance with the present invention.

The semiconductor device having the fuse of the present invention includes a transistor 10 which is turned on by programming and a metal electrode 42 which is connected to any junction region of the transistor 10 to generate a leakage current when the transistor 10 is turned on. And an insulator thin film 26 'and a conductive film 28' so as to be connected to another junction region of the transistor 10, and are insulated thin film 26 'by a leakage current induced between the metal electrode 42 and the substrate. ) Is a dielectric breakdown, and includes a fuse 32 which conducts the conductive film 28 ', the substrate, and the impurity region 20 thereunder.

Referring to FIG. 1, the transistor includes a gate electrode 14 made of a conductive polysilicon on a silicon substrate 2 having a first conductivity type, p-type well, and a substrate exposed between the gate electrode 14. The first impurity region 18 in which the second conductive type and n-type impurities are injected at low concentration in one region and the second impurity region 20 in which the second conductive type and n-type impurity is injected at high concentration in the other region Have In this case, a gate oxide layer 12 is formed below the gate electrode 14, and a spacer wall 16 is formed on a sidewall thereof. The second impurity region 20 may have an LDD structure 19 in which n-type impurities are implanted at a low concentration into a substrate near the edge of the gate electrode 14.

Therefore, in the semiconductor device having the fuse 32 insulated and destroyed by junction leakage according to the present invention, when the transistor 10 is turned on, the thin insulator film 26 'in the B region is easily insulated and destroyed even at a low potential. As a result, the conductive film 28 ′ and the n + impurity region 20 are connected to each other so that a potential applied to the conductive film 28 ′ is transferred to the substrate 2.

The programming of the fuse of the present invention utilizes the junction leakage current Il of the metal electrode 42 which occurs when the transistor 10 is turned on. That is, the leakage current Il generated at the contact surface of the metal electrode 42 is the barrier metal film 36 between the metal 38 and the substrate 2 when the contact area of the metal electrode 42 is very large. Phosphorus Ti has a larger silicon reaction than a metal contact of small size, and forms TiSi ₂ at the interface, resulting in large silicon loss and shallow junction depth, resulting in more leakage current. Moreover, the thicker the barrier metal film 36, the greater the effect of junction leakage of the metal contacts.

Therefore, according to the present invention, the insulator thin film 26 'of the fuse is insulated and destroyed by the leakage current Il generated between the metal electrode 42 and the first impurity region 18 when the transistor 10 is turned on. The conductive film 28 'and the second impurity region 20 are conductive.

Meanwhile, a manufacturing process of a semiconductor device according to the present invention will be described with reference to the drawings below.

2A and 2B are vertical cross-sectional views and plan views illustrating a manufacturing process of a transistor in a method of manufacturing a semiconductor device having a fuse that is insulated and destroyed by junction leakage according to the present invention, respectively.

Referring to this, the present invention firstly forms a thin gate oxide film 2 on the silicon substrate 2 having the first conductivity type, p-type well, and deposits a conductive polysilicon thereon to pattern them. The gate electrode 14 is formed. The LDD is also formed in the second region B while forming the first impurity region 18 in which the second conductive type and n-type impurities are injected in low concentration in the first region A of the substrate exposed between the gate electrodes 14. The area 19 is formed. Next, the second impurity region 20 is formed by selectively implanting n-type impurities in a high concentration only in the second region B to complete the transistor 10.

3A and 3B are vertical cross-sectional views and plan views for explaining a manufacturing process of forming an insulator thin film and a conductive film in contact with a high concentration impurity region of a transistor to form a fuse in the method of manufacturing a semiconductor device according to the present invention, respectively.

Referring to this, in another manufacturing process of the present invention, the first interlayer insulating film 22 is formed on the entire surface of the substrate 2 on which the transistor 10 is formed, and the second impurity region B is opened in the interlayer insulating film 22. A contact hole (not shown) is formed. After the silicon nitride film is deposited on the interlayer insulating film 22, the silicon nitride film is etched by an etch back to dry etching process to form a spacer wall 24 on the inner wall of the contact hole. Next, polysilicon is sequentially deposited as the insulator thin film 26 as the insulator thin film 26 and the conductive film 28 on the entire surface of the substrate 2 on which the spacer wall 24 is formed to fill the contact holes. Then, a photoresist pattern 30 is formed on the conductive layer 28 to define an upper pattern of the fuse.

The insulator thin film 26 may be any one of a silicon nitride film, a natural oxide film, and a thermal oxide film instead of the silicon oxide film.

Meanwhile, reference numeral 40 in FIG. 3B represents a contact electrode of a fuse to be formed later.

4A and 4B are vertical cross-sectional views and plan views showing that the insulator thin film and the conductive film are patterned by a photographic process in the method of manufacturing a semiconductor device according to the present invention, respectively.

Referring to this, the next process of the present invention performs an etching process to pattern the conductive layer 28 and the insulator thin film 26 so as to be aligned with the photoresist pattern 30 to form the upper pattern 32 of the fuse. . Then, the photoresist pattern 30 is removed.

5A and 5B are vertical cross-sectional views and plan views respectively for explaining a manufacturing process of a metal electrode in contact with another low concentration impurity region of a transistor in the method of manufacturing a semiconductor device according to the present invention.

Referring to this, the next process of the present invention forms the second interlayer insulating film 34 on the resultant structure having the structure of FIG. 4A and the first impurity region 18 in the first and second interlayer insulating films 22 and 34. This contact hole is formed. The barrier metal film 36 is deposited on the second interlayer insulating film 34 having the contact hole. In this case, the barrier metal film 36 uses any one material selected from Ti and TiN, and sequentially both materials.

Then, W is buried as a metal 38 in the contact hole of the interlayer insulating film 34 on which the barrier metal film 36 is formed, and the metal 38 and the barrier metal film 36 are formed by performing a photo and etching process. It is etched to be aligned to form the metal electrode 42.

In addition, reference numeral 44 in FIG. 5B denotes a contact electrode of the metal electrode.

In the manufacturing process of the semiconductor device according to the present invention, the junction area between the metal electrode 42 and the first impurity region 18 is larger than that between the insulator thin film 26 ′ and the second impurity region 20 of the fuse 32. When formed, the amount of leakage current generated in the A region (junction of the metal contact) increases.

As described above, the semiconductor device according to the present invention is characterized in that the insulator thin film between the polysilicon used as the electrode of the fuse and the impurity region used as another electrode flows through the channel of the transistor by an external potential applied to the transistor. It is cut off by the leakage current generated by the contact electrode.

As a result, the present invention not only enables programming of fuses at low voltages without using expensive laser equipment, but also enables easy electrical repair or programming at the wafer and package level.

Claims (6)

In the configuration of a semiconductor device comprising a fuse that is electrically insulated and destroyed, A gate electrode made of conductive polysilicon on a silicon substrate having a first conductive well, a first impurity region in which a second conductive impurity is injected at a low concentration into a first region of a substrate exposed between the gate electrode, and a substrate A transistor having a second impurity region in which a second conductive type impurity is implanted in a high concentration into another second region of the film; The first impurity region is contacted through the contact hole of the interlayer insulating film formed on the front surface of the substrate having the transistor, and is selected from or sequentially selected from Ti and TiN, which reacts with silicon to the junction of the interlayer insulating film and the impurity region to cause a leakage current. A metal electrode including a barrier metal film formed using both materials; And An insulating film selected from an oxide film, a nitride film, a natural oxide film, and a thermal oxide film sequentially stacked to contact the second impurity region through a spacer wall made of an insulating film on an inner wall of another contact hole of the interlayer insulating film. So And a fuse in which the insulator thin film is destroyed by the leakage current generated between the metal electrode and the first impurity region when the transistor is turned on, so that the upper conductive film and the second impurity region are conductive. A semiconductor device having a fuse that is destroyed. 2. The semiconductor device of claim 1, wherein a junction area between the metal electrode and the first impurity region is larger than that between the insulator thin film and the second impurity region of the fuse. delete delete In the method of manufacturing a semiconductor device comprising a fuse that is electrically insulated and destroyed, A gate electrode made of conductive polysilicon on a silicon substrate having a first conductive well, a first impurity region in which a second conductive impurity is injected at a low concentration into a first region of a substrate exposed between the gate electrode, and a substrate Forming a transistor having a second impurity region in which a second conductivity type impurity is implanted in another second region of the film; Forming a first interlayer insulating film on an entire surface of the substrate having the transistor, and forming a contact hole in which the second impurity region is opened; Forming a spacer wall on an inner wall of the contact hole; Depositing an insulator thin film and a conductive film on the entire surface of the substrate on which the spacer wall is formed to fill the contact hole, and then etching the conductive film and the insulator thin film so as to form an upper pattern of a fuse; Forming a second interlayer insulating film on the resultant, and forming contact holes in the first and second interlayer insulating films to open first impurity regions; And And depositing a barrier metal film in the contact hole in which the first impurity region is opened, and filling the inside of the contact hole, and then etching the metal and the barrier metal film in alignment to form a metal electrode. A method of manufacturing a semiconductor device having a fuse that is destroyed by leakage. The method of claim 5, wherein in the forming of the transistor, impurities are injected at low concentration into all exposed substrates between the gate electrodes when the first impurity region is formed, and the substrate is formed near the edge of the gate electrode when the second impurity region is formed. A method of manufacturing a semiconductor device having a fuse that is insulated and destroyed by junction leakage, wherein impurities are injected at low concentration.

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