KR100603300B1 - Plasma display panel - Google Patents

Abstract

The present invention discloses a plasma display panel. According to the invention, the rear substrate; Address electrodes disposed on the rear substrate at predetermined intervals; A back dielectric layer filling the address electrode; Barrier ribs formed on the rear dielectric layer to partition discharge spaces; A phosphor layer formed in the discharge space; A front substrate disposed opposite the rear substrate to face the rear substrate; A sustain electrode arranged inside the front substrate in a direction intersecting with the address electrode and disposed to have a mutual discharge gap in the discharge space; A front dielectric layer filling the sustain electrode; A bus electrode arranged on the outer side of the front substrate in a direction parallel to the sustain electrode and connected to the sustain electrode by at least one connecting portion; And a black stripe formed on the upper surface of the bus electrode.

Description

Plasma display panel {Plasma display panel}

1 is a side cross-sectional view of a conventional plasma display panel.

2 is a perspective view of a plasma display panel according to an embodiment of the present invention;

3 is an exploded perspective view of the plasma display panel of FIG. 2;

4 is a side cross-sectional view of the plasma display panel of FIG.

<Brief description of the major symbols in the drawings>

111.Rear substrate 112.Address electrode

113. Backside dielectric layer 114. Bulkhead

Discharge space 116 phosphor layer

121. Front substrate 122. Holding electrode

123. Front dielectric layer 125 Bus electrode

131. Connections 132. Beer holes

141..Black stripe 142..Protective member

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel having an improved connection structure between a sustain electrode and a bus electrode.

In general, a plasma display panel applies a predetermined voltage to an electrode while a gas is charged between two electrodes installed in an enclosed space so that a glow discharge occurs and the ultraviolet rays generated during the glow discharge are generated. As a result, the phosphor layer formed in a predetermined pattern is excited to form an image.

The plasma display panel is classified into a direct current type, an alternating current type, and a mixed type according to a driving method. And, depending on the electrode structure, it is divided into having at least two electrodes required for discharge and having three electrodes. In the case of the direct current type, an auxiliary anode is added to induce the auxiliary discharge. In the case of the alternating current type, an address electrode is introduced to separate the selective discharge and the sustain discharge to improve the address speed.

In addition, the AC type may be classified into a counter electrode and a surface discharge electrode structure according to the arrangement of the electrodes for discharging. In the case of the counter electrode structure, the two sustain electrodes forming the discharge are respectively the front substrate and the back substrate. The surface discharge type electrode structure is a structure in which the discharge is formed on one plane of the substrate because two sustain electrodes forming the discharge are positioned on the same substrate.

1 illustrates an example of a conventional plasma display panel.

Referring to the drawing, a rear substrate 11 is positioned below the plasma display panel 10, and address electrodes 12 having a predetermined width and height are formed on the rear substrate 11. The address electrodes 12 are embedded by the back dielectric layer 13. In addition, a partition 14 is formed on the rear dielectric layer 13 to partition the discharge space 15 and prevent cross-talk between adjacent discharge spaces 15. Discharge gas is filled in the discharge space 15, and a phosphor layer 16 is formed as one of red, green, and blue phosphors in each discharge space 15 to implement a color.

In addition, the front substrate 21 is positioned to face the rear substrate 11, and the storage electrode 22 having a predetermined width and height is formed on the bottom surface of the front substrate 21. A bus electrode 23 for applying a voltage is formed on the bottom surface of the sustain electrode 22. The sustain electrode 22 and the bus electrode 23 are embedded by the front dielectric layer 24, and a protective layer 25 is formed on the bottom surface of the front dielectric layer 24.

Meanwhile, the bus electrode 23 is to compensate for the voltage increase of the sustain electrode 22, and as illustrated, the black electrode layer 23a and the white electrode layer 23b may be stacked.

The black electrode layer 23a is disposed close to the front substrate 21 side to absorb external light to improve contrast of the plasma display panel 10, and the white electrode layer 23b is emitted from the inside of the plasma display panel 10. The luminance of the plasma display panel 10 is improved by reflecting light to be emitted to the outside. Here, a material having high conductivity is used as the white electrode layer 23b, and a material such as Ru or Co is added to the black electrode layer 23a to produce a black color.

However, since the materials such as Ru and Co added to the black electrode layer 23a have a high resistance value, the contact resistance with the sustain electrode 22 becomes large. As a result, the reactive power consumption increases, and there is a difficulty in maintaining luminance uniformity due to a luminance step.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, by arranging a bus electrode made of a white electrode layer on an upper side of a front substrate, and connecting the bus electrode and a sustain electrode to ensure uniformity in luminance and reducing reactive power consumption. It is an object of the present invention to provide a plasma display panel that can be reduced.

Plasma display panel according to the present invention for achieving the above object,

A back substrate;

Address electrodes disposed on the rear substrate at predetermined intervals;

A back dielectric layer filling the address electrode;

Barrier ribs formed on the rear dielectric layer to partition discharge spaces;

A phosphor layer formed in the discharge space;

A front substrate disposed on the rear substrate so as to face the rear substrate;

A sustain electrode arranged inside the front substrate in a direction crossing the address electrode and disposed to have a mutual discharge gap in the discharge space;

A front dielectric layer filling the sustain electrode;

A bus electrode disposed outside the front substrate in a direction parallel to the sustain electrode and connected to the sustain electrode by at least one connection part;

And a black stripe formed on the upper surface of the bus electrode.

Preferably, the connection portion is formed in a via hole of the front substrate, and one end is connected to the bus electrode and the other end is connected to the sustain electrode, respectively.

The connection part is formed at the same time when forming the bus electrode, it is preferably made of the same material as the bus electrode.

Preferably, the bus electrode is made of only a white electrode layer.

The bus electrodes may be formed in groups of two, and a black stripe may be further formed in a non-discharge area between the one group and another adjacent group.

The black stripe is preferably made of a non-conductive material.

Preferably, a protective member surrounding the bus electrode and the black stripe is further provided on the front substrate.

The bus electrode is preferably formed of any one selected from a sputtering method, an electroless plating method, and a printing method.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a perspective view of a plasma display panel according to an embodiment of the present invention, and FIG. 3 is an exploded perspective view illustrating a process in which a bus electrode and a sustain electrode are connected to the front substrate of FIG. 2. have. 4 is a side cross-sectional view of the plasma display panel of FIG. 2.

The illustrated plasma display panel 100 basically includes a rear substrate 111 and a front substrate 121 formed of glass or a transparent material disposed opposite to the rear substrate 111.

The address electrodes 112 are formed in a strip shape on the top surface of the rear substrate 111, and are arranged in a stripe form spaced apart at predetermined intervals. The address electrodes 112 formed as described above are buried by the back dielectric layer 113.

In addition, a partition wall 114 is formed on an upper surface of the rear dielectric layer 113 to partition discharge spaces 115 between the rear substrate 111 and the front substrate 121.

In more detail, the barrier ribs 114 have a predetermined height and width, and are formed in parallel with the address electrodes 112. In addition, one address electrode 112 is disposed between the two partition walls 114. Meanwhile, the barrier ribs are not limited to those shown in the drawing, and may be any structure that can partition the discharge spaces into an array pattern of pixels.

Phosphor layers 116 are formed in the discharge spaces 115 partitioned by the partition walls 114, respectively. The phosphor layer 116 formed as described above covers the inner surface of the partition wall 114 and the upper surface of the rear dielectric layer 113.

The phosphor layer 116 uses red, green, and blue phosphors for color implementation, and may be divided into a red phosphor layer, a green phosphor layer, and a blue phosphor layer according to the color of the phosphor. The red, green, and blue phosphor layers are disposed adjacent to each other to form a pair of three colors.

Meanwhile, the front substrate 121 is disposed above the rear substrate 111 so as to face the substrate 121, and the storage electrodes 122 are formed under the front substrate 121.

The sustain electrode 122 is formed on a lower surface of the front substrate 121 using a transparent conductive material, for example, an ITO electrode. The sustain electrodes 122 include common electrodes 122a and scan electrodes 122b. The common electrode 122a and the scan electrode 122b form a pair, and they are alternately arranged.

In addition, the common electrode 122a and the scan electrode 122b are disposed to have a predetermined discharge gap by being introduced into the discharge space 115 to face each other. On the other hand, the sustain electrode is not limited thereto and may be formed in various shapes, for example, may be formed in a strip shape.

The storage electrodes 122 are buried in the lower surface of the front substrate 121 by the front dielectric layer 123. A protective layer 124, for example, a magnesium oxide (MgO) film is further formed on the bottom surface of the front dielectric layer 123.

Meanwhile, according to one feature of the present invention, as illustrated in FIG. 2, the bus electrodes 125 are formed in a stripe shape on the outer surface of the front substrate 121.

The bus electrode 125 has a strip shape having a width smaller than that of the sustain electrode 122, and is formed in a direction parallel to the sustain electrode 122. In addition, the bus electrode 125 may be disposed to correspond to one edge of the sustain electrode 122 so that the bus electrode 125 may be connected corresponding to each sustain electrode 122.

More specifically. In the common electrode 122a and the scan electrode 122b which are arranged in a single discharge space 115 in a pair, it is preferable that the bus electrodes 125 are disposed on opposite edges that do not form their discharge gaps, respectively. Do.

Meanwhile, the bus electrode 125 may be formed of only a white electrode layer made of a conductive material having high conductivity and low contact resistance. The white electrode layer of the bus electrode 125 may be formed by any one method selected from a sputtering method, an electroless plating method, and a printing method of printing with a conductive material in a paste state.

As described above, the bus electrode 125 disposed to correspond to one edge of the sustain electrode 122 is connected to the sustain electrode 122 by at least one connection part 131, respectively.

As shown in detail in FIG. 3, the connection part 131 has a structure formed through the front substrate 121, and the structure has via holes 132 passing through the front substrate 121 at predetermined intervals. The material forming the connection part 131 may be formed in the via holes 132.

As described above, the connection part 131 formed through the front substrate 121 is connected to the bus electrode 125 at one end and the sustain electrode 122 at the other end thereof, so that the bus electrode 125 is connected to each other. And the sustain electrode 122 are connected.

Meanwhile, the connection part 131 may be made of the same conductive material as that of the bus electrode 125, that is, a material having high conductivity and low contact resistance. In addition, the connection part 131 may be formed at the same time as the bus electrode 125 to be integral with the bus electrode 125.

As described above, the resistance value is connected between the sustain electrode 122 and the bus electrode 125 having high conductivity and low contact resistance by the connecting portion 131 made of the same material as the bus electrode 125. The high black electrode layer and the sustain electrode are connected to each other, whereby the contact resistance is increased to solve the conventional problem of generating a luminance step, thereby ensuring luminance uniformity. In addition, the reactive power consumption can be reduced.

In addition, a black stripe 141 is further stacked on the upper surface of the bus electrode 125, and the black stripe 141 absorbs external light incident to the front substrate 121 to improve contrast. Here, the black stripe 141 is preferably made of a non-conductive material.

On the other hand, the bus electrodes 125 are arranged in a pair of two in the discharge space 115, the black stripe 141 of the non-conductive material may be further formed in the non-discharge area between the adjacent groups. . Like the black stripe 141 formed on the upper surface of the bus electrode 125, the black stripe 141 absorbs external light incident to the front substrate 121 to improve contrast.

In addition, a protection member 142 such as a film surrounding the bus electrode 125 and the black stripe 141 may be further provided on the front substrate 121.

As described above, in the plasma display panel according to the present invention, a bus electrode made of a white electrode layer is disposed on the upper side of the front substrate, and the bus electrode and the sustain electrode are connected to each other, thereby preventing the occurrence of the luminance step so that the luminance is uniform. Can be maintained, and the reactive power consumption can be reduced.

In addition, by forming a non-conductive black stripe on the upper surface of the white electrode layer and increasing blackening, an effect of reducing external light reflection luminance can be obtained.

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Could be. Accordingly, the true scope of protection of the invention should be defined only by the appended claims.

Claims (11)

A back substrate; Address electrodes disposed on the rear substrate at predetermined intervals; A back dielectric layer filling the address electrode; Barrier ribs formed on the rear dielectric layer to partition discharge spaces; A phosphor layer formed in the discharge space; A front substrate disposed on the rear substrate so as to face the rear substrate; A sustain electrode arranged on the discharge space side from the front substrate in a direction crossing the address electrode and disposed to have a mutual discharge gap in the discharge space; A front dielectric layer filling the sustain electrode; A bus electrode arranged in a direction parallel to the sustain electrode and connected to the sustain electrode by at least one of the connection parts and disposed outside from the front substrate; And a black stripe formed on the upper surface of the bus electrode. The method of claim 1, And the connection portion is formed in a via hole of the front substrate, and one end is connected to the bus electrode and the other end is connected to the sustain electrode, respectively. The method of claim 1, And the connection part is formed at the same time when the bus electrode is formed, and is made of the same material as the bus electrode. The method of claim 1, And the bus electrode is made of only a white electrode layer. The method of claim 1, And the bus electrodes are formed in groups of two, and a black stripe is further formed in a non-discharge area between the one group and another adjacent group. The method according to claim 1 or 5, And the black stripe is made of a non-conductive material. The method of claim 1, And a protection member surrounding the bus electrode and the black stripe is further provided on the front substrate. The method of claim 1, And the bus electrode is formed by any one selected from a sputtering method, an electroless plating method, and a printing method. The method of claim 1, And the barrier ribs are arranged in parallel with the address electrodes and partitioned into strips of discharge space. The method of claim 1, And the sustain electrode is an ITO electrode. The method of claim 1, A lower surface of the front dielectric layer is further provided with a protective layer.

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