KR100587139B1 - Test pattern of cmos image sensor - Google Patents

Abstract

The present invention provides a test pattern of a CMOS image sensor capable of evaluating device isolation film characteristics between a device and a device and between an active area and a device as well as active areas.

The present invention includes a first body and a second active region having one body and N branches and spaced apart at predetermined intervals in a shape of a dent; First and second impurity regions of a first conductivity type disposed to surround the first and second active regions, respectively; A third impurity region of a second conductivity type disposed to surround the first and second impurity regions; And first and second pads connected to one side of the first and second active regions, and a third pad connected to one side of the third impurity region, respectively.

Image Sensor, Test Pattern, Device Separator, BV, Photodiode

Description

TEST PATTERN OF CMOS IMAGE SENSOR}             

1 is a plan view showing the layout of a test pattern of a CMOS image sensor according to an embodiment of the present invention.

2 is a plan view showing a layout of a test pattern of a CMOS image sensor according to another embodiment of the present invention.

※ Explanation of symbols for main parts of drawing

10A, 10B: active area

20, 30A, 30B: impurity region

PAD1, PAD2, PAD3: Pad

The present invention relates to a test pattern of a CMOS image sensor, and more particularly, to a test pattern of a CMOS image sensor capable of evaluating characteristics of an isolation layer.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal. The image sensor is composed of an optical sensing part that senses light and a logic circuit part that processes the sensed light into an electrical signal to make data. (Complementary Metal Oxide Semiconductor) In the case of image sensor, CMOS technology is used to make MOS transistors by the number of pixels, and the switching method is used to detect the output sequentially. An image sensor for realizing a color image includes a color filter array (CFA) consisting of three color filters, red (R), green (G), and blue (B), on a light sensing portion. ) Is provided.

Meanwhile, as the unit pixel size of the image sensor decreases due to the decrease in device size due to high integration, the device isolation film is separated by reducing the gap between the photodiodes, between the photodiode and the active region, and between the active regions. Breakdown Voltage (BV) characteristics are deteriorating. This breakdown voltage characteristic causes crosstalk noise and dark noise to degrade the optical characteristics of the image sensor. Since the breakdown voltage of the insulating device isolation layer is related to the optical characteristics, it is important to secure the breakdown voltage (BV) characteristics of these device isolation layers in order to secure excellent optical characteristics.

However, in the related art, since only a test pattern for measuring BV of the device isolation layer between the active regions exists, it is difficult to secure optical characteristics of the CMOS image sensor.

The present invention has been proposed to solve the above problems of the prior art, and provides a test pattern of a CMOS image sensor capable of evaluating not only active regions but also device-to-device and device isolation film characteristics between an active region and a device. The purpose is.

According to an aspect of the present invention for achieving the above technical problem, CMOS to provide accurate evaluation of the device isolation characteristics between the device and the device, the actual active region and the device of the CMOS image sensor including a photodiode In the test pattern of the image sensor, the branch has one body and N branches and the branches are symmetrically clad with each other, the width corresponds to the width of the actual active area, the interval between the branches is the actual First and second active regions spaced apart from each other so as to correspond to an interval between the active regions, and first and second active regions disposed to surround each other, and spaced apart from each other at an interval corresponding to the interval between the photodiodes; The first and second impurity regions and the first and second impurity regions to surround the seal; A third impurity region of a second conductivity type disposed at an interval corresponding to a distance between the active region and the photodiode, first and second pads connected to one side of the first and second active regions, respectively, A test pattern of a CMOS image sensor including a third pad connected to one side of a third impurity region is provided.

Here, when the first conductivity type is N type, the second conductivity type is P type, and when the first conductivity type is P type, the second conductivity type is N type.

Preferably, the third impurity region is made of P-well and the first and second impurity regions are made of N ⁺ impurity region or deep N ^- impurity region, respectively, or the third impurity region is made of P- epi layer and And the second impurity region is composed of N ⁺ impurity regions or deep N ⁻ impurity regions, respectively.

Further, the third impurity region is composed of N-wells, and the first and second impurity regions are composed of P ⁺ impurity regions or deep P ^- impurity regions, respectively, or the third impurity region is composed of N-epitaxial layers, The second impurity region is composed of P ⁺ impurity region or deep P ⁻ impurity region, respectively.

Hereinafter, preferred embodiments of the present invention will be introduced in order to enable those skilled in the art to more easily carry out the present invention.

1 is a plan view showing the layout of a test pattern of a CMOS image sensor according to an embodiment of the present invention.

As shown in FIG. 1, comb-shaped first and second active regions 10A and 10B having one body and three branches are spaced apart at predetermined intervals in an interdigitate form. First and second impurity regions 30A and 30B of the first conductivity type are disposed to surround the first and second active regions 10A and 10B, and the first and second impurity regions 30A and 30B are disposed. A third impurity region 20 of the second conductivity type serving as a substrate is disposed to surround the first and second impurity regions 30A and 30B from the outside. Here, the body width S1 of the first and second active regions 10A and 10B applies the minimum active region width of the corresponding application technique, and between the branches of the first and second active regions 10A and 10B. The interval S2 applies the minimum active region interval of the application technique, and the interval S3 between the first and second active regions 10A and 10B and the first and second impurity regions 30A and 30B is corresponding. The application technique applies the minimum overlap width with the active area.

In addition, the first pad PAD1 is connected to one side of the body of the first active region 10A, the second pad PAD2 is connected to one side of the branch of the second active region 10B, and the third impurity region 20 is connected. The third pad (PAD23) is connected to one side of the corner. Preferably, the first and second pads PAD1 are formed of a conventional first metal wiring contact layer and a first metal wiring layer, and the third pad PAD3 is formed using a well pickup module.

   In addition, the first, second and third impurity regions 30A, 30B, and 20 may each be composed of an impurity layer as shown in Table 1 below. In Table 1, 1 to 6 is a case where the pixel array region of the CMOS image sensor is composed of NMOS transistors, in the case of 1, between the active regions, in the case of 2 and 3, between the active region and the photodiode, and in the case of 4 The device isolation film characteristics between the photodiode and the photodiode and the active region and the photodiode in the case of 5 and 6 can be monitored through the first to third pads PAD1, PAD2 and PAD3, respectively. Can be. In addition, 7 to 12 are pixel array regions composed of PMOS transistors, and similarly to 1 to 6, element isolation film characteristics between the active regions, between the active region and the photodiode, and between the photodiode and the photodiode are first to first. Each of the three pads PAD1, PAD2, and PAD3 can be monitored.

number First impurity region 30A Second impurity region 30B Third impurity region 20 1 2 3 N ⁺ N ⁺ Deep N ^- N ⁺ Dip N ^- N ⁺  P-well 4 5 6 Deep N ^- N ⁺ Deep N ^- Dip N ^- Dip N ^- N ⁺  P-epi layer 7 8 9 P ⁺ P ⁺ Deep P ^- P ⁺ Dip P ^- P ⁺  N-well 10 11 12 Deep P ^- P ⁺ Deep P ^- Dip P ^- Dip P ^- P ⁺  N-epi layer

According to the above embodiment, the characteristics of the isolation layer between the device and the device and between the active area and the device, as well as the active areas, are accurately evaluated, so that the influence of noise generated from the CMOS image sensor between the adjacent pixel areas, etc. Since it can be quantified, the optical characteristics and performance of the CMOS image sensor can be improved.

Meanwhile, in the above embodiment, the case where there are three branches of the active region has been described. However, as shown in FIG. 2, two branches or as many as N branches may be applied depending on the purpose of the test pattern and the allowable region.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

The above-described present invention can accurately evaluate the device isolation film characteristics between the device and the device and between the device and the active area through the test pattern, thereby improving optical characteristics and performance of the CMOS image sensor.

Claims (6)

In the test pattern of the CMOS image sensor that provides an accurate evaluation of the device isolation characteristics between the device and the device, the actual active region and the device of the CMOS image sensor including a photodiode, The branch has one body and N branches and the branches are symmetrically clad with each other, the width corresponds to the width of the actual active area, the spacing between the branches spaced to correspond to the distance between the actual active area First and second active regions arranged in a row; First and second impurity regions disposed to surround the first and second active regions, respectively, and spaced apart at intervals corresponding to the intervals between the photodiodes; A third impurity region of a second conductivity type disposed to surround the first and second impurity regions and spaced apart from each other at an interval corresponding to a distance between the actual active region and the photodiode; And And a first pad connected to one side of the first and second active regions, and a third pad connected to one side of the third impurity region. The method of claim 1, And wherein if the first conductivity type is N type, the second conductivity type is P type, and if the first conductivity type is P type, the second conductivity type is N type. The method of claim 2, And the third impurity region is formed of P-well, and the first and second impurity regions are each formed of N ⁺ impurity region or deep N ^- impurity region, respectively. The method of claim 2, And the third impurity region is formed of a P- epi layer, and the first and second impurity regions are each formed of N ⁺ impurity regions or deep N ^- impurity regions. The method of claim 2, And the third impurity region is formed of N-well, and the first and second impurity regions are formed of P ⁺ impurity region or deep P ^- impurity region, respectively. The method of claim 2, And the third impurity region is formed of an N-epitaxial layer, and the first and second impurity regions are formed of P ⁺ impurity regions or deep P ^- impurity regions, respectively.

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