KR100577305B1 - Method for forming isolation film of semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming an isolation film of a semiconductor device in which device characteristics are improved by minimizing corner loss of the device isolation film. Selectively removing the nitride film, the second oxide film, the conductive layer, and the first oxide film to form a nitride film pattern, a second oxide film pattern, a conductive layer pattern, and a first oxide film pattern, and the nitride film pattern and the conductive layer pattern. Selectively removing the semiconductor substrate using a mask as a mask to form a trench; and performing a full-back wet wet etching on the semiconductor substrate to etch the side surfaces of the second oxide pattern and the first oxide pattern to form a space. Forming a third oxide film on a surface of the trench, on a side surface of the conductive layer, and in the space; And forming a device isolation layer in the trench in which the third oxide film is formed, and sequentially removing the nitride film pattern, the second oxide film pattern, and the conductive layer pattern.

Device Isolation, Loss, Polysilicon Layer, Oxide, Full-Back

Description

Method for forming isolation film of semiconductor device

1A to 1F are cross-sectional views illustrating a method of forming an isolation layer of a semiconductor device according to the prior art.

2 is a structural cross-sectional view showing a separator of a semiconductor device according to the prior art.

3A to 3F are cross-sectional views illustrating a method of forming an isolation layer of a semiconductor device according to the present invention.

4 is a structural cross-sectional view showing a separator of a semiconductor device according to the present invention.

Explanation of symbols for the main parts of the drawings

100 semiconductor substrate 101 first oxide film

102 polysilicon layer 103 second oxide film

104: nitride film 105: trench

106: third oxide film 107a: device isolation film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming an isolation film of a semiconductor device to prevent leakage and improve device characteristics.

In general, as semiconductor devices are increasingly integrated, methods for reducing the size of device isolation regions and device formation regions, that is, active regions, have been proposed.

As the formation technology of the device isolation region as described above, a LOCOS (LOCal Oxidation of Silicon) process was used. The isolation region forming process using the LOCOS process has been widely used because of its advantages that the process is simple and excellent in reproducibility.

However, as the device is gradually integrated, the area of the active region is reduced due to the occurrence of Bird's Beak at the edge of the isolation oxide that extends into the active region, which is characteristic of the isolation oxide formed by the LOCOS process. It is not suitable for use in DRAMs of more than 64MB.

Therefore, in the conventional method of forming an isolation region using LOCOS, an advanced LOCOS process is proposed such as preventing the generation of buzz big or removing the buzz big to reduce the isolation area and increase the active area. Or in the manufacturing process of 256MB DRAM.

However, in the process of forming the isolation region using the advanced advanced process, the problem that the isolation region occupies is large in the GIGA class or more DRAM requiring the cell area of 0.2 μm or less, and the field oxide film formed by the LOCOS process Formation at the interface with the silicon substrate lowers the concentration of the silicon substrate due to bonding with the field oxide film, resulting in problems such as leakage current, resulting in poor isolation characteristics. As a result, a method of forming an isolation region having a shallow trench isolation (STI) structure using a trench that can easily control the thickness of the isolation region and enhance the isolation effect has been proposed.

Hereinafter, a method of forming an isolation layer of a semiconductor device according to the related art will be described with reference to the accompanying drawings.

1A to 1F are cross-sectional views illustrating a method of forming a separator of a semiconductor device according to the prior art.

As shown in FIG. 1A, a pad oxide film is formed on the semiconductor substrate 10, and a nitride film is formed on the pad oxide film 11.

Subsequently, the nitride layer 12 is selectively formed through the photolithography and etching processes to expose a predetermined portion of the surface of the semiconductor substrate 10 to form the nitride layer pattern 12.

As illustrated in FIG. 1B, the exposed pad oxide layer 11 and the semiconductor substrate 10 may be selectively etched using the nitride layer pattern 12 as a mask to form the oxide layer pattern 11 and the semiconductor substrate 10. A trench 13 having a predetermined depth from the surface is formed.

Herein, a portion in which the trench 13 is formed corresponds to an isolation region, and a region in which the nitride layer pattern 12 and the oxide layer pattern 11 remain is an active region in which a transistor is to be formed.

As illustrated in FIG. 1C, an oxidation process is performed on the semiconductor substrate 10 on which the trench 13 is formed to form an oxide film 14 on the surface of the semiconductor substrate 10 on which the trench 13 is formed.

As shown in FIG. 1D, an insulating film 15 for gap fill is formed on the entire surface of the semiconductor substrate 10 including the trench 13.

In this case, the insulating layer 15 may be made of SOG (Spin On Glass) or USG (Undoped Silicate Glass).

As illustrated in FIG. 1E, the insulating film 15 is polished on the entire surface of the semiconductor substrate 10 by a chemical mechanical polishing (CMP) process to form an element isolation film 15a in the trench 13.

As shown in FIG. 1F, the nitride film pattern 12 is removed with phosphoric acid, the oxide film pattern 11 is removed through a cleaning process, or the like, and a gate insulating film (not shown) is formed on the entire surface of the semiconductor substrate 10. ).

In general, the additives of the device isolation layer 15a having the STI structure and various wet cleaning processes exhibit a tendency to lose and dent the boundary between the moat and the field. It is the source of the leakage.

At this time, in the manufacturing process of the isolation layer according to the prior art, there is no sufficient margin at the corner rounding portion of the device isolation layer, which is a main cause of deterioration of the characteristics of the gate insulation layer, the architecture, and the threshold voltage characteristic.

That is, FIG. 2 is a structural sectional view showing a separator of a semiconductor device according to the prior art.

As shown in FIG. 2, during the cleaning process in which the top corner portion of the device isolation layer 15a is subjected to a plurality of times, etching proceeds to generate a loss A, which is then stored. It acts as a source, degrading the reliability of the device.

An object of the present invention is to provide a method for forming a separator of a semiconductor device to improve the characteristics of the device by minimizing the loss of a corner portion of the device isolation layer.

The isolation film forming method of a semiconductor device according to the present invention for achieving the above object comprises the steps of sequentially forming a first oxide film, a conductive layer, a second oxide film, a nitride film on the semiconductor substrate, the nitride film, the second oxide film, conductive Selectively removing the layer and the first oxide film to form a nitride film pattern, a second oxide film pattern, a conductive layer pattern, and a first oxide film pattern, and selectively using the semiconductor substrate using the nitride film pattern and the conductive layer pattern as a mask. Removing a trench to form a trench; and performing a full-back wet wet etching on the semiconductor substrate to form a space by etching side surfaces of the second oxide pattern and the first oxide pattern, and forming a surface of the trench and the trench. Forming a third oxide film on the side of the conductive layer and in the space, and forming a device isolation film in the trench in which the third oxide film is formed. And removing the nitride film pattern, the second oxide film pattern, and the conductive layer pattern in order.

Hereinafter, a method of forming a separator of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

3A to 3F are cross-sectional views illustrating a method of forming an isolation film of a semiconductor device according to the present invention.

As shown in FIG. 3A, a first oxide film 101 is formed on the semiconductor substrate 100 to a thickness of about 20 to 150 GPa, and a polysilicon layer 102 is about 200 on the first oxide film 101. It is formed to a thickness of ~ 1000Å.

Subsequently, a second oxide film 103 is formed on the polysilicon layer 102 within about 100 GPa, and a nitride film 104 is formed on the second oxide film 103 to a thickness of about 1000 to 2000 GPa.

The nitride layer, the polysilicon layer, and the pad oxide layer may be selectively etched through photo and etching processes to form the nitride layer pattern 104, the second oxide layer pattern 103, the polysilicon layer pattern 102, and the first oxide layer pattern 101. To form.

Subsequently, the exposed semiconductor substrate 100 is selectively etched using the nitride film pattern 104 as a mask to form a trench 105 having a predetermined depth from the surface.

As shown in FIG. 3B, the second oxide film pattern 103 and the first oxide film pattern 101 are full-back by wet etching containing HF using the nitride film pattern 104 as a mask. Proceed). At this time, the second oxide film pattern 103 and the first oxide film pattern 101 are etched within about 30 ~ 150Å from the side.

As shown in FIG. 3C, the semiconductor substrate 100 having the trench 105 formed thereon is subjected to an oxidation process, and the surface of the semiconductor substrate 100 exposed and the side surface of the polysilicon layer pattern 102 and the second surface are exposed. The oxide layer pattern 103 and the first oxide layer pattern 101 are etched to form a third oxide layer 106 in a portion where the oxide layer pattern 103 and the first oxide layer pattern 101 are etched away.

That is, during the oxidation process, the amount of oxidation is performed in the inside and the outside of the interface while the oxidation is performed not only in the trench 105 region but also on the exposed surface of the semiconductor substrate 100 as well as in the sidewall portion of the polysilicon layer pattern 102. Since the process proceeds at a ratio of about 5: 5, the space B where the full-back has been progressed is attached to each other by the up and down oxidation process.

Accordingly, while the third oxide film 106 is naturally generated even in the space where the full-back has been performed, the loss of the device isolation layer is minimized by the additive or cleaning process, which is a subsequent process, and thus the dent phenomenon as well as the corner portion can be prevented.

As shown in FIG. 3D, an insulating film 107 for gap fill is formed on the entire surface of the semiconductor substrate 100 including the trench 105.

In this case, the insulating layer 107 uses spin on glass (SOG), undoped silica glass (USG), a TEOS oxide film, or the like.

As shown in FIG. 3E, the insulating film 107 is polished on the entire surface of the semiconductor substrate 100 by a chemical mechanical polishing (CMP) process to form a device isolation film 107a inside the trench 105.

Here, since the polysilicon layer pattern 102a is formed during the CMP process, the process may proceed with a sufficient over etch margin.

As shown in FIG. 3F, the nitride film pattern 104 is removed with an additive and phosphoric acid, and the second oxide film pattern 103a is removed.

Subsequently, the polysilicon layer pattern 102a is removed by dry or wet etching.

4 is a structural cross-sectional view showing an isolation film of a semiconductor device according to the present invention.

As shown in FIG. 4, the third oxide film 106 remains at the top corner of the device isolation film 107a, thereby minimizing the loss of the device isolation film 107a during several cleaning processes.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

As described above, the method of forming the isolation film of the semiconductor device according to the present invention has the following effects.

First, corner rounding may be performed by forming a thick oxide film to eliminate a phenomenon in which an electric field is concentrated at an edge of an active region where a transistor is formed.

Second, it is possible to prevent the breakdown voltage (BV) caused by a strong electric field.

Third, the dent phenomenon can be prevented by minimizing the field loss of the trench edge region, thereby preventing the package.

Claims (7)

Sequentially forming a first oxide film, a conductive layer, a second oxide film, and a nitride film on the semiconductor substrate; Selectively removing the nitride film, the second oxide film, the conductive layer, and the first oxide film to form a nitride film pattern, a second oxide film pattern, a conductive layer pattern, and a first oxide film pattern; Forming a trench by selectively removing the semiconductor substrate using the nitride film pattern and the conductive layer pattern as a mask; Performing a full-back wet etching process on the semiconductor substrate to form a space by etching side surfaces of the second oxide pattern and the first oxide pattern; Forming a third oxide film on a surface of the trench, on a side surface of the conductive layer, and in the space; Forming an isolation layer in the trench in which the third oxide film is formed; And removing the nitride layer pattern, the second oxide layer pattern, and the conductive layer pattern in order. The method of claim 1, wherein the first oxide film is formed to a thickness of about 20 to 150 microns. The method of claim 1, wherein the second oxide film is formed to a thickness of about 100 GPa or less. The method of claim 1, wherein the conductive layer is formed of a polysilicon layer. The method of claim 1, wherein the conductive layer is formed to a thickness of about 200 ~ 1000 GPa. The method of claim 1, wherein the side etching of the second oxide pattern and the first oxide pattern is performed by wet etching containing HF. The method of claim 1, wherein the space is formed within about 30 ~ 150 kHz from the side surface.

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