KR100572493B1 - Method for manufacturing pad in semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming a pad of a semiconductor device, and more particularly, a semiconductor in which a lead ball contacts a pad surface well during a package process by completely removing foreign substances such as a polymer remaining on a surface of a metal wiring layer. It relates to a method of forming a pad of the device.

In the method for forming a pad of a semiconductor device according to the present invention, an oxide flattening process by a CMP process and an insulating film are etched, thereby preventing the occurrence of foreign substances such as polymers due to conventional plasma etching and the like. Since the insulating film, which may remain sufficiently polished on the surface of the metal wiring in the area, can be completely removed, the lead ball for bonding can be prevented from coming off due to a poor contact with the metal surface.

Pad, package, bonding, CMP, etching.

Description

Method for forming pad of semiconductor device {Method for manufacturing pad in semiconductor device}             

1 to 4 are cross-sectional views showing a pad forming method of a semiconductor device according to the prior art.

5 to 7 are cross-sectional views showing a pad forming method of a semiconductor device according to the present invention.

The present invention relates to a method of forming a pad of a semiconductor device, and more particularly, to remove foreign substances such as a polymer remaining on the surface of a metal wiring layer and to remove lead-balls from the surface of the pad during a package process. It relates to a method of forming a pad of a semiconductor device to be in good contact.

After completion of the manufacturing process of the semiconductor device, it goes through an assembly process called a package. When the assembly process is performed, a package bonding operation is necessary, which interconnects a portion of the uppermost layer of the semiconductor device with a pad and a portion used as a pin. If foreign materials such as polymers are present at the upper end, the bonding may not be performed properly, and the lead ball may be separated, resulting in a decrease in product yield.

In order to ensure proper bonding, the surface of the metal thin film constituting the bonding pad should be clean and not oxidized. However, in the case of using the conventional method, foreign matters remaining due to instability of the process conditions during plasma dry etching to form the pad layer are used. Problems such as the presence of foreign substances due to insufficient cleaning process occur.

An example of a process of a conventional pad forming method will be described with reference to FIGS. 1 to 4.

First, as shown in FIG. 1, an insulating film 2 made of an oxide film or the like is formed on a structure 1 of a semiconductor substrate, that is, on a semiconductor substrate or a lower metal wiring layer on which individual elements are formed, and then on the insulating film 2. After the aluminum alloy film 3 is formed, it is exposed in the air to form a thin natural oxide film 4 on the aluminum alloy film 3. Subsequently, a refractory metal film 5 and a photoresist film are sequentially formed on the natural oxide film 4, and are exposed and developed to leave a photoresist film only in a region to be formed as a metal wiring layer, and the photoresist film in other regions is removed to remove the first photoresist film. The photosensitive film pattern 6 is formed.

Next, as shown in FIG. 2, the exposed metal oxide film 5 is dry-etched using the first photoresist pattern 6 as a mask, and the underlying natural oxide film 4 and the aluminum alloy film 3 are etched. Subsequently, dry etching is performed to form a metal wiring layer composed of the repository metal film 5, the natural oxide film 4, and the aluminum alloy film 3 having a predetermined width, and then the first photoresist film pattern 6 is removed and the cleaning process is performed. Do this. Subsequently, the protective film 7 is formed and the second photosensitive film pattern 8 is formed.

Next, as shown in FIG. 3, all of the protective film 7 are removed, a part of the repository metal film 5 is removed, a second photoresist film pattern is removed, and a cleaning process is performed.

Next, as shown in FIG. 4, both the metal oxide film 5 and the underlying natural oxide film 4 are removed by a plasma etching method using an inert gas, and the aluminum alloy film 3 is exposed to expose a pad ( 100).

Looking at other examples of the prior art pad forming method, US Patent Publication No. US2004 / 0110365A1 is a chemical mechanical polishing (CMP) process to form a planar bonding pad on the metal layer formed on the insulating layer The method is disclosed, and Korean Patent Laid-Open Publication No. 2004-0037877, Korean Patent Registration No. 0220687 and the like disclose a method of increasing the contact area by giving an unevenness or step to the metal layer itself.

However, in the above-described process, there is a possibility that foreign substances such as polymers remain on the surface of the metal wiring layer, so that the lead ball in the subsequent assembly process may not be in contact with the pad surface.

Accordingly, the present invention is to solve the above-mentioned disadvantages and problems of the prior art, and to deposit an insulating film on the metal wiring formed through a predetermined process, so that the deposited insulating film almost coincides with the upper surface of the metal wiring The present invention provides a method of forming a pad of a semiconductor device in which a lead ball is in good contact with a pad surface during a package process by completely removing foreign substances such as a polymer remaining on a surface of a metal wiring layer by performing a CMP process and an additional etching process. There is a purpose.

The object of the present invention is the step of forming a metal wiring on a semiconductor substrate having a predetermined structure; Depositing an insulating film on the substrate on which the metal wiring is formed; And forming a pad by planarizing the insulating layer to an upper end of the metal wiring, thereby performing a CMP process to form a pad.

Details of the above object and technical configuration of the present invention and the effects thereof according to the present invention will be more clearly understood by the following detailed description with reference to the drawings showing preferred embodiments of the present invention.

First, as shown in FIG. 5, after the process proceeds to a predetermined process on the silicon substrate 10, the oxide film 20 is deposited, and the metal wiring 30 is formed by performing a process such as photomasking and etching in a predetermined region. do. After that, a thick insulating film 40 is deposited over the entire structure. The thickness of the insulating film 40 is preferably deposited to the extent that the CMP process proceeds smoothly. The deposited insulating film 40 may be formed of any one or a plurality of oxide films, silicon nitride, and silicon oxynitride.

Next, as shown in FIG. 6, the CMP process is performed on the entire upper portion of the structure such that the upper end portion of the insulating film 40 and the upper end portion of the metal wiring 30 are connected in a substantially straight line to each other. Since the thickness of the metal wiring after the CMP process becomes 'A', a small amount of the metal wiring 30 is also removed while CMP insulating the insulating film 40, so the 'A' thickness is slightly smaller than the thickness before polishing. Has Heat treatment is performed after the CMP process. The heat treatment temperature is preferably about 250 to 500 ℃. By performing the CMP process as described above, it is possible to prevent the generation of the polymer due to the conventional plasma etching and the like.

Next, as shown in FIG. 7, the entire surface etching process is performed on the insulating film 40 so that the thickness 'B' of the insulating film formed on the side surface of the metal wiring 30 is made smaller, preferably 'C'. To be removed. The insulating film 40 is etched to completely remove the insulating film that may remain on the surface of the metal wiring 30 in a predetermined region of the substrate. The etching process after the insulating film CMP process as described above may be omitted in a range where the yield does not decrease. In addition, the etching process may be performed by selecting any one of various etching methods such as dry etching and wet etching.

Although the present invention has been shown and described with reference to the preferred embodiments as described above, it is not limited to the above embodiments and those skilled in the art without departing from the spirit of the present invention. Various changes and modifications will be possible.

Accordingly, in the method for forming a pad of the semiconductor device of the present invention, by performing an oxide film planarization process using a CMP process and performing an insulating film etch, foreign matters such as polymers due to conventional plasma etching can be prevented at the source. Since the insulating film, which may remain sufficiently polished on the surface of the metal wiring in a certain region of, can be completely removed, the lead ball for bonding can be prevented from coming off due to a poor contact with the metal surface.

Claims (5)

Forming metal wiring on a semiconductor substrate on which a predetermined structure is formed; Depositing an insulating film on the substrate on which the metal wiring is formed; And Performing a CMP process to planarize the insulating layer to an upper end of the metal wiring to form a pad Pad formation method of a semiconductor device comprising a. The method of claim 1, And the insulating film is formed of any one or a plurality of oxide films, silicon nitride, and silicon oxynitride. The method of claim 1, And performing a heat treatment process after the CMP process. The method of claim 3, wherein The heat treatment step is a pad forming method of a semiconductor device, characterized in that performed in the range of 250 to 500 ℃. The method of claim 1, And etching the entire surface of the insulating layer after the CMP process by any one of dry and wet etching methods.

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