KR100570758B1 - Light emitting panel and light emitting display - Google Patents

Abstract

The present invention provides a light emitting display device having a pixel circuit which can be driven without the influence of the threshold voltage of the driving transistor, and a plurality of elements included in the pixel circuit are efficiently disposed in the pixel region.

According to the present invention, the pixel circuit includes a first transistor that operates in response to the immediately preceding selection signal and a second transistor that operates in response to the current selection signal, wherein the first and second sub-scanning lines apply the same selection signal. Include them. Here, the control electrode of the first transistor is electrically connected to the second sub scan line of the scan line applying the immediately preceding selection signal, and the control electrode of the second transistor is electrically connected to the first sub scan line of the scan line applying the current selection signal. do.

Organic electroluminescence, organic EL, OLED, pixel circuit, scanning line

Description

Light emitting panel and light emitting display device

1 is a conceptual diagram of an organic EL device.

2 is a view schematically showing a general organic EL display device using an active driving method using a TFT.

3 is a diagram schematically illustrating N × M pixel circuits of the display panel 100 of FIG. 2.

4 is an equivalent circuit diagram illustrating a pixel circuit 110 according to an exemplary embodiment of the present invention.

5 is a plan view illustrating an example of an arrangement structure of a pixel circuit according to an exemplary embodiment of the present invention.

FIG. 6 is a cross-sectional view of part II ′ of FIG. 5.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting display device, and more particularly to an organic EL display device using electroluminescence of an organic material (hereinafter referred to as "organic EL").

In general, an organic EL display device is a display device for electrically exciting a fluorescent organic compound to emit light, and is capable of displaying an image by voltage driving or current driving N × M organic light emitting cells arranged in a matrix form.

Such an organic light emitting cell has a diode characteristic and is also called an organic light emitting diode (OLED), and has a structure of an anode (ITO), an organic thin film, and a cathode electrode layer (metal), as shown in FIG. 1. The organic thin film has a multilayer structure including an emitting layer (EML), an electron transport layer (ETL), and a hole transport layer (HTL) to improve the emission efficiency by improving the balance between electrons and holes. It also includes a separate electron injecting layer (EIL) and a hole injecting layer (HIL). These organic light emitting cells are arranged in an N × M matrix to form an organic EL display panel.

The organic EL display panel is driven by a simple matrix method and an active matrix method using a thin film transistor (hereinafter, referred to as TFT). In the simple matrix method, the anode and the cathode are formed to be orthogonal and the line is selected and driven, but the active driving method is to drive the organic EL device by sequentially turning on a plurality of thin film transistors connected to the data line and the scan line according to the scan selection signal. That's the way.

2 is a view schematically showing a general organic EL display device using an active driving method using a TFT.

As shown in FIG. 2, the organic EL display device includes an organic EL display panel 100, a scan driver 200, and a data driver 300.

The scan driver 200 sequentially applies a selection signal to each of the plurality of scan lines S1 -Sn extending in the row direction, and the data driver 300 applies the plurality of data lines D1 -Dm extending in the column direction. A data voltage corresponding to the image signal is applied.

The scan driver 200 and / or the data driver 300 may be electrically connected to the display panel 100 or may be attached to a tape carrier package (TCP) that is electrically attached to the display panel 100. It may be mounted in the form of a chip. Alternatively, the display panel 100 may be mounted in a flexible printed circuit (FPC) or a film that is adhered to and electrically connected to the display panel 100 in the form of a chip. Alternatively, the scan driver 200 and / or the data driver 300 may be directly mounted on the glass substrate of the display panel, or may be replaced with a driving circuit formed of the same layers as the scan line, the data line, and the thin film transistor on the glass substrate. It may be mounted directly.

The organic EL display panel 100 includes a data line D1 -Dm, a scan line S1 -Sn, and a plurality of pixel circuits 110. The data lines D1 -Dm transmit a data signal representing an image signal to the pixel circuit 110, and the scan lines S1 -Sn transfer a selection signal to the pixel circuit 110.

FIG. 3 is a diagram schematically illustrating one of N × M pixel circuits of the display panel 100 of FIG. 2.

As shown in Fig. 3, the pixel circuit includes an organic EL element OLED, two transistors SM and DM and a capacitor Cst. The transistors SM and DM are formed of a PMOS transistor.

In the driving transistor DM, a source is connected to the power supply voltage Vdd, and a capacitor Cst is connected between the gate and the source. The cathode of the organic EL element OLED is connected to the reference voltage Vss and emits light corresponding to a current applied through the driving transistor DM. Here, the power supply VSS connected to the cathode of the organic EL element OLED is a voltage having a lower level than the power supply Vdd, and a ground voltage or the like may be used.

The capacitor Cst maintains the gate-source voltage VGS of the transistor M1 for a period of time. When the switching transistor SM is turned on in response to the selection signal from the current scan line Sn, the data voltage VDATA from the data line Dm is applied to the gate of the transistor DM. Then, the current IOLED flows in the transistor DM in response to the voltage VGS charged between the gate and the source by the capacitor Cst, and the organic EL element OLEDr emits light in response to the current IOLED. . At this time, the current IOLED flowing through the organic EL device OLEDr is represented by Equation 1 below.

Here, VTH represents a threshold voltage of the transistor DM, and β represents a constant value.

As shown in Equation 1, a current corresponding to the data voltage VDATA is supplied to the organic EL element OLED, and the organic EL element OLEDr emits light at a luminance corresponding to the supplied current. In this case, the applied data voltage has a multi-level value in a predetermined range in order to express a predetermined gray level.

However, as can be seen from Equation 1, in the pixel circuit, the value of the current IOLED varies according to the threshold voltage Vth of the transistor DM. Therefore, the threshold voltage Vth of the transistor DM may be different for each pixel, which makes it difficult to accurately display an image.

The present invention provides a light emitting display panel having a pixel circuit which can be driven without the influence of a threshold voltage of a driving transistor, and a plurality of elements included in the pixel circuit are efficiently disposed in a pixel region, and a light emitting display using the same. To provide a device.

In order to achieve the above technical problem, a light emitting display device according to an aspect of the present invention, a plurality of scan lines extending in a first direction and including first and second scan lines for transmitting first and second selection signals, A plurality of data lines insulated from and intersecting the scan lines, extending in a second direction, and transmitting data signals, and a plurality of pixel circuits connected to the scan lines and the data lines, respectively, for displaying an image on a display panel arranged in a matrix form. As a light emitting display device,

Each of the pixel circuits may include a first transistor configured to operate in response to the first selection signal; And a second transistor operating in response to the second selection signal,

Each of the scan lines may include a first sub scan line; And a second sub-scanning line applying the same selection signal as the first sub-scanning line,

The control electrode of the first transistor is electrically connected to the second sub scan line of the first scan line, and the control electrode of the second transistor is electrically connected to the first sub scan line of the second scan line.

The pixel circuit may further include a third transistor that operates in response to the first selection signal, and a control electrode of the third transistor may be electrically connected to a first sub scan line of the first scan line.

The second subscanning line of the first scan line may be closer to the first subscanning line of the second scan line than the first subscanning line of the first scan line.

The second transistor may output the data signal to another main electrode in response to a selection signal in which one main electrode is electrically connected to the data line and applied to a control electrode.

Each of the pixel circuits includes a fourth transistor having a control electrode, a first electrode, and a second electrode, and outputting a current corresponding to a voltage difference between the control electrode and the first electrode to a second electrode; A light emitting device emitting light in response to a current output from the second electrode of the fourth transistor; A first capacitor having one electrode connected to the control electrode of the fourth transistor; And a second capacitor having one electrode electrically connected to the first electrode of the fourth transistor and the other electrode electrically connected to the other electrode of the first capacitor.

The first transistor may be a transistor connected in parallel with the second capacitor, and the third transistor may be a transistor for diode-connecting the fourth transistor.

A light emitting display device according to another aspect of the present invention,

A plurality of scan lines extending in a first direction and transmitting a selection signal; A plurality of data lines insulated from and intersecting the scan lines and extending in a second direction and transferring data signals; A plurality of pixel circuits each connected to the scan line and the data line and arranged in a matrix;

Each of the scan lines may include a first sub scan line; And a second sub-scanning line applying the same selection signal as the first sub-scanning line.

A light emitting display panel according to another aspect of the present invention,

A plurality of scan lines extending in a first direction and transmitting a selection signal; A plurality of sub-scanning lines extending in a first direction and disposed between two adjacent scanning lines and transmitting the same selection signal as any one of the two adjacent scanning lines; A plurality of data lines insulated from and intersecting the scan lines and extending in a second direction and transferring data signals; And a plurality of pixel circuits connected to the scan line, the sub scan line, and the data line, respectively, and arranged in a matrix.

The scan lines may be connected to two adjacent pixel circuits, and the sub-scan lines may be respectively connected to two adjacent pixel circuits.

The sub-scanning line may be branched from the scanning line for transmitting the same selection signal.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification. When a part is connected to another part, this includes not only a directly connected part but also a case where another part is connected in between. Also, when a part of a layer, film, region, plate, etc. is over another part, this includes not only when the other part is "right over" but also another part in the middle.

4 is an equivalent circuit diagram illustrating a pixel circuit 110 according to an exemplary embodiment of the present invention.

As shown in FIG. 4, the pixel circuit 110 includes transistors M1-M5, capacitors Cst, Cvth, and an organic EL element OLED.

The transistor M1 is a driving transistor for driving the organic EL element OLED. The transistor M1 is connected between a power supply for supplying the voltage VDD and the organic EL element OLED, and is applied to the gate by a voltage applied to the gate. The current flowing through the organic EL device OLED is controlled through the controller. The transistor M3 diode-connects the transistor M1 in response to a selection signal from the immediately preceding scan line Sn-1. One electrode A of the capacitor Cvth is connected to the gate of the transistor M1, and the capacitor Cst and the transistor M4 are connected between the other electrode B of the capacitor Cvth and a power supply for supplying the voltage VDD. ) Are connected in parallel. The transistor M4 supplies the power supply VDD to the other electrode B of the capacitor Cvth in response to the selection signal from the immediately preceding scan line Sn-1. The transistor M5 transmits the data signal transmitted from the data line Dm to the other electrode B of the capacitor Cvth in response to the selection signal from the current scan line Sn. The transistor M2 is connected between the drain of the transistor M1 and the anode of the organic EL element OLED, and responds to the selection signal from the immediately preceding scan line Sn-1 and the drain of the transistor M1 and the organic EL element OLED. ). The organic EL element OLED emits light corresponding to the current input from the transistor M1 through the transistor M2.

First, when a low level scan voltage is applied to the previous scan line Sn- 1, the transistor M3 is turned on, and the transistor M1 is in a diode-connected state. Accordingly, the voltage between the gate and the source of the transistor M1 changes until the threshold voltage Vth of the transistor M1 becomes. At this time, since the source of the transistor M1 is connected to the power supply VDD, the voltage applied to the gate of the transistor M1, that is, the node A of the capacitor Cvth, is the power supply voltage VDD and the threshold voltage Vth. Is the sum of. In addition, since the transistor M4 is turned on and the power supply VDD is applied to the node B of the capacitor Cvth, the voltage VCVth charged in the capacitor Cvth is expressed by Equation 2 below.

Here, VCvth means a voltage charged in the capacitor Cvth, VCvthA means a voltage applied to the node A of the capacitor Cvth, VCvthB means a voltage applied to the node B of the capacitor Cvth. .

In addition, the transistor M2 having an N-type channel is blocked in response to the low level signal of the emission control line EMIn, thereby preventing the current flowing through the transistor M1 from flowing to the organic EL element OLED. Since a high level signal is applied to the current scan line Sn, the transistor M5 is cut off.

Next, when a low level scan voltage is applied to the current scan line Sn, the transistor M5 is turned on to apply the data voltage Vdata to the node B. In addition, since the capacitor Cvth is charged with a voltage corresponding to the threshold voltage Vth of the transistor M1, the gate of the transistor M1 is charged with the data voltage Vdata and the threshold voltage Vth of the transistor M1. The voltage corresponding to the sum is applied. That is, the gate-source voltage Vgs of the transistor M1 is expressed by Equation 3 below. At this time, the low-level signal is applied to the emission control line EMIn and the transistor M2 is cut off.

Then, in response to the high level of the emission control line EMIn, the transistor M2 is turned on so that a current IOLED corresponding to the gate-source voltage VGS of the transistor M1 is supplied to the organic EL element OLED. Thus, the organic EL element OLED emits light. The current IOLED is shown in Equation 4.

Here, the current IOLED is a current flowing through the organic EL element OLED, Vgs is a voltage between the source and gate of the transistor M1, Vth is a threshold voltage of the transistor M1, Vdata is a data voltage, and β is a constant value. Indicates.

As can be seen from Equation 4, since the current IOLED is determined according to the data voltage Vdata and the power supply VDD regardless of the threshold voltage of the driving transistor, the display panel can be driven stably.

However, the pixel circuit of FIG. 4 and the like require the organic EL element OLED to emit light. Therefore, since a plurality of elements must be disposed in the pixel region in which one pixel circuit is disposed, and some elements must be connected to the scan line or the data line, there is a difficulty in arrangement. Furthermore, when the transistor M5 which operates in response to the selection signal of the current scan line Sn and the transistors M3 and M4 which operate in response to the selection signal of the previous scan line Sn-1, one scan line Since the switching transistor M5 and the transistors M3 and M4 have to be connected, there are more layout difficulties.

5 is a plan view showing an example of an arrangement according to an embodiment of the present invention, Figure 6 is a cross-sectional view of the portion I ~ I 'of FIG. Each of parts I-1 to I-7 in FIG. 5 corresponds to parts I-1 to I-7 in FIG. 6. In FIG. 5 and FIG. 6, an instruction number is given to a component of the current pixel Pn, and an instruction number of a component of the immediately preceding pixel Pk-1 is the same as an instruction number of a component of the current pixel Pk. Indicated by adding (') to the mark.

5 and 6, a blocking layer 10 made of silicon oxide or the like is formed on the insulating substrate 1, and a polysilicon layer 21 and 22, which is a semiconductor layer, is formed on the blocking layer 10. , 23, 24, 25, 26) are formed.

The polysilicon layer 21 has a '⊂' shape to form a semiconductor layer including a source region, a drain region, and a channel region of the transistor M5 of the current pixel Pn. The polysilicon layer 22 is formed in the horizontal direction and forms the semiconductor layer of the transistor M4 of the current pixel Pn. The polycrystalline silicon layer 23 has a rectangular shape to form one electrode of the capacitor Cst. The polysilicon layer 24 is formed in a wide polygonal shape having a "└" shape and becomes one electrode A of the capacitor Cvth. The polycrystalline silicon layer 25 is connected to the polycrystalline silicon layer 24 in an "n" shape to form semiconductor layers of the transistors M1 and M3. The polysilicon layer 26 extends in the vertical direction and forms the semiconductor layer of the transistor M2 of the current pixel Pn.

The gate insulating film 30 is formed on the polycrystalline silicon layers 21, 22, 23, 24, 25, and 26 formed as described above.

Gate electrodes 41, 42, 43, 44, 45, 46, and 47 are formed on the gate insulating layer 30. In detail, the gate electrode 41 corresponding to the emission control line EMIn of the current pixel Pn extends in the horizontal direction and forms the gate electrode of the transistor M2 of the current pixel. The gate electrode 42 corresponding to the first immediately preceding scan line Sn-1 is formed in a 'ㅗ' shape to form a double gate electrode of the switching transistor M5 of the immediately preceding pixel Pn-1. The gate electrode 43 forms the gate electrode of the driving transistor M1. The gate electrode 44 corresponding to the second immediately preceding scan line Sn-1 is formed in a 'TT' shape to form a gate electrode of the transistor M4. Although not particularly illustrated, the gate electrode 42 and the gate electrode 44 may be connected to output lines of the scan driver 200, respectively, and the gate electrode 42 and the gate electrode may be connected to one output line of the scan driver 200. Any one of 44 may be connected and the other may be branched from one connected to the output line of the scan driver 200.

The gate electrode 45 corresponding to the emission control line EMIn + 1 of the next pixel Pn + 1 extends in the horizontal direction and forms the gate electrode of the transistor M2 of the next pixel P + 1. The gate electrode 46 corresponding to the first current scan line Sn is formed in a 'ㅗ' shape to form a double gate electrode of the switching transistor M5 of the current pixel Pn. The gate electrode 47 forms a node B in which the capacitor Cst and the capacitor Cvth are connected in series.

The interlayer insulating film 50 is formed on the gate electrodes 41, 42, 43, 44, 45, 46, and 47. On the interlayer insulating film 50, the data lines 71, the contact lines 51a, 51b, 52a, 52b, 53a, 53b, 54a, 55a, 55b, 56a, 56b, 57a, 57b to contact the corresponding electrodes. Power lines 72 and 72 'and electrodes 73, 74, 75 and 76 are formed.

The data line 71 extends in the column direction and is connected to the polysilicon layer 21 through a contact hole 51a penetrating through the interlayer insulating film 50 and the gate insulating film 30 to drain the transistor M2. Form an electrode.

The power supply lines 72 and 72 'extend in the column direction similarly to the data line 71. As shown in FIG. In addition, the power supply line 72 'is connected to the polysilicon layer 22 through the contact hole 52a penetrating through the interlayer insulating film 50 and the gate insulating film 30 to form a source electrode of the transistor M4. The power line 72 is connected to the polycrystalline silicon layer 23 through the contact hole 53b penetrating the interlayer insulating film 50 and the gate insulating film 30 to form one electrode of the capacitor Cst. In addition, the power line 72 forms the source electrode of the transistor M1 through the contact hole 54a penetrating through the interlayer insulating film 50 and the gate insulating film 30.

The electrode 73 is elongated in the column direction, and is connected to the polysilicon layer 21 through a contact hole 51b penetrating through the interlayer insulating film 50 and the gate insulating film 30 to form a drain electrode of the transistor M5. A gate electrode 47 through a contact hole 53a which is connected to the polysilicon layer 22 through a contact hole 52b to form a drain electrode of the transistor M4, and penetrates the interlayer insulating film 50. Is connected to form one electrode of the capacitor Cst. That is, the electrode 73 becomes a node B to which the drain electrode of the transistor M5, the drain electrode of the transistor M4, the capacitor Cst, and the capacitor Cvth are electrically connected.

The electrode 74 has a small “└” shape, is connected to the gate electrode 43 through contact holes 55a and 55b penetrating the interlayer insulating film 50, and the interlayer insulating film 50 and the gate insulating film 30. Is connected to the polycrystalline silicon layer 25 formed through the contact hole 56b through the contact hole 56b to form the drain electrode of the transistor M3. Accordingly, the electrode 74 becomes a node A to which the gate electrode 43 of the transistor M1, the drain electrode 25 of the transistor M3, and the one electrode 24 of the capacitor Cvth are connected.

The electrode 75 is formed in a curved shape and is connected to the polycrystalline silicon layer 25 through a contact hole 56b penetrating through the interlayer insulating film 50 and the gate insulating film 30 to form a transistor M1. The drain electrode and the source electrode of the transistor M3 are formed, and are connected to the polycrystalline silicon layer 26 through the contact hole 57a to form the source electrode of the transistor M2. Accordingly, the electrode 75 becomes a node to which the drain electrode of the transistor M1, the source electrode of the transistor M3, and the source electrode of the transistor M2 are connected.

The electrode 76 has a square shape and is connected to the polysilicon layer 26 through a contact hole 57b penetrating through the interlayer insulating film 50 and the gate insulating film 30 to form a drain electrode of the transistor M2. And the anode electrode 85 of the display element OLED.

Although not shown in FIG. 5, a planarization film 80 is formed on the data line 71, the power supply lines 72 and 72 ′, and the electrodes 73, 74, 75, and 76, and is formed on the planarization film 80. An anode electrode 80 connected to the drain of the transistor M2 through the contact hole 57b is formed over approximately the entire pixel region. An organic light emitting layer 90 or the like is formed on the anode electrode 85 to form an organic EL element.

Thus, in the arrangement structure according to the embodiment of the present invention, by providing two scanning lines 42 and 44 for applying the same selection signal, the column direction is arranged in the pixel region in which pixel circuits operated by different selection signals are arranged. The number of wirings formed can be reduced. In this way, the pixel region can be more easily arranged.

As an embodiment of the present invention, the case in which one pixel circuit includes five transistors and two capacitors has been described. However, the present invention is not only a pixel circuit including five transistors and two capacitors, but also one pixel. All may be applied when the circuit is operated based on two or more selection signals. That is, the scope of the present invention is not limited to the same structure as the embodiment, and various modifications and improvements of those skilled in the art using the basic concept of the present invention defined in the claims also belong to the scope of the present invention.

According to the present invention, the number of wirings formed in the column direction can be reduced by providing two scanning lines for applying the selection signal in the pixels operated by different selection signals. In particular, when the pixel circuit is driven by a plurality of devices, each device may be disposed in the pixel area more efficiently and easily without reducing the light emitting area.

On the other hand, even in a pixel operated by one selection signal, when the pixel region is arranged long in the column direction, branch branches of the scan lines formed in the column direction can be reduced by forming a plurality of scan lines that transmit the same selection signal. Therefore, the driving elements can be easily arranged even with a narrow width in the column direction.

Claims (12)

A plurality of scan lines extending in a first direction and including first and second scan lines transmitting first and second selection signals, the plurality of data insulated from and intersecting the scan lines, extending in a second direction, and transmitting a data signal A light emitting display device for displaying an image on a display panel in which a plurality of pixel circuits connected to a line, the scan line, and the data line are arranged in a matrix form. Each of the pixel circuits, A first transistor operating in response to the first selection signal; And A second transistor operating in response to the second selection signal, Each of the scan lines, First sub-scanning line; And A second sub-scanning line applying the same selection signal as the first sub-scanning line, The control electrode of the first transistor is electrically connected to the second sub scan line of the first scan line, The control electrode of the second transistor is electrically connected to the first sub scan line of the second scan line. The method of claim 1, The pixel circuit And a third transistor configured to operate in response to the first selection signal. The method of claim 2, The control electrode of the third transistor is electrically connected to the first sub scan line of the first scan line. The method of claim 3, The second sub scan line of the first scan line is closer to the first sub scan line of the second scan line than the first sub scan line of the first scan line. The method of claim 1, And the second transistor is configured to output the data signal to another main electrode in response to a selection signal of one main electrode electrically connected to the data line and applied to a control electrode. The method of claim 5, Each of the pixel circuits A fourth transistor having a control electrode, a first electrode, and a second electrode and outputting a current corresponding to a voltage difference between the control electrode and the first electrode to a second electrode; A light emitting device emitting light in response to a current output from the second electrode of the fourth transistor; A first capacitor having one electrode connected to the control electrode of the fourth transistor; And And a second capacitor having one electrode electrically connected to the first electrode of the fourth transistor and the other electrode electrically connected to the other electrode of the first capacitor. The method of claim 6, The first transistor is a transistor connected in parallel with the second capacitor, and the third transistor is a transistor for diode-connecting the fourth transistor. In the light emitting display device, A plurality of scan lines extending in a first direction and transmitting a selection signal; A plurality of data lines insulated from and intersecting the scan lines and extending in a second direction and transferring data signals; A plurality of pixel circuits each connected to the scan line and the data line and arranged in a matrix; Each of the scan lines, First sub-scanning line; And a second sub-scanning line applying the same selection signal as the first sub-scanning line. In the light emitting display panel, A plurality of scan lines extending in a first direction and transmitting a selection signal; A plurality of sub-scanning lines extending in a first direction and disposed between two adjacent scanning lines and transmitting the same selection signal as any one of the two adjacent scanning lines; A plurality of data lines insulated from and intersecting the scan lines and extending in a second direction and transferring data signals; And And a plurality of pixel circuits connected to the scan line, the sub scan line, and the data line, respectively, and arranged in a matrix. The method of claim 9, And the scan lines are connected to two adjacent pixel circuits, respectively. The method of claim 9, The sub-scanning line is connected to two adjacent pixel circuits, respectively. The method of claim 9, And the sub-scanning line is branched from the scanning line for transmitting the same selection signal.

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