KR100567538B1 - Method of forming a conductive pattern in semiconductor device - Google Patents

Abstract

The present invention relates to a method of forming a conductive pattern of a semiconductor device, wherein a hard mask layer is formed of an oxide or nitride on a conductive material layer, and the hard mask layer is patterned by a photo process and an etching process to form a first hard mask layer pattern. And performing a trimming process using a low concentration wet chemical agent to etch all exposed portions of the first hard mask layer pattern to a predetermined thickness to form a second hard mask layer pattern having a desired width, and to form a second hard mask layer pattern. The conductive material layer may be patterned by an etching process to form a conductive pattern having a finer line width than the pattern that may be formed by the exposure apparatus.

Fine pattern, trimming process, hard mask

Description

Method of forming a conductive pattern in semiconductor device             

1A to 1E are cross-sectional views of devices for describing a method for forming a conductive pattern of a semiconductor device according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

11: substrate 12: conductive material layer

12P: Conductive Pattern 13: Hard Mask Layer

13A: first hard mask layer pattern 13B: second hard mask layer pattern

14: photoresist pattern

The present invention relates to a method of forming a conductive pattern of a semiconductor device, and more particularly to a method of forming a conductive pattern of a semiconductor device capable of forming a conductive pattern having a finer line width than a pattern that can be formed by exposure equipment.

In general, as semiconductor devices are highly integrated and miniaturized, the area occupied by each element constituting the semiconductor device is also reduced. In order to form an ultra-high integration device, a core process of the current semiconductor device manufacturing process is an exposure process for forming a fine pattern. At present, conductive lines such as word lines and bit lines of semiconductor devices have a circuit line width of about 0.2 μm but are already approaching 0.1 μm, and it will be required to form a circuit line width of 0.1 μm or less within a few years. By the way, it is difficult to define fine patterns of 0.1 micrometer or less with current exposure equipment. For example, KrF exposure equipment widely applied to the manufacturing process of semiconductor devices is used to trim photoresist without using a photoresist pattern formed by a photo process as an etching mask to form a word line of sub 0.14 μm. The photoresist trimming process is applied to form a line width of the photoresist pattern to 0.14 μm, followed by a patterning process to form a word line of 0.14 μm. The photoresist trimming process is a technique of forming a photoresist pattern having a desired fine line width by etching a thickness of a photoresist pattern with a plasma source composed of O ₂ / N ₂ / CF ₄ / Cl ₂ . However, in the plasma source composed of O ₂ / N ₂ / CF ₄ / Cl ₂ , an etch loading effect is severely generated depending on the density of the word lines to be formed, that is, the spacing between the word lines. This results in different CD bias and profile. This is because there is a word line having various widths and spaces in a single device, and thus there is a limit in that all word lines cannot be made to a desired width. In other words, in forming a plurality of fine patterns having different densities, the existing method cannot reproduce a desired fine pattern at a uniform width and an accurate position, and thus has difficulty in realizing high integration and miniaturization of semiconductor devices.

Accordingly, an object of the present invention is to provide a method for forming a conductive pattern of a semiconductor device capable of uniformly forming a conductive pattern having a finer line width than a pattern that can be formed by exposure equipment regardless of density.

According to an aspect of the present invention, there is provided a method of forming a conductive pattern of a semiconductor device, the method including forming a conductive material layer on a substrate; Forming a hard mask layer on the conductive material layer; Forming a photoresist pattern on the hard mask layer; Patterning the hard mask layer to form a first hard mask layer pattern having a first line width, and removing the photoresist pattern; Performing a hard mask wet etch trimming process to form a second hard mask layer pattern having a second line width narrower than the first line width; And forming a conductive pattern by patterning the conductive material layer using the second hard mask layer pattern as an etching mask.

In the above, the conductive material layer is formed in a single layer or a multilayer structure.

When the hard mask layer is formed of an oxide system, the trimming process is performed using an HF solution or a BOE solution, the HF solution uses a HF: H ₂ O of 1: 500, and the BOE solution is an HF: NH ₄ Use F: H ₂ O is 1: 7: 300.

Trimming process, when the hard mask layer is formed of a nitride system, and carried out using a solution of H ₃ PO _4, H ₃ PO ₄ H ₃ PO ₄ solution: was used as the 1: H ₂ O 3.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms, and the scope of the present invention is not limited to the embodiments described below. Only the present embodiment is provided to make the disclosure of the present invention complete, and to fully convey the scope of the invention to those skilled in the art, the scope of the present invention should be understood by the claims of the present application.

On the other hand, when a film is described as being "on" another film or semiconductor substrate, the film may exist in direct contact with the other film or semiconductor substrate, or a third film may be interposed therebetween. In addition, the thickness or size of each layer in the drawings may be exaggerated for convenience and clarity of description. Like numbers refer to like elements on the drawings.

1A to 1E are cross-sectional views of devices for describing a method for forming a conductive pattern of a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 1A, some elements constituting a semiconductor device such as an isolation layer and a well are formed, and a substrate 11 for forming a conductive pattern of a semiconductor device such as a word line, a bit line, and a metal wiring is provided. The conductive material layer 12 is formed on the substrate 11. The hard mask layer 13 is formed on the conductive material layer 12. The photoresist pattern 14 is formed on the hard mask layer 13.

In the above, the conductive material layer 12 is formed in a single layer or a multi-layer structure, for example, if the layer for forming a word line to form a gate insulating film on the surface of the substrate 11, polysilicon on the gate insulating film The layer, the tungsten nitride layer and the tungsten layer may be stacked, or the polysilicon layer and the metal silicide layer may be stacked, or may be formed of various materials. The hard mask layer 13 is formed of an oxide-based or nitride-based, and the thickness thereof may not be limited numerically because the thickness of the conductive material layer 12 may vary depending on what kind of material. . That is, since the hard mask layer 13 serves as an etching mask for patterning the conductive material layer 12 in a subsequent process, the hard mask layer 13 should be formed in consideration of the conductive material layer 12.

Referring to FIG. 1B, the hard mask layer 13 is patterned by an etching process using the photoresist pattern 14 as an etch mask to form a first hard mask layer pattern having a first line width equal to the line width of the photoresist pattern 14. It forms 13A. While the first hard mask layer pattern 13A is formed, the photoresist pattern 14 is also etched by a predetermined thickness.

Referring to FIG. 1C, the remaining photoresist pattern 14 is stripped, and contaminants generated during the etching process and the removal process are removed by a cleaning process.

Referring to FIG. 1D, a hard mask wet etch trimming process is performed to etch all exposed portions of the first hard mask layer pattern 13A by a predetermined thickness (indicated by arrows in the drawing). A second hard mask layer pattern 13B having a second line width is formed. The second line width is narrower than the first line width.

In the above, the trimming process is performed in two ways depending on the material of the hard mask layer 13. First, if the material forming the hard mask layer 13 is an oxide system, an HF solution or a BOE solution is used. In order to suppress the etch loading phenomenon due to the density and to form a conductive pattern at a desired width and a desired position in all regions, it is advantageous that the etching speed is slow, so that a low concentration of a wet chemical agent such as HF: H ₂ O Use a 1: 500 HF solution or a BOE solution with HF: NH ₄ F: H ₂ O 1: 7: 300. HF solution with HF: H ₂ O 1: 500 is etched to a thickness of about 6Å / min, BOE solution with HF: NH ₄ F: H ₂ O is 1: 7: 300, etched to about 50Åm / min Usually, since the etching ratio is well known, the second hard mask layer pattern 13B having a desired width can be obtained.

If the material forming the hard mask layer 13 is a nitride system, an H ₃ PO ₄ solution is used. In order to suppress the etch loading phenomenon due to the density and to form a conductive pattern in a desired width and a desired position in all regions, it is advantageous that the etching speed is slow, so that a low concentration of wet chemical agent, for example, H ₃ PO ₄ : H _A H ₃ PO ₄ solution with ₂ O 3: 1 is used. H ₃ PO ₄ : H ₃ PO ₄ solution with H ₂ O 3: 1 is typically used at a temperature of about 160 ° C. to a thickness of about 50 kPa / min. 2 hard mask layer patterns 13B can be obtained.

Referring to FIG. 1E, the conductive material layer 12 is patterned by an etching process using the second hard mask layer pattern 13B to form the conductive pattern 12P.

In the present invention described above, if the photoresist pattern 14 shown in FIG. 1A is formed with a minimum line width using an exposure apparatus currently used, the second hard mask layer pattern 13B shown in FIG. 1D is exposed. It becomes a line width that cannot be formed by equipment. That is, the KrF exposure equipment can also form a conductive pattern having a fine line width of 0.1 μm or less as well as a sub 0.14 μm.

As described above, in the present invention, the etching ratio of the hard mask layer is small when the hard mask layer pattern of the oxide system or the nitride system is etched by a trimming process using a low concentration of wet chemical agent so that the control of the CD bias is controlled. It is also easy to suppress the etch loading effect (etch loading effect) as much as possible, it is possible to form a conductive pattern of a finer line width than the pattern that can be formed by the exposure equipment at a predetermined position with a uniform line width regardless of the density .

Claims (8)

delete delete delete delete Forming a layer of conductive material on the substrate; Forming an oxide-based hard mask layer on the conductive material layer; Forming a photoresist pattern on the hard mask layer; Patterning the hard mask layer to form a first hard mask layer pattern having a first line width, and removing the photoresist pattern; Performing a hard mask wet etch trimming process using an HF solution or a BOE solution having HF to H ₂ O of 1 to 500 to form a second hard mask layer pattern having a second line width narrower than the first line width; And And patterning the conductive material layer using the second hard mask layer pattern as an etching mask to form a conductive pattern. The method of claim 5, wherein The BOE solution is a method of forming a conductive pattern of a semiconductor device using a HF: NH ₄ F: H ₂ O 1: 1: 300. Forming a layer of conductive material on the substrate; Forming a nitride-based hard mask layer on the conductive material layer; Forming a photoresist pattern on the hard mask layer; Patterning the hard mask layer to form a first hard mask layer pattern having a first line width, and removing the photoresist pattern; Performing a hard mask wet etch trimming process using an H ₃ PO ₄ solution to form a second hard mask layer pattern having a second line width narrower than the first line width; And And patterning the conductive material layer using the second hard mask layer pattern as an etching mask to form a conductive pattern. The method of claim 7, wherein The H ₃ PO ₄ solution is a method of forming a conductive pattern of a semiconductor device using a H ₃ PO ₄ : H ₂ O is 3: 1.

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