KR100533526B1 - Start up circuit - Google Patents

Abstract

A start-up circuit for smooth operation of a bias circuit for supplying a bias to a semiconductor chip or an analog circuit is disclosed. According to the start-up circuit of the present invention, a bias circuit such as a band gap reference circuit or the like is prevented from malfunctioning immediately after the power supply and shortens the time to reach a steady state. By this effect, the operation of the bias circuit employed in most electronic circuits and semiconductor chip circuits becomes more stable, and the operation reliability of the entire system or chip is increased. It also includes a function to stop the start-up circuit operation of the present invention in order to prevent the power consumption consumed in the start-up circuit when the steady state after the power is supplied to the bias circuit.

Description

Start up circuit {Start up circuit}

In the present invention, a bandgap reference circuit or other circuit that generates a bias voltage reduces start-up of a circuit that may occur when power is applied, and assists to generate a stable bias within a fast time after the power is applied. It relates to a start up circuit.

Today, as most electronic circuit systems become increasingly integrated, many circuits with many functions are integrated on a single chip. Among them, analog circuits inevitably require various DC biases due to their characteristics. The DC bias applied to today's analog circuits is rarely supplied from the outside of the chip, and there is a circuit that generates the DC bias inside the chip. Various circuits are used to generate DC bias, but among them, the band gap reference circuit is designed by circuit designers to provide relatively stable bias in spite of fluctuations in power supply voltage or temperature. I prefer.

On the other hand, when power is supplied to a bias generation circuit including a bandgap reference circuit, in particular a semiconductor chip or a system using a bias generation circuit using a transistor, the bias generation circuits are quickly in a steady state so that the circuit designer can perform a desired operation. It must enter the steady state and be ready to bias the analog circuits or other circuits.

However, when power is supplied to the bias circuits, the bias supply may not be completed quickly or the operation of the bias circuit itself may become opaque.

To prevent this, a so-called start up circuit is used to safely and quickly return to the normal state when power is supplied to the bias generation circuit.

Hereinafter, the operation of the band gap reference circuit and the start-up circuit will be briefly described with reference to the accompanying drawings.

FIG. 1 shows a representative bandgap reference voltage generator circuit among reference voltage generators widely used for supplying a bias to an electronic circuit. As is well known, the bandgap reference voltage generator is given its output voltage Vref as follows.

----- (One)

here, Is the voltage between the emitter-base of the bipolar transistor, Is a constant, Represents thermal voltage, respectively.

Voltage between base-emitter of bipolar transistor Is the voltage with the so-called negative temperature coefficient that decreases with increasing temperature, Since is a voltage with a so-called positive temperature coefficient which increases with increasing temperature, when the constant is properly selected, the temperature-dependent changes of these two voltages cancel each other out so that the output voltage Vref is not affected by the temperature change.

 A specific embodiment of the bandgap reference voltage generation circuit as described above is shown in FIG. 1. Referring to this, the basic operation of the bandgap reference voltage generator circuit is described as follows.

In addition to the action of two pairs of current mirrors (MN4, MN5 and MP6, MP8), the current through MP9 and MP10 is increased because the channel widths of the two transistors MP9 and MP10 are twice as large as those of MP11 and MP12. Is twice the current through MP11 and MP12. These currents pass through bipolar transistors Q1 and Q2 respectively.

Since transistor Q1 has both the base and collector grounded, the voltage between the emitter node and the base node is VEB1.

The voltage across resistor R2 -----(2)

Positive integer N here represents the emitter size ratio of bipolar transistors Q1 and Q2.

The currents Ia and Ib flowing across the resistors R2 and 2R1 are respectively , And the current I2 across R3 is equal to I1 and its value is Ia + Ib.

Therefore, the output voltage Vref of the band gap reference circuit is expressed as follows.

---- (3)

This confirms that the band gap reference circuit can operate as described above.

2 illustrates another embodiment of a band gap reference circuit. FIG. 2 adds several elements to the circuit of FIG. The added device is the same as the circuit shown in FIG. 1 except that the bandgap circuit is switched when it reaches stand by to minimize the DC power consumption of the bandgap circuit. The additional transistors MP51 to MP54, MN51, C51, and C52 have a characteristic that a switching signal is connected to the gate thereof. The switching signal dc_off is a signal transitioning to "HIGH" in the standby state, and dc_offb is a signal transitioning to "LOW" so that the added elements are properly switched. Among the additional devices, capacitors C51 and C52 are coupling capacitors connected between the bias nodes Vbiasu and Vbiasd and the supply voltage.

3 (a) and 3 (b) show a conventional start up circuit used by the applicant of the present invention. The conventional start-up circuit disclosed herein only means that it is designed by the applicants, but does not mean that the technology has been published. In FIG. 3A, the transistors MN20 and MN21 form a current mirror circuit, and the P-channel transistor MP21 is a circuit for distributing a power supply voltage and supplying current together with the MN21. The detailed operation of this circuit is as described later.

First, look at Figure 3 (a). When the power supply voltage VDD is applied to the circuit, current starts to flow from the power supply voltage VDD through the MP20. This current flows through MN20 to ground. As can be seen from the figure, since MN20 and MN21 form a current mirror circuit, a current of the same value also flows in MN21. The current flowing through MN21 is the current delivered from MP21. Node Vg22 between MP21 and MN21 in series is a properly divided voltage from the supply voltage. When the supply voltage begins to be supplied to the circuit, the voltage at the Vbiasu node follows the supply voltage to some extent and is weakly connected to the Va node due to the weak turn-on of the MN22 due to the voltage at the Vg22 node. Keep the voltage. When the supply voltage is fully settled, the Vbiasu voltage is electrically isolated from the Va node because the Vg22 voltage is set up to turn the MN22 off.

This completes the start-up function so that the voltage on the Vbiasu node no longer affects other circuits.

Since the circuit function of FIG. 3B is also the same as that of FIG. 3A, the description of the operation is omitted.

After the circuits of Figs. 1, 3 (a) and 3 (b) were connected to each other, simulations were performed using a computer. Referring to the simulation result shown in FIG. 4, the voltages of the bias nodes Vbiasu, Vbiasd, Va, and Vb by the conventional start-up circuit do not reach a steady state until about 2.5 usec after the power is applied. Able to know. As the time to reach a steady state becomes longer, the circuit supplied with the bias voltage must stay stand by, and the entire chip must also stand by. If the whole chip is operated during this time, it will not work as originally intended, or even if it is operated, it will not operate within the given specification. It also results in severe errors or significant blows to the entire system using chips with integrated bias circuits. Malfunctions in electronic systems that can cause serious damage to people or property can be caused by such small factors.

Accordingly, an object of the present invention is to provide a start-up circuit that is stabilized quickly after power supply to solve the above-mentioned problems.

Another object of the present invention is to provide a function of causing a bias generation circuit using the circuit of the present invention to supply the bias quickly after the power supply is started.

It is still another object of the present invention to provide a faster settling time for a startup circuit that stabilizes rapidly when a power is applied, a bias circuit using the same, and a chip or electronic system employing the bias circuit.

Another object of the present invention is to reduce the current consumption of the start-up circuit for operating the bias circuit to provide a bias circuit that operates more efficiently, as well as providing a circuit of the present invention. It also ensures the operation reliability of the chip to be employed.

In order to achieve the above object, the start-up circuit of the present invention comprises a plurality of MOS transistors connected in series from a power supply voltage node; A current mirror circuit having a series-connected MOS transistor and one branch connected thereto; a current supply transistor connected to another branch of the current mirror circuit to supply current; And drain nodes are connected to correspond to the plurality of gate nodes, respectively, to generate drain bias voltages. Each of the source nodes generates source bias voltages in a steady state, and gate nodes are commonly used in the other of the current mirror circuits. A plurality of parallel MOS transistors connected to the branch; It includes.

Preferably, the plurality of series-connected MOS transistors are connected to a diode element among the elements constituting the current mirror circuit.

The current supply transistor may consist of a P-channel transistor whose gate node is connected to ground and connected to the branch of the other side of the current mirror circuit to form an appropriate voltage distribution circuit together with the current mirror circuit.

Among the transistor elements constituting the current mirror circuit, a diode-connected element may additionally connect a capacitor to the gate thereof.

In order to achieve the above object, another start-up circuit according to the technical idea of the present invention comprises a plurality of MOS transistors connected in series from a power supply voltage node; A current mirror circuit having a series-connected MOS transistor and one branch connected thereto; a current supply transistor connected to another branch of the current mirror circuit to supply current; And drain nodes are connected to correspond to the plurality of gate nodes, respectively, to generate drain bias voltages. Each of the source nodes generates source bias voltages in a steady state, and gate nodes are commonly used in the other of the current mirror circuits. A plurality of parallel MOS transistors connected to the branch; The gate of the MOS transistor connected in parallel with the current mirror circuit includes elements that do not consume power in a stand by state.

Preferably, at the gate of the MOS transistor connected in parallel with the current mirror circuit, elements which do not consume power in stand-by are operated by a switching signal, which is in operation when the chip is in a steady state and in total. When the chip stays in a standby state, the switching takes place, which is a signal that induces a reduction in current consumption.

In order to fully understand the technical idea included in the present invention, reference should be made to the description of the exemplary embodiments of the present invention and the circuits and timing diagrams of the accompanying drawings.

Hereinafter, the present invention will be described in detail by explaining preferred embodiments of the present invention with reference to the accompanying drawings. It should be noted that the same reference numerals shown in each drawing are for indicating the same member or the same role.

5 is a view showing an embodiment of the present invention.

Referring to this, the start-up circuit of the present invention includes a plurality of P-channel MOS transistors MP30 and MP31 connected in series from a power supply voltage node; A current mirror circuit CM to which they are connected to one branch; A current supply transistor MP32 and a plurality of parallel MOS transistors MN32 and MN33 connected to the other branch of the current mirror circuit CM to supply current; And a capacitor C30 connected to one branch of the current mirror circuit.

Before powering up, the voltages at all nodes remain at ground. When the power supply is started, the voltage of the Vg30 node increases as the current begins to be supplied to one node of the current mirror Vg30 through two transistors MP30 and MP31 connected in series. The other node of the current mirror, Vg32, also begins to supply current by the current supply transistor MP32, and the voltage of the node begins to increase. At this time, the Vbiasu and Vbiasd nodes are connected to the circuit shown in FIG. 2 and increase with increasing power supply voltage. While the power supply voltage of Vg32 node is increased, MN32 and MN33 are weakly turned on by MP32 transistor, and Va, Vb, Vbiasu, and Vbiasd are weakly connected, respectively. It does not increase, making the bias circuit shown in FIG. 2 fully operational. This is because the voltages at the gate nodes of the current mirror of the bias circuit are Vbiasu and Vbiasd, so that the current mirror circuits MP1 to MP4 of FIG. 2 are operated in accordance with these voltage ranges.

When the power supply voltage is fully increased, the current mirror circuit is properly divided and lowered from the power supply voltage according to the current mirroring operation of the MN30 and MN31, so that the MN32 and MN33 are turned off. Va, Vb, Vbiasu and Vbiasd are electrically isolated from each other and no longer affect the operation of the bias circuit. Thus, the circuit of FIG. 5 functions as a so-called start-up circuit that ensures proper operation of the bias circuit only when a power supply voltage is applied to the entire circuit.

FIG. 6 is a diagram illustrating a computer simulation of the circuit operation of the present invention as described above. It can be seen that the stabilization time at which the bias voltages Vbiasu, Vbiasd, Va, Vb, and the like enter into a steady state is much shorter than that of the conventional case within approximately 1.5 usec.

The effect as described above is that the load end of the amplifier circuit (A1 in Figs. 1 and 2) of the bias circuit—in the specification of the bandgap reference circuit—is cascoded as shown in the figure (Fig. This is because the start-up circuit is composed of p-channel transistors connected in series to correspond to the cascode configuration, and Mp1 to Mp4 of FIG. 2, so that the most appropriate voltage can be supplied to the bias circuit in a timely manner.

7 illustrates another embodiment of the present invention. FIG. 7 further reduces the power consumption by additionally inserting elements to prevent DC current consumption in the start-up circuit when the entire chip is stand by, as shown in FIG. 2 and described above. It is. Additional devices are MN34, MN35 and Mp32, and the signal dc_off applied to their gates is switched to "High" when the entire chip enters standby or sleep mode to limit the current consumption of the start-up circuit. As a result, the operation of the current mirror CM is also stopped, and the MN32 and MN33 elements are " off, "

Although the present invention has been described with reference to two embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. will be. For example, it is also possible to configure the CMOS circuit of the present invention with a so-called complementary circuit that replaces the N-channel portion and the P-channel portion. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

According to the start-up circuit of the present invention described above, there is an effect of quickly reaching a steady state after the power supply voltage is applied.

Another effect of the present invention is that the bias voltage generating circuit, which will employ the start-up circuit of the present invention, generates a stable bias voltage in a faster time.

According to the circuit of the present invention, the start-up circuits are combined into one to reduce the current consumption as well as to minimize the current consumption when the chip is in the standby state.

One of the main effects of the present invention is that an electronic system or other electronic circuit system employing the circuit of the present invention is normalized within a shorter time after power is applied, thereby enabling a faster and more efficient use of the system.

1 is an example of a band gap reference circuit to which the circuit of the present invention may be applied.

2 is another example of a band gap reference circuit to which the circuit of the present invention may be applied.

3 is a conventional start-up circuit.

4 is a computer simulation result showing the function of a conventional start-up circuit.

5 is an embodiment of a start-up circuit of the present invention.

6 is a computer simulation result showing the function of the startup circuit of the present invention.

7 is another embodiment of the start-up circuit of the present invention.

* Description of the main symbols in the drawing

Vbiasu: Bias Voltage Vbiasd: Bias Voltage

Va: bias voltage Vb: bias voltage

CM: Current Mirror Vref: Reference Voltage

Mp32: current supply transistor dc_off: steady state switching signal

Claims (7)

A start-up circuit for assisting the operation of a circuit when a power supply voltage is applied to a circuit generating a bias, MOS transistors connected in series from the power supply node; A current mirror circuit having one branch connected to the series-connected MOS transistor; A current supply transistor connected to another branch of the current mirror circuit to supply current; And Parallel-connected MOS transistors having drain nodes connected correspondingly to gate nodes of the series-connected MOS transistors, and gate nodes commonly connected to the other branch of the current mirror circuit; Start-up circuit comprising a. The method of claim 1, A voltage at a gate node of the paralleled MOS transistors is determined by a voltage divide between the current mirror circuit and the current supply transistor. The method of claim 1, And said capacitor is connected to said one branch of said current mirror circuit of said current mirror circuit. The method of claim 1, The circuit which generates the bias is a band gap reference circuit. A pair of current mirror circuits; A pair of series MOS transistors connected to one branch of said current mirror circuit; A pair of parallel MOS transistors connected to the other branch of said current mirror circuit; And A current supply transistor coupled to said other branch of said current mirror circuit; And Start-up when power is applied to a bandgap reference circuit using bias voltages generated by the interaction of the current mirror circuit, the pair of series MOS transistor circuits, and the pair of parallel MOS transistors. up) Start-up circuit to assist the action. A start-up circuit according to claim 5, wherein a capacitor is attached to one side of the current mirror circuit. 6. The start-up circuit according to claim 1 or 5, wherein the start-up circuit further includes a switching element so as to minimize current consumption when in a standby state or a power saving state.