KR100512637B1 - Apparatus for display - Google Patents

Abstract

The present invention relates to a display device, and more particularly, to provide a display device capable of reducing cost loss due to the configuration and mounting of each driving chip for driving two or more display panels. A plurality of panels for performing different displays; A single driving chip for common driving the plurality of panels; And a connection unit which physically and electrically interconnects the plurality of panels and the driving chip.

Description

Display device {APPARATUS FOR DISPLAY}

The present invention relates to a display device, and more particularly, to a display device capable of driving a plurality of display panels through one driving unit.

The display device is a device for outputting input image information on a screen, and representative examples thereof include cathode ray tube (CRT), flat panel display (FPD), liquid crystal display (LCD). Or, as can be seen through the plasma display panel (PDP), a steady research and development has been made for the small size, light weight, large diameter.

Such a display device is used not only in the form of an enlarged TV, but also in the form of a small screen such as various portable terminals such as a mobile phone.

An example configuration of a module for configuring two display elements is shown in FIG.

Referring to FIG. 1, a conventional dual display module includes two panels 10a and 10b, driving chips 11a and 11b for driving each panel, panels 10a and 10b and a driving chip 11a, And connecting portions 12a and 12b for mounting and interconnecting 11b) and input / output interfaces 13a and 13b.

Here, the one panel 10a is larger than the other panel 10b as an example, which is a structure that is used in a cellular phone of a universal type used.

In order to drive the two display panels 10a and 10b in the conventional display device as described above, driving circuits are integrated in each panel and connected to each other through the connection parts 12a and 12b.

In the configuration of FIG. 1, if TCP is used as an example of the mounting technology of the connecting portions 12a and 12b (hereinafter, the connecting portions 12a and 12b are referred to as TCP), each driving chip 11a is applied to each of the TCPs 12a and 12b. 11b), each end of one end is pressed onto the display, and the other end is connected and driven by a central precessing unit (CPU) or a control chip called a host.

By the way, the two panels 10a and 10b are driven, but in the case of a clamshell which is a cellular phone structure that can be folded, only the panel visible from the outside when the two panels are folded (usually the small panel 10b) is driven and The panel (typically the large panel 10a) is not driven and operates in reverse when the cell phone is opened. On the other hand, when the phone is opened, the two panels may operate simultaneously.

As seen from the time axis, only one of the two driving integrated circuits is always driven, and the driving integrated circuits mounted on each of the two driving integrated circuits are configured to implement the same function when the display panels are the same.

Even if the display panel is not the same structure, for example, even if one side of the TFT (Thin Film Transiator) and the other side of the STN (Super Twisted Nematic) panel, each driving chip has the same function in terms of driving. do.

On the other hand, in the case of using a dual display panel in most clamshell cell phones, since the two display panels are structured with their backs, two driving integrated circuits are used, which can be said to be a great loss of mounting configuration cost.

The present invention proposed to solve the problems of the prior art as described above, an object of the present invention is to provide a display device that can reduce the cost loss due to the configuration and mounting of each driving chip for driving a plurality of display panels. .

The present invention to achieve the above object, a plurality of panels for performing different displays; A single driving chip for common driving the plurality of panels; And a connection unit which physically and electrically interconnects the plurality of panels and the driving chip.

The present invention is to configure a plurality of display elements at the same time, for example, when driving two display (dual display) panel, it is possible to drive two panels by using a single drive chip to improve the integration density and cost Savings can be achieved.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

2 is a plan view and a side view of a display device according to an embodiment of the present invention. Here, the display device having a dual display panel for a mobile phone is taken as an example.

FIG. 2A is a schematic plan view of the dual display device, and FIG. 2B is a schematic side view when the dual display device is folded.

Referring to FIG. 2A, a plurality of panels for performing different displays, for example, the first panel 20a and the second panel 20b and the first panel 20a and the second panel 20b. A single driving chip 21 for common driving, a connecting portion 22 for physically and electrically interconnecting the first panel 20a and the second panel 20b with the driving chip 21, and an input / output interface port. (I / O interface ports, 23).

Here, the connection unit 22 uses various types of mounting technologies such as a tape carrier package (TCP), a chip on film (COF), a chip on board (COB), or a chip on glass (COG).

In the display device of the present invention as described above, the first panel 20a is made larger than the second panel 20b in order to drive the dual panels 20a and 20b. In FIG. The first panel 20a and the second panel 20b are connected to each other in a planar manner, and (b) of FIG. 2 is a side view when the (a) of FIG. 2 is folded. As shown in FIG. 2, the driving chip 21 enters between the two panels 20a and 20b, and may be mounted in a “c” or “S” shape.

In addition, in FIG. 2B, the first panel 20a and the second panel 20b are in the form of holding each other, and show a shape when the cellular phone is folded.

3 is a plan view showing the arrangement of chips according to the mounting technology using TCP or COF.

3 (a) and 3 (b), the portion A connected to the first panel 20a and the portion B connected to the second panel 20b are fixed up and down in the plane, respectively. The driving chip 21 is also fixed in the same manner, and the input / output interface port 23 is changed to the right side or the lower side as shown by an arrow according to the shape of the connecting portion 22.

In order to drive a plurality of panels simultaneously or alternately, the above-described driving chip 21 is configured to separate components according to whether each panel is driven, and at this time, separately configured to be driven according to whether each panel is driven. Each internal component of the chip 21 may be controlled by an on-off switching operation.

In addition, the driving chip 21 is configured to share the respective components of the interior of each panel in accordance with whether or not to drive each panel in order to drive a plurality of panels simultaneously or alternately, the driving chip configured to share each panel Each internal component of 21 is controlled by the on-off switching operation of the path.

As described above, the components of the shared or separated driving chip 21 include a decoder, a voltage generator, a latch, and a memory.

4 is a block diagram showing an example of a driving chip in the display device of the present invention.

Referring to FIG. 4, the driving chip receives a command from an external host or a CPU to control the operation of each internal component, and the CPU interface controller 410 or an external port through an independent port. The panel controller 409 operating by the control signal, the memory unit 401 for storing all data to be displayed on the first and second panels, and the decoding unit output from the panel controller 409 to decode the memory unit ( And a decoder for selecting the corresponding address of 401.

Here, the decoder includes an X-address decoder 406 for selecting the X-address of the memory unit 401, a Y-address decoder 407 for selecting the Y-address of the memory unit 401, and an X-address. And a line address decoder 405 for transferring the corresponding data of the memory portion 401 selected by the decoder 406 and the Y-address decoder 407 to the latch portion 412.

In this case, the CPU interface control unit 410 accesses the data of the memory unit 401 through the X-address decoder 406 and the Y-address decoder 407, for example, in units of 8 bits or 16 bits. However, in the case of the line address decoder 405, when a pulse for latching data is generated from the timing controller 408, the data of the memory unit 401 to be latched by the latch unit 412 is accessed on a line-by-line basis. do.

The voltage generator 402 provides a power supply voltage for operating each panel, and the generated voltage can be supplied at each level corresponding to each panel driver. The latch portion 412 latches to display data provided from the line address decoder 405.

A plurality of panel drivers 403a and 403b for driving each panel and a switching unit 404 for controlling on-off of the panel drivers 403a and 403b are disposed, and independent of each panel. The register unit 411 is arranged to determine an operation (e.g., 4096 colors for the first panel, 256 colors for the second panel, or mono for the first panel, 65,000 colors for the second panel, etc.). .

That is, the register unit 411 has not only the color realization capability of each panel as described above, but also information for determining the operating conditions of each panel such as where to what address of each panel, voltage level, and the like. .

Accordingly, the timing controller 408 generates a type of pulse for informing each of the panels, for example, a decoding time and a latch time, for each panel to be driven independently by the information on the corresponding panel provided by the register 411. Let the action take place.

The voltage generator 402 includes a DC / DC booster that can be adjusted according to a panel selection, and a voltage converter that can adjust a value according to a panel selection register.

Here, the hatched portion is used when driving the first panel through, for example, the first panel driver 403a, and the remaining part or the whole part is used when driving the second panel through the second panel driver 403b. do. Thus, hatched portions are portions used in both panel 403a and 403b drivers.

That is, the decoders 405, 406, 407, the voltage generator 402, the latch unit 412, the memory unit 401, and the register unit 411 are used in common when the two panels are simultaneously or complementary in operation. .

When the driving of the first panel 403a or the second panel 403b is input through an external interface, the memory 401 area to be used by the control signal of the panel controller 409 and the line address decoder 405 and the panel driver ( Independent driving of each of the 403a and 403b, the DC / DC booster and the panels 411a and 411b is made possible.

The DC / DC booster of the voltage generator 402 is configured to adjust the booster clock frequency or reduce the transistor size of the booster when driving a relatively large panel among panels, and access according to panel display on / off. The output of the memory unit 401 and other address decoders enables partial access of the memory (to allow access to only the addresses of the memory unit 401 corresponding to each panel) to block unnecessary current consumption.

Here, each of the panel drivers 403a and 403b is separated. At this time, either of the displays is controlled to be off in accordance with the selection of a panel to be driven to reduce current consumption.

Here, when a circuit is configured using the memory 401, the memory can be shared at a time difference. In configuring such a circuit, a corresponding register is provided for driving setting conditions according to each panel size. The timing may be adjusted by adjusting the frequency of the DC / DC booster or the size of the configuration operation circuit by the command.

5 is a block diagram showing another example of a driving chip in the display device of the present invention.

Unlike in FIG. 4, the panel driver 413 is not divided for each panel but is shared by each panel through one panel driver 413, and each panel driver channel is controlled through the display path controller 413. The path out to the area of the panel driver 403 allocated for the panel operation can be selected.

That is, when the display path controller 413 controls the panel driver 403 to operate the corresponding panel, the panel driver 403 operates only the portion corresponding to the selected panel (for example, the hatched portion). Through the illustrated switching operation, a path leading to the panel drive pad may be selected to drive the panel.

Therefore, by sharing a panel driver having a larger size than other components, the configuration area can be further reduced as compared with the above-described embodiment.

As described above, for example, when driving a plurality of displays, a plurality of driving units and a plurality of connection units corresponding to each driving unit are conventionally used, but the present invention basically uses a plurality of driving units and a single driving chip. By driving the display panel, the embodiment has been found to reduce the construction area and reduce the cost.

In addition, a DC / DC booster is embedded in the driving circuit, in which a capacitor and a power stabilizing capacitor used in the booster are compared to the conventional method in which the driving chip is to be used in the driving chip. Significant component savings are possible, and while the prior art has to control each drive unit, that is, a drive chip, using a plurality of controllers corresponding to a plurality of panels, the present invention provides a plurality of drive chips (single controllers). It can be seen that the panel can be driven.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

According to the present invention, the mounting area of the display device for driving the plurality of display panels and parts can be reduced, and thus, an excellent effect of ultimately improving the price competitiveness of the device of the display can be expected.

1 is a view showing the configuration of a module for constituting two conventional display elements.

Figure 2 is a plan view and a side view showing a display device according to an embodiment of the present invention.

Figure 3 is a plan view showing the placement of the chip according to the mounting technology using TCP or COF.

4 is a block diagram showing an example of a driving chip in the display device of the present invention.

5 is a block diagram showing another example of a driving chip in the display device of the present invention.

Explanation of symbols on main parts of drawing

20a: first panel 20b: second panel

21: driving chip 22: connection

23: I / O interface port

Claims (9)

First and second panels separated independently from each other; A single driving chip integrated with a common driving circuit driving the first and second panels, respectively; And Single connection unit for physically and electrically interconnecting the first and second panels and the driving chip Display device comprising a. The method of claim 1, And the first panel and the second panel are disposed to face each other via the driving chip. The method of claim 1, The connection unit is any one of a tape carrier package (TCP), a chip on film (COF), a chip on board (COB), and a chip on glass (COG). The method of claim 1, The driving chip may include first and second drivers for driving the first and second panels, respectively, and a switching unit for switching the first and second drivers. The method of claim 1, The driving chip includes a single driver for driving the first and second panels, and a display for controlling a path leading to the drive pad of the selected panel so that the selected panel is operated through a switching operation. The display device further comprises a path control unit. The method of claim 4 or 5, wherein the driving chip, A CPU interface control unit for receiving a command from an external host or a central processing unit (CPU) to control each component inside the driving chip; A panel controller for controlling the panel by an external control signal through the CPU interface controller or an independent port; A memory unit for storing data to be displayed on the plurality of panels; X and Y address decoders for decoding an encoding signal output from the panel controller and selecting a corresponding address of the memory unit; A register unit for providing information on conditions for independent operation of each of the plurality of panels; A timing controller for controlling timing for enabling decoding, latching, and display time of data for the panel selected by the information provided from the register unit; A line address decoder for decoding an address of data of a corresponding panel in line units in response to an output of the timing controller; A latch unit for latching data of the memory unit corresponding to the decoded line unit address; And Voltage generator for supplying a power supply voltage for operating each panel Display device comprising a. The method of claim 6, The common driving circuit includes the X and Y address decoder, the line address decoder, the voltage generator, the latch unit, the memory unit and the register unit. The method of claim 6, The voltage generator includes a DC / DC booster and a voltage converter adjustable according to the selection of the panel. The method of claim 8, The DC / DC booster is configured to adjust a booster clock frequency or reduce a transistor size of a booster when driving a relatively large panel among the first and second panels, and accesses the memory according to panel display on / off. And an output of the address decoder to partially access the memory.