KR100486244B1 - Semiconductor device for initializing interfacing card with serial EEPROM and method thereof - Google Patents

Abstract

Disclosed are a semiconductor device and an initialization method for initializing an interface card using a serial Y pyrom. In the method of initializing a semiconductor device according to the present invention, a predetermined initialization information is stored in a serial-EEPROM (Electrically Erasable and Programmable ROM) and connected to each other by a system bus based on the initialization information. In the initialization method for initializing a semiconductor device having a serial Y-pirom interface unit and an interface unit, (a) the semiconductor device is reset in the reset state of the semiconductor device. Setting an operation channel for performing an automatic initialization of the serial YPIROM interface (b) after the reset of the semiconductor device is released, the initialization information stored in the serial YPIROM according to an operation channel set in the DM; (C) reading the initialized information through the interface unit; Initializing the semiconductor device by writing to a predetermined register; (d) generating an initialization end signal indicating that the initialization of the semiconductor device is completed by the DM; and (e) the interface unit after the initialization is completed. And the DM is automatically set to a ready state for normal operation.

Description

Semiconductor device for initializing interfacing card with serial EEPROM and method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device method for initializing an interface card using a serial EEPROM (Electrically Erasable and Programmable ROM).

Recently, in many semiconductor systems, a PCI bus or a CardBus PC Card (hereinafter referred to as a card bus PC card) is used for a chip-to-chip interface. PCI bus is a popular interface method for high speed data transfer. Card bus PC card is PCI bus because of limitation of transmission bandwidth of PCPCIA (Personal Computer Memory Card International Association) card. The interface method adopts the structure.

Many PCI cards, or card bus PC cards, perform most of the simple data processing with only a DSP (Digital Signal Processor) without a CPU.However, high speed data processing and efficient data management are required. On Chip).

In a PCI system, multiple PCI cards are connected on a PCI bus. There is a HOST / PCI bridge between the host system's CPU and the PCI bus, and several PCI cards can be connected on the connected PCI bus. The card bus PC card system may have a connection form similar to that of a PCI system.

Some PCI cards use a system-on-chip PCI interface chip with a built-in CPU. All PCI cards must be initialized with a predetermined configuration state in the internal PCI interface. The same is true for the card bus PC card.

1 is a register map showing the structure of a configuration register of a PCI card.

Referring to FIG. 1, the bit position of a register is indicated on the horizontal axis, and the address of the register is indicated on the vertical axis in hexadecimal. The register map of FIG. 1 includes registers for distinguishing each PCI card. Among the various registers, especially DEVICE ID, VENDOR ID, CLASS CODE, REVISION CODE, SUBSYSTEM ID, SUBSYSTEM VENDOR ID, etc., are used to distinguish PCI cards from the host CPU on the personal computer and to recognize the PCI cards for plug and play. Each card is information to be distinguished from each other. The VENDOR ID displays information about the number that represents the company that makes the system on chip for the interface on the PCI card. The DEVICE ID displays the number of the chip that the company that makes the chip uses to represent the chip. Indicates the type of chip installed on the card and REVISION CODE indicates the version of the chip. The SUBSYSTEM VENDOR ID indicates the company making the card on which the chip is mounted, and the SUBSYSTEM ID indicates the card number displayed by the company making the card. Among them, the DEVICE ID and VENDOR ID are unique information about the chip for the PCI interface, and are fixed by the chip manufacturer. However, since there may be several manufacturers of PCI cards equipped with chips, the manufacturer of the chip cannot fix CLASS CODE, REVISION CODE, SUBSYSTEM ID, SUBSYSTEM VENDOR ID, etc. , The REVISION CODE, SUBSYSTEM ID, and SUBSYSTEM VENDOR ID can be fixed. This configuration is similarly applied to the CardBus PC card.

Hereinafter, the CLASS CODE, REVISION CODE, SUBSYSTEM ID, and SUBSYSTEM VENDOR ID will be referred to as initialization information.

The Card Information Structure (CIS) in the CardBus PC Card system indicates certain information about the CardBus PC Card, which is distinguished from one manufacturer to another, and is not modified during the operation of the card. Are information.

 In order to read the CS information contained in the card bus PC card, the host CPU of the personal computer first reads the information in any one register of the register map of FIG. The host CPU analyzes this information to determine where the CS information is located on the card bus PC card, and reads all the CS information so that the card bus PC card can operate properly. However, if the CS information is not in the proper location, the host CPU does not know the information about the connected card such as which card is connected and what kind of card. Therefore, the connected card may not operate properly. This CS information also needs to be moved from its original location to another device with faster access time so that the host CPU can read it faster.

2 is a block diagram showing a conventional semiconductor device for initializing a PCI card or a card bus PC card.

The conventional semiconductor device 200 shown in FIG. 2 is a chip 200 mounted on a PCI card or a card bus PC card. The chip 200 includes a CPU 210, a memory controller 220, and an interface 230 connected therein by a system bus.

Conventionally, in order to initialize the PCI card, when the reset of the PCI card is released, the CPU 210 reads out initialization information contained in the external ROM 240 through the memory control unit 220 and then executes the interface unit 230. The interface unit 230 is initialized by storing it in a predetermined register. In the ROM 240, initialization information may be stored as a data form or a program form. In this case, the ROM 240 is required to initialize the PCI card, and there is a problem that it is difficult to modify a program for initialization information contained in the ROM 240.

As in the PCI card, the CPU 210 of the card bus PC card also reads initialization information contained in the external ROM 240 through the memory controller 220 when the card is reset. The interface unit 230 is initialized by storing in a predetermined register. In this case, the ROM 240 is necessary to initialize the card bus PC card, and there is a problem that it is difficult to modify the program for the initialization information contained in the ROM 240. In addition, unlike the PCI card, the card bus PC card requires more information to be stored in the CI.

3 is a block diagram showing another conventional semiconductor device for initializing a PCI card or a card bus PC card.

The conventional semiconductor device 300 illustrated in FIG. 3 is a chip 300 mounted on a PCI card or a card bus PC card. The chip 300 includes a memory controller 310 and an interface unit 320 connected therein by a system bus. The interface unit 320 includes a serial Y-pyrom interface 330 therein.

Unlike the semiconductor device 200 of FIG. 2, the conventional semiconductor device 300 of FIG. 3 has a serial Y pyrom 340 that stores only initialization information for initializing the interface unit 320 instead of the external ROM 240. Use only That is, after the reset is released, the serial Y pyrom interface 330 in the interface 320 automatically reads initialization information of the serial Y pyrom 340 and stores the initialization information in a predetermined register to initialize the interface 320. In this case, the CPU does not need to exist in the chip 300 inside the PCI card or the CardBus PC card. In the device driver of the host system, a program for operating a card through a system bus inside the chip 300 is downloaded to a volatile memory (not shown) such as an SRAM outside the chip 300. This is because it uses a method to operate.

When a program for operating the card is downloaded as described above and operated to operate the card, the initialization information of the card is stored in the serial Y pyrom 340, and when the reset is released, the serial in the interface unit 320 is released. EPIROM interface unit 330 to automatically read the initialization information.

However, this conventional initialization method does not use a serial Y pyrom interface unit (not shown) connected to the system bus separately, and initializes the card using the serial Y pyrom interface unit 330 made inside the interface unit 320. Is common. However, the method of initializing the card using the serial Y pyrom interface 330 made in the interface 320 may include one circuit having the same role as the serial Y pyrom interface unit (not shown) connected to the system bus. There exists a problem that the area of the interface unit 320 is further increased. In addition, a pin for interfacing with the serial Y pyrom 340 is additionally required at the interface 320. In addition, since the serial Y pyrom 340 is difficult to use except for storing the initialization information, the serial Y pyrom 340 cannot be efficiently used.

An object of the present invention is to provide a method of initializing a semiconductor device for initializing an interface card without increasing a circuit area.

Another object of the present invention is to provide a semiconductor device for initializing an interface card without increasing a circuit area.

In accordance with a first aspect of the present invention, there is provided a method for initializing a semiconductor device. The method may further include storing predetermined initialization information in a serial-EEPROM (Electrically Erasable and Programmable ROM). An initialization method for initializing a semiconductor device having a direct memory access (DMA) connected to each other by a system bus, a serial Y-pyrom interface unit and an interface unit, comprising: (a) the semiconductor; Setting an operating channel for the DM to perform an automatic initialization of the semiconductor device in the reset state of the device; (b) after the reset of the semiconductor device is released, the serial name according to the operating channel set to the DM. Reading the initialization information stored in the pyrom through the serial Y-pyrom interface unit, (c) Initializing the semiconductor device by writing the read initialization information into a predetermined register of the interface unit; (d) generating an initialization end signal indicating that the initialization of the semiconductor device is terminated by the DM; and (e) And after the initialization is completed, the interface unit and the DM are automatically set to a ready state for normal operation.

In accordance with a second aspect of the present invention, there is provided a method of initializing a semiconductor device, the predetermined information being initialized in a serial-EEPROM (Electrically Erasable and Programmable ROM) and information on a card bus PC card. Card Information Structure (CIS) information is stored and connected to each other by a system bus based on the initialization information and the CS information (DMA: Direct Memory Access (DMA). An initialization method for initializing a semiconductor device having a serial Y-pyrom interface, an interface, and a memory controller, wherein: (a) the DRAM automatically initializes the semiconductor device in a reset state of the semiconductor device; Setting an operating channel for performing the step (b) after the reset of the semiconductor device is released; Reading the initialization information stored in the serial Y pyrom through the serial Y pyrom interface unit according to an operation channel set in a DM; (c) writing the read initialization information into a predetermined register of the interface unit to write the semiconductor information; Initializing the device, (d) reading the CS information stored in the serial YPROM according to an operation channel set in the DM, determining whether the size of the CS information is 0, and then determining the size of the CS information. If is 0, proceed to step (e), and if the size of the CS information is not 0, writing the read CS information to an external memory, (e) the DM ends initialization of the semiconductor device Generating an initialization termination signal indicating that the operation has been completed; and (f) after the initialization is terminated. The interface unit and is characterized in that it comprises a step in which the DM this is automatically set to the ready state for normal operation.

In accordance with a third aspect of the present invention, there is provided a method for initializing a semiconductor device, the serial bus being mounted on a CardBus PC Card and mounted on the CardBus PC Card. EEPROM: Stores predetermined initialization information and CIS (Card Information Structure) information about the card bus PC card in an electrically erasable and programmable ROM (EEPROM) and stores the initialization information and the CS. An initialization method for initializing a semiconductor device having a DM (Direct Memory Access, DMA), a serial YPIROM interface unit, an interface unit, and a memory control unit, each connected by a system bus, based on the information. (A) The die may automatically initialize the semiconductor device in the reset state of the semiconductor device. (B) reading the initialization information stored in the serial Y pyrom through the serial Y pyrom interface unit according to the operating channel set in the DM after the reset of the semiconductor device is released. (C) initializing the semiconductor device by writing the read initialization information into a predetermined register of the interface unit; and (d) the CIS stored in the serial EPIROM according to an operation channel set in the DM. Reading information and writing the read CS information to a memory mounted on the card bus PC card; (e) the DM generating an initialization end signal informing that the initialization of the semiconductor device has ended; (f) After the initialization is completed, the interface unit and the DM are automatically It characterized in that it comprises the step of setting to the ready state for normal operation.

In accordance with a fourth aspect of the present invention, there is provided a method for initializing a semiconductor device, which is mounted on a Peripheral Component Interconnect (PCI) card and serial-EEPROM (Electrically Erasable) mounted on the PCI card. and Programmable ROM) stores predetermined initialization information and information other than the initialization information, and is connected to each other by a system bus by means of the initialization information and information other than the initialization information. An initialization method for initializing a semiconductor device having a serial Y-pyrom interface, an interface, and a memory controller, wherein: (a) the DRAM automatically initializes the semiconductor device in a reset state of the semiconductor device; Setting an operating channel for performing the step (b) after the reset of the semiconductor device is released; Reading the initialization information stored in the serial Y pyrom through the serial Y pyrom interface unit according to an operation channel set in a DM; (c) writing the read initialization information into a predetermined register of the interface unit to write the semiconductor information; Initializing a device, (d) reading information other than the initialization information stored in the serial YPROM according to an operation channel set in the DM, and writing the read information to a memory mounted in the PCI card (e) the DM generating an initialization end signal indicating that the initialization of the semiconductor device is completed; and (f) the interface unit and the DM are automatically ready for normal operation after the initialization is completed. Characterized in that it comprises a step set to.

In accordance with another aspect of the present invention, there is provided a semiconductor device including a central processing unit (CPU), a direct memory access (DMA), a reset controller, a serial Y pyrom interface, and It is characterized by including an interface unit.

The central processing unit is turned off in response to the predetermined initialization control signal and turned on in response to the predetermined initialization end signal. The reset controller generates the initialization control signal to turn on the initialization operation of the DM and to turn off the central processing unit in response to a reset signal, and is reset in response to the initialization end signal.

The serial Y pyrom interface unit is controlled by the DM to interface predetermined initialization information from an external serial Y pyrom. An interface unit is controlled by the DM so that the initialization information is received from the serial Y-pyrom interface unit and stored in an internal register. The DM may perform an initialization operation using the predetermined initialization information in response to the initialization control signal in a reset state, and generate the initialization end signal for performing a normal operation after the release of the reset.

In accordance with another aspect of the present invention, there is provided a semiconductor device including a central processing unit (CPU), a direct memory access (DMA), a reset controller, a serial YPIROM interface, And an interface unit and a memory control unit.

The central processing unit is turned off in response to the predetermined initialization control signal and turned on in response to the predetermined initialization end signal. The reset controller generates the initialization control signal to turn on the initialization operation of the DM and to turn off the central processing unit in response to a reset signal, and is reset in response to the initialization end signal.

The serial IFROM interface unit is controlled by the DM to interface predetermined initialization information and information other than the initialization information from an external serial EPROM. An interface unit is controlled by the DM so that the initialization information is received from the serial Y-pyrom interface unit and stored in an internal register. The memory controller is controlled by the DM to read information other than the initialization information from the serial Y-pyrom interface and to store it in an external memory. The DM performs an initialization operation using the predetermined initialization information and information other than the initialization information in response to the initialization control signal in a reset state, and generates the initialization end signal for performing a normal operation after the release of the reset. Characterized in that.

DETAILED DESCRIPTION In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings which illustrate preferred embodiments of the present invention and the contents described in the drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements.

4 is a flowchart illustrating a method of initializing a semiconductor device according to a first embodiment of the present invention.

Referring to FIG. 4, in the initialization method 400 of the semiconductor device according to the first embodiment of the present invention, predetermined initialization information is stored in a serial-EEPROM (Electrically Erasable and Programmable ROM) and the initialization information is stored. An initialization method for initializing a semiconductor device having a DM (Direct Memory Access, DMA) connected to each other by a system bus, a serial Y-pyrom interface unit, and an interface unit. Setting an operation channel for the DM to perform the automatic initialization of the semiconductor device in the reset state of the memory device (operation 410), and after the reset of the semiconductor device is released, the serial transfer may be performed according to the operation channel set to the DM. Reading the initialization information stored in the pyrom through the serial Y-pyrom interface unit (step 420). Initializing the semiconductor device by writing read initialization information to a predetermined register of the interface unit (step 430), and generating an initialization end signal indicating that the initialization of the semiconductor device is terminated by the DM (step 440). And after the initialization is completed, the interface unit and the DM are automatically set to a ready state for normal operation (step 450).

5 is a block diagram illustrating a semiconductor device in accordance with a first embodiment for achieving another technical problem of the present invention.

Referring to FIG. 5, the semiconductor device 510 according to the first embodiment of the present invention for achieving the above technical problem may include a central processing unit (CPU) 520 and a direct memory (DMA). Access 540, a reset control unit 530, a serial Y pyrom interface unit 550 and the interface unit 570 is characterized by.

The central processing unit 520 is turned off in response to the predetermined initialization control signal INIC and turned on in response to the predetermined initialization end signal INIDONE. The reset controller 530 generates an initialization control signal INIC for turning on the initialization operation of the DM 540 and turning off the CPU 520 in response to the reset signal RESET. INIDONE).

The serial Y pyrom interface 550 is controlled by the DM 540 to interface predetermined initialization information INIFORM from the external serial Y pyrom 560. The interface unit 570 is controlled by the DM 540 to receive the initialization information INIFORM from the serial EPI interface unit 550 and store the initialization information INIFORM in an internal register. The DM 540 performs an initialization operation using the predetermined initialization information INIFORM in response to the initialization control signal INIC in the reset state, and performs an initialization end signal INIDONE for performing a normal operation after the reset is released. Characterized in that generates.

Hereinafter, a method for initializing a semiconductor device and a semiconductor device for initialization according to the present invention will be described in detail with reference to FIGS. 4 and 5.

The semiconductor device 510 of the PCI card 500 or the card bus PC card 500 includes a DM 540 serving as a master of a system bus and a serial YPIROM interface 570 serving as a bus target. The original DM 540 serves as a data transmission that reads data from any peripheral block and writes the data into any peripheral block. Therefore, when the predetermined address list is created in the DM 540, the DM 540 may read data from the serial Y pyrom interface unit 550 and transmit data to the interface unit 570. That is, in the reset state, the registers of the DM 540 are set to initial values related to initialization, and when the reset is released, the DM 540 is operated by the initial values.

In the reset state of the semiconductor device 510, the DM 540 sets an operation channel for performing initialization of the semiconductor device 510 (step 410).

The reset controller 530 generates an initialization control signal INIC for turning on the initialization operation of the DM 540 and turning off the CPU 520 in response to the reset signal RESET. The reset control unit 530 is reset in response to the initialization end signal INIDONE which will be described later.

The semiconductor device 510 is a System On Chip (SOC) mounted on a Peripheral Component Interconnect (PCI) card 500 or mounted on a CardBus PC Card 500.

In addition, the DM 540 that receives the initialization control signal INIC sets an operation channel for performing initialization of the semiconductor device 510. The operation channel of the DM 540 includes a start address in which the initialization information INIFORM is stored, a destination address for writing the initialization information INIFORM, and a size of the initialization information INIFORM to perform the initialization of the interface unit 570. It has a size address to store it. These addresses are stored in registers of the DM 540, and after the reset of the semiconductor device 510 is released, the DM 540 transmits initialization information INIFORM according to the address of the operation channel. That is, the DM 540 performs an initialization operation using predetermined initialization information INIFORM in response to the initialization control signal INIC in the reset state, and performs an initialization end signal INIDONE for performing a normal operation after the release of the reset. Will occur).

After the reset of the semiconductor device 510 is released, the initialization information INIFORM stored in the serial Y pyrom 560 is read out through the serial Y pyrom interface unit 550 according to an operation channel set in the DM 540. In this case, the initialization information INIFORM includes information about the manufacturer of the card on which the semiconductor device 510 is to be mounted and information about the type of the card on which the semiconductor device 510 is to be mounted.

The readout initialization information INIFORM is written to a predetermined register of the interface unit 570 to initialize the semiconductor device 510. (Step 430) This process is repeated and the initialization is completed. An initialization end signal INIDONE is generated to notify that the initialization of the semiconductor device 510 is completed (step 440).

After the initialization is finished, the interface unit 570 and the DM 540 are automatically set to a ready state for normal operation. (Step 450) That is, the CPU 520 is initialized generated in the DM 540. In response to the end signal INIDONE, it is turned on to start an operation, and the host system (not shown) recognizes the PCI card 500 or the card bus PC card 500.

The semiconductor device 510 or the initialization method 400 for the initialization of the interface card has various advantages over the case where the serial interface unit is provided in the conventional interface unit itself. First, during the initialization operation, the area of the DM 540 and the interface unit 570 is not required to be larger than that of the conventional art, and since only one serial Y pyrom interface unit 550 is required for the semiconductor device 510, the area is reduced.

In addition, in the conventional case, since the pin related to the series Y pyrom is difficult to share with other peripheral circuits, it should be separated. However, the present invention may use the series Y pyrom 560 without using the pin separately.

If there is no data path for the serial Y pyrom 560 to be read from the CPU 520 unless the serial Y pyrom interface unit 550 exists separately, the serial Y pyrom 560 may not be initialized except for the initialization of the interface unit 570. It can not be used for. However, in the present invention, since the serial Y pyrom interface unit 550 exists separately, other information stored in the serial Y pyrom 560 can be read by the CPU 520, so that the serial Y pyrom 560 can be used more efficiently. Can be.

6 is a flowchart illustrating a method of initializing a semiconductor device according to a second embodiment of the present invention.

Referring to FIG. 6, an initialization method 600 of a semiconductor device according to a second exemplary embodiment of the present invention may include a predetermined initialization information and a serial bus (EEPROM) in the serial bus and a card bus PC card. CIS (Card Information Structure, or CIS) information is stored and connected to each other by a system bus based on initialization information and CS information (DMA: Direct Memory Access (DMA). An initialization method of initializing a semiconductor device having a serial Y-pyrom interface, an interface, and a memory controller, wherein the DM performs an automatic initialization of the semiconductor device in a reset state of the semiconductor device. Setting an operation channel (step 610), and after the reset of the semiconductor device is released, Reading the initialization information stored in the serial Y pyrom through the serial Y pyrom interface unit according to a working channel (step 620), and writing the read initialization information into a predetermined register of the interface unit to initialize the semiconductor device. In step 630, the CS information stored in the serial YPIROM is read according to the operation channel set in the DM, and after determining whether the size of the CS information is 0, the size of the CS information is 0. In step 670, if the size of the CS information is not 0, writing the read CS information to an external memory (steps 640 to 660), and the DM notifies that the initialization of the semiconductor device is completed. Generating an initialization end signal (step 670) and the initialization is terminated It characterized in that it comprises the interface and the step (step 680) in which the DM this is automatically set to the ready state for normal operation.

FIG. 7 is a block diagram illustrating a semiconductor device according to another example embodiment of the inventive concept.

Referring to FIG. 7, a semiconductor device in accordance with a second embodiment of the present disclosure may include a central processing unit (CPU) 720 and a direct memory access (DMA) 740. ), A reset controller 730, a serial Y-pyrom interface 750, an interface 770, and a memory controller 780.

The central processing unit 720 is turned off in response to the predetermined initialization control signal INIC and turned on in response to the predetermined initialization end signal INIDONE. The reset control unit 730 generates the initialization control signal INIC for turning on the initialization operation of the DM 740 and turning off the CPU 720 in response to the reset signal RESET, and ending the initialization. It is reset in response to the signal INIDONE.

The serial Y pyrom interface unit 750 is controlled by the DM 740 to interface predetermined initialization information INIFORM and information other than the initialization information EXIFORM from the external serial Y pyrom 760. The interface unit 770 is controlled by the DM 740 to receive the initialization information INIFORM from the serial EPI interface unit 750 and to store the initialization information INIFORM in an internal register. The memory controller 780 is controlled by the DM 740 to read information other than the initialization information from the serial Y-pyrom interface 750 and store the information in the external memory 790. The DM 740 performs an initialization operation using predetermined initialization information INIFORM and information other than the initialization information EXIFORM in response to the initialization control signal INIC in the reset state, and performs normal operation after the release of the reset. And generating the initialization end signal (INIDONE) for performing.

Hereinafter, a method for initializing a semiconductor device and a semiconductor device for initialization according to the present invention will be described in detail with reference to FIGS. 6 and 7. The initialization method 600 of FIG. 6 is operated according to the same principle as the initialization method 400 of FIG. 4, and only the difference will be described since there is a difference only in the operating channel of the CS information and the DM 740. That is, detailed descriptions of steps 610 and 630 for initializing the semiconductor device 710 are omitted. The initialization operation of the semiconductor device 710 is performed in the first channel of the plurality of channels of the DM 740.

The initialization method 600 of FIG. 6 is a method applied to both a PCI card or a card bus PC card.

The semiconductor device 710 may be used by being mounted to the PCI card 700 or the card bus PC card 700 and used for either the PCI card 700 or the card bus PC card 700 by an external input pin. System-on-chip.

Since the serial Y pyrom 760 is accessed at a relatively slow speed, the CS information may be stored in the memory 790 external to the semiconductor device 710. This will give you fast access when reading the CS information from the host system. In this case, since there are a plurality of channels in the DM 740, one channel is set for the initialization operation of the semiconductor device 710, and another channel is configured to transfer the CS information to the memory 790. Can be. The memory 790 may be an example of SRAM as a nonvolatile memory. In addition, it is not determined where to store the CS information in the memory 790, and the size of the CS is also different for each card bus PC card, so the size cannot be determined. Use another channel initialization method.

In more detail, the DM 740 has a plurality of operating channels for performing initialization. The first channel (channel 1) of the plurality of operating channels is for writing the source address and the initialization information (INIFORM) in which the initialization information (INIFORM) is stored to perform the initialization of the interface unit 770. And a transfer count for storing the address and the size of the initialization information (INIFORM).

The second channel (channel 2) of the plurality of operation channels is the destination address and size for initializing the address value of the start address where the CS information is stored and the destination address and size address of the predetermined third channel (channel 3). Have an address.

The third channel (channel 3) of the plurality of operation channels has a start address where the CS information is stored, a destination address for writing the CS information, and a size address for storing the size of the CS information.

Except for the destination address for writing the CS information of the third channel and the size address for storing the size of the CS information, the rest is operated as a reset value of the DM 740. Since all three channels read data from the serial Y pyrom 760, the starting addresses are all of the serial Y pyrom interface 750. The destination address of the first channel is a predetermined register of the interface unit 770 and the destination address of the second channel is an address value of a predetermined register of the third channel of the DM 740. The size address of the first channel and the second channel may be determined in advance by the size of the initialization information INIFORM and the address values of the destination address and the size address of the third channel.

The operation of the DM 740 will be described. By the operation of the second channel of the DM 740, the third channel is initialized by reading the destination address for storing the CS information and the size address for storing the size of the CS information from the serial EPIROM 760. In operation 640, the DM 740 determines whether the size of the CS information is 0. In operation 650, if the size of the CS information is not 0, the serial information is determined by the operation of the third channel of the DM 740. The CS information is read from the pyrom 760 through the serial YPIROM interface 750 and stored in the memory 790 through the memory controller 780 (step 660). Controlled by 740, the CS information is read from the serial YPIROM interface 750 and stored in an external memory 790. In this case, the semiconductor device 710 is set to be mounted on the card bus PC card 700 by adjusting external pins.

If the size of the CS information is 0, the DM 740 generates an initialization end signal INIDONE indicating that the initialization of the semiconductor device 710 is finished. Alternatively, when all the CS information is stored in the memory 790, the DM 740 generates an initialization end signal INIDONE.

After the initialization is completed, the interface unit 770 and the DM 740 are automatically set to a ready state for normal operation. (Step 680) That is, the CPU 720 is initialized generated in the DM 740 In response to the end signal INIDONE, it is turned on to start an operation, and the host system (not shown) recognizes the PCI card 700 or the card bus PC card 700.

In the initialization method 600 of FIG. 6, a card on which the semiconductor device 710 is mounted means a PCI card if the size of the CS information is 0, and a card bus PC card if the size of the CS information is not 0. Therefore, steps 640 to 660 may be omitted in the PCI card.

In addition, when the semiconductor device 710 of FIG. 7 is mounted on a PCI card, steps 640 to 660 are not omitted, and information other than the initialization information INIFORM on the serial YPIROM 760 is used instead of the initialization information INIFORM. The semiconductor device 710 may be initialized in the same manner as the initialization method 600 of FIG. 6 by storing.

8 is a flowchart illustrating a method of initializing a semiconductor device according to a third embodiment of the present invention.

Referring to FIG. 8, a method 800 of initializing a semiconductor device according to a third embodiment of the present invention for achieving the above technical problem is mounted on a CardBus PC Card, and the CardBus PC card. In the serial-EEPROM (Electrically Erasable and Programmable ROM) installed in the terminal, predetermined initialization information and CIS (Card Information Structure) information about the card bus PC card are referred to. A DM (Direct Memory Access, DMA), a serial YPIROM interface unit, an interface unit, and a memory control unit, each of which is stored and connected to each other by a system bus based on the initialization information and the CS information. An initialization method of initializing a semiconductor device, wherein the DM is performed in the reset state of the semiconductor device. And a step of setting values of operating channel for performing automatically the initialization (step 810),

The initialization method 800 of FIG. 8 is compared with the initialization method 600 of FIG. 6, except that the semiconductor device is applied only when the semiconductor device is mounted on a card bus PC card. It works on the same principle. Therefore, only the step 650 of the initialization method 600 of FIG. 6, which determines whether the information of the CS is present, is excluded, and thus the detailed description thereof will be omitted.

After the reset of the semiconductor device is released, the initialization information stored in the serial Y pyrom is read through the serial Y pyrom interface unit according to an operation channel set in the DM (step 820). The first channel is operated. The semiconductor device is initialized by writing the read initialization information to a predetermined register of the interface unit. Step 830 reads the CSI information stored in the serial EPIROM according to an operation channel set in the DM, and The read CS information is written to a memory installed in the card bus PC card. (Steps 840 and 850) [0046] The operations of steps 840 and 850 will be described in detail. The third channel is initialized by reading a destination address for storing the CS information and a size address for storing the size of the CS information from the PROM (step 840). Reads the CS information from the Y-Pyrom through the serial Y-Pyrom interface unit, and The memory is stored in the memory through the fisherman (step 850). The DM generates an initialization end signal indicating that the initialization of the semiconductor device is completed. (Step 860) After the initialization is completed, the interface unit and the DM Is automatically set to the ready state for normal operation (step 870).

9 is a flowchart illustrating a method of initializing a semiconductor device according to a fourth embodiment of the present invention.

Referring to FIG. 9, the method 900 of initializing a semiconductor device according to the fourth exemplary embodiment of the present invention for achieving the technical problem is mounted on a PCI component (Peripheral Component Interconnect) and serially mounted on the PCI card. A DM is stored in a serial-EEPROM (Electrically Erasable and Programmable ROM), and stores predetermined initialization information and information other than the initialization information, and connected to each other by a system bus by information other than the initialization information and the initialization information. (DMA: Direct Memory Access, hereinafter referred to as DM). An initialization method for initializing a semiconductor device including a serial Y-pyrom interface unit, an interface unit, and a memory control unit. First, the DM device is reset in a reset state of the semiconductor device. A establishes an operation channel for performing automatic initialization of the semiconductor device (step 910).

9 is the same principle as the initialization method 600 of FIG. 6 except that the initialization method 900 of FIG. 9 is applied only when the semiconductor device is mounted on a PCI card. It is operated by. Therefore, the information EXIFORM other than the initialization information INIFORM for initializing the interface unit 770 of the semiconductor device 710 of FIG. 7 instead of the CS information is stored in the serial EPI 760 and the DM 740 is stored. By the operation of the second and third channels, information EXIFORM other than the initialization information is read and stored in the memory 790. Except for these differences, other operation steps are the same, and thus detailed descriptions are omitted.

After the reset of the semiconductor device is released, the initialization information stored in the serial Y pyrom is read through the serial Y pyrom interface unit according to an operation channel set in the DM (step 920). The first channel is operated. The semiconductor device is initialized by writing the read initialization information to a predetermined register of the interface unit (step 930). The information other than the initialization information stored in the serial EPIROM is read according to the operation channel set in the DM. The read information is written to a memory mounted in the PCI card (steps 940 and 950). The operations of steps 940 and 950 will be described in detail. The third channel is initialized by reading the destination address where information other than the initialization information is stored and the size address storing the size of the information other than the initialization information. (Step 940) by operation of the third channel of the DM. Read information other than the initialization information from the serial Y pyrom through the serial Y pyrom interface unit, and The memory is stored in the memory through the memory controller (Step 950). The DM generates an initialization end signal indicating that the initialization of the semiconductor device is completed. (Step 960) After the initialization is completed, the interface unit and the DM A is automatically set to the ready state for normal operation (step 970).

As described above, optimal embodiments have been disclosed in the drawings and the specification. Although specific terms have been used herein, they are used only for the purpose of describing the present invention and are not intended to limit the scope of the invention as defined in the claims or the claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

As described above, a semiconductor device and an initialization method for initializing an interface card according to the present invention require no ROM as compared to a semiconductor device storing and initializing initialization information in a conventional ROM. It can be downloaded for easy bug patch or upgrade.

Compared to the case where the conventional interface unit itself has a serial Y pyrom interface unit, the area of the circuit is not required because the area of the DM and the interface unit is not required in the initialization operation. This saves and reduces the number of pins associated with serial EP.

In addition, there is an advantage in that the serial Ypirom can store the CS or other information other than the initialization information and read other information stored in the serial Ypirom if necessary, so that the serial Ypirom can be used more efficiently. .

BRIEF DESCRIPTION OF THE DRAWINGS In order to better understand the drawings cited in the detailed description of the invention, a brief description of each drawing is provided.

1 is a register map showing the structure of a configuration register of a PCI card.

2 is a block diagram showing a conventional semiconductor device for initializing a PCI card or a card bus PC card.

3 is a block diagram showing another conventional semiconductor device for initializing a PCI card or a card bus PC card.

4 is a flowchart illustrating a method of initializing a semiconductor device according to a first embodiment of the present invention.

5 is a block diagram illustrating a semiconductor device in accordance with a first embodiment for achieving another technical problem of the present invention.

6 is a flowchart illustrating a method of initializing a semiconductor device according to a second embodiment of the present invention.

FIG. 7 is a block diagram illustrating a semiconductor device according to another example embodiment of the inventive concept.

8 is a flowchart illustrating a method of initializing a semiconductor device according to a third embodiment of the present invention.

9 is a flowchart illustrating a method of initializing a semiconductor device according to a fourth embodiment of the present invention.

Claims (31)

A predetermined initialization information is stored in a serial-EEPROM (Electrically Erasable and Programmable ROM), and is referred to as a direct memory access (DMA) DMA connected to each other by a system bus based on the initialization information. In the initialization method for initializing a semiconductor device having a serial Y pyrom interface unit and an interface unit, (a) setting an operation channel for the DM to perform automatic initialization of the semiconductor device in a reset state of the semiconductor device; (b) reading the initialization information stored in the serial Y pyrom through the serial Y pyrom interface unit according to an operation channel set in the DM after the reset of the semiconductor device is released; (c) initializing the semiconductor device by writing the read initialization information into a predetermined register of the interface unit; (d) the DM generating an initialization end signal informing that the initialization of the semiconductor device has ended; And and (e) automatically setting the interface unit and the DM to a ready state for normal operation after the initialization is completed. The method of claim 1, wherein the semiconductor device, A method for initializing a semiconductor device, characterized in that it is a System On Chip (SOC) mounted on a Peripheral Component Interconnect (PCI) card or mounted on a CardBus PC Card. The method of claim 1, wherein the initialization information, And information on a manufacturer of a card on which the semiconductor device is to be mounted, and information on a type of card on which the semiconductor device is to be mounted. The method of claim 1, wherein the operating channel of the DM And a start address in which the initialization information is stored, a destination address to write the initialization information, and a size address for storing the size of the initialization information to perform the initialization of the interface unit. In the serial-EEPROM (Electrically Erasable and Programmable ROM), the CIS (Card Information Structure) information, which is predetermined initialization information and information on the card bus PC card, is stored and initialized. According to the information and the CS information, a semiconductor device having a DM (Direct Memory Access, DMA) connected by a system bus, respectively, a serial Y pyrom interface unit, an interface unit and a memory controller In the initialization method to initialize, (a) setting an operation channel for the DM to perform automatic initialization of the semiconductor device in a reset state of the semiconductor device; (b) reading the initialization information stored in the serial Y pyrom through the serial Y pyrom interface unit according to an operation channel set in the DM after the reset of the semiconductor device is released; (c) initializing the semiconductor device by writing the read initialization information into a predetermined register of the interface unit; (d) reading the CS information stored in the serial YPROM according to the operation channel set in the DM, determining whether the size of the CS information is 0, and if the size of the CS information is 0 (e) Proceeding to the step, if the size of the CS information is not 0, writing the read CS information to an external memory; (e) the DM generating an initialization end signal informing that the initialization of the semiconductor device has ended; And and (f) automatically setting the interface unit and the DM to a ready state for normal operation after the initialization is completed. The method of claim 5, wherein the DM is, A plurality of operating channels for performing the automatic initialization; A first channel of the plurality of operation channels includes a start address at which the initialization information is stored, a destination address for writing the initialization information, and a size address for storing the size of the initialization information to perform initialization of the interface unit. and, A second channel of the plurality of operation channels has a start address in which the CS information is stored and a destination address and a size address for initializing address values of a destination address and a size address of a predetermined third channel. The third channel of the plurality of operation channels may include a start address at which the CS information is stored, a destination address for writing the CS information, and a size address for storing the size of the CS information. An initialization method of a semiconductor device. The method of claim 6, wherein step (d) (d1) initializing the third channel by reading a destination address for storing the CS information and a size address for storing the size of the CS information from the serial EPIROM by operation of the second channel of the DM; step ; (d2) determining, by the DM, whether the size of the CS information is 0, and if 0, proceeding to the step (e); (d3) If the size of the CS information is not 0, the CS information is read from the serial Y pyrom through the serial Y pyrom interface unit by operation of the third channel of the DM, and is read into the memory through the memory controller. And storing the semiconductor device. The method of claim 5, wherein the initialization information, And information on a manufacturer of a card on which the semiconductor device is to be mounted, and information on a type of card on which the semiconductor device is to be mounted. The semiconductor device of claim 5, wherein A semiconductor characterized by a System On Chip (SOC) which can be used as a PCI card or a card bus PC card, and is set to be used as either a PCI card or a card bus PC card by an external input pin. How to initialize your device. The method of claim 5, wherein the memory, A nonvolatile memory, the initialization method of a semiconductor device. It is mounted on a CardBus PC Card, and is provided with initialization information and information about the CardBus PC card in a serial-EEPROM (Electrically Erasable and Programmable ROM) mounted on the CardBus PC Card. The CIS (Card Information Structure, or CIS) stores information and is connected to each other by a system bus based on the initialization information and the CS information (DMA: Direct Memory Access (DMA). In the initialization method of initializing a semiconductor device including a serial Y-pyrom interface unit, an interface unit, and a memory control unit, (a) setting an operation channel for the DM to perform automatic initialization of the semiconductor device in a reset state of the semiconductor device; (b) reading the initialization information stored in the serial Y pyrom through the serial Y pyrom interface unit according to an operation channel set in the DM after the reset of the semiconductor device is released; (c) initializing the semiconductor device by writing the read initialization information into a predetermined register of the interface unit; (d) reading the CS information stored in the serial EPIROM according to an operation channel set in the DM, and writing the read CS information to a memory mounted on the card bus PC card; (e) the DM generating an initialization end signal informing that the initialization of the semiconductor device has ended; And and (f) automatically setting the interface unit and the DM to a ready state for normal operation after the initialization is completed. The method of claim 11, wherein the DM, A plurality of operating channels for performing the automatic initialization; A first channel of the plurality of operation channels includes a start address at which the initialization information is stored, a destination address for writing the initialization information, and a size address for storing the size of the initialization information to perform initialization of the interface unit. and, A second channel of the plurality of operation channels has a start address in which the CS information is stored and a destination address and a size address for initializing address values of a destination address and a size address of a predetermined third channel. The third channel of the plurality of operation channels may include a start address at which the CS information is stored, a destination address for writing the CS information, and a size address for storing the size of the CS information. An initialization method of a semiconductor device. The method of claim 12, wherein step (d) (d1) initializing the third channel by reading a destination address for storing the CS information and a size address for storing the size of the CS information from the serial EPIROM by operation of the second channel of the DM; step ; (d2) reading the CS information from the serial Y-pyrom through the serial Y-pyrom interface by the operation of the third channel of the DM, and storing the CSI information in the memory through the memory controller; Initialization method of semiconductor device. The method of claim 11, wherein the initialization information, And information on a manufacturer of a card on which the semiconductor device is to be mounted, and information on a type of card on which the semiconductor device is to be mounted. The method of claim 11, wherein the memory, A nonvolatile memory, the initialization method of a semiconductor device. Mounted on a PCI Component (Peripheral Component Interconnect), and stores predetermined initialization information and information other than the initialization information in a serial-EEPROM (Electrically Erasable and Programmable ROM) mounted on the PCI card. According to the information other than the initialization information, there is provided a semiconductor device having a DM (Direct Memory Access, DMA), a serial YPIROM interface unit, an interface unit, and a memory control unit, each connected by a system bus. In the initialization method to initialize, (a) setting an operation channel for the DM to perform automatic initialization of the semiconductor device in a reset state of the semiconductor device; (b) reading the initialization information stored in the serial Y pyrom through the serial Y pyrom interface unit according to an operation channel set in the DM after the reset of the semiconductor device is released; (c) initializing the semiconductor device by writing the read initialization information into a predetermined register of the interface unit; (d) reading information other than the initialization information stored in the serial EPIROM according to an operation channel set in the DM, and writing the read information into a memory mounted on the PCI card; (e) the DM generating an initialization end signal informing that the initialization of the semiconductor device has ended; And and (f) automatically setting the interface unit and the DM to a ready state for normal operation after the initialization is completed. The method of claim 16, wherein the DM It is provided with a plurality of operating channels to perform the automatic initialization, A first channel of the plurality of operation channels includes a start address at which the initialization information is stored, a destination address for writing the initialization information, and a size address for storing the size of the initialization information to perform initialization of the interface unit. and, The second channel of the plurality of operation channels has a start address in which information other than the initialization information is stored, and a destination address and a size address for initializing address values of a destination address and a size address of a predetermined third channel. , The third channel of the plurality of operation channels is a start address in which information other than the initialization information is stored, a destination address for writing information other than the initialization information, and a size address for storing the size of information other than the initialization information. And a method for initializing the semiconductor device. The method of claim 17, wherein step (d) (d1) reading the destination address to store information other than the initialization information and the size address storing the size of the information other than the initialization information from the serial EPIROM by the operation of the second channel of the DM; Initializing a channel; (d2) reading information other than the initialization information from the serial Y-pyrom via the serial Y-pyrom interface by the operation of the third channel of the DM, and storing the information other than the initialization information in the memory through the memory controller; An initialization method of a semiconductor device. The method of claim 16, wherein the initialization information, And information on a manufacturer of a card on which the semiconductor device is to be mounted, and information on a type of card on which the semiconductor device is to be mounted. The method of claim 16, wherein the memory, A nonvolatile memory, the initialization method of a semiconductor device. A central processing unit (CPU) which is turned off in response to a predetermined initialization control signal and turned on in response to a predetermined initialization end signal; Predetermined DM (Direct Memory Access); A reset controller configured to turn on the initialization operation of the DM in response to a reset signal and to generate the initialization control signal for turning off the central processing unit, and to reset in response to the initialization end signal; A serial Y pyrom interface unit controlled by the DM to interface predetermined initialization information from an external serial Y pyrom; An interface unit controlled by the DM to receive the initialization information from the serial Y-pyrom interface unit and to store the initialization information in an internal register; The DM is, And performing the initialization operation using the predetermined initialization information in response to the initialization control signal in the reset state, and generating the initialization end signal for performing a normal operation after the release of the reset.  The method of claim 21, wherein the semiconductor device, A semiconductor device, comprising: a System On Chip (SOC) mounted on a Peripheral Component Interconnect (PCI) card or mounted on a CardBus PC Card. The method of claim 21, wherein the initialization information, And information relating to the manufacturer of the card on which the semiconductor device is to be mounted, and information on the type of card on which the semiconductor device is to be mounted. The method of claim 21, wherein the DM is, And a start address in which the initialization information is stored, a destination address for writing the initialization information, and a size address for storing the size of the initialization information to perform initialization of the interface unit. A central processing unit (CPU) which is turned off in response to a predetermined initialization control signal and turned on in response to a predetermined initialization end signal; Predetermined DM (Direct Memory Access); A reset controller configured to turn on the initialization operation of the DM in response to a reset signal and to generate the initialization control signal for turning off the central processing unit, and to reset in response to the initialization end signal; A serial IFROM interface unit controlled by the DM to interface predetermined initialization information and information other than the initialization information from an external serial EPROM; An interface unit controlled by the DM to receive the initialization information from the serial IFROM interface unit and to store the initialization information in an internal register; A memory control unit controlled by the DM to read information other than the initialization information from the serial Y-pyrom interface unit and to store in an external memory; The DM is, In response to the initialization control signal in a reset state, performing an initialization operation by using the predetermined initialization information and information other than the initialization information, and generating the initialization end signal for performing a normal operation after the release of the reset. Semiconductor device.  The semiconductor device of claim 25, wherein the semiconductor device is System-on-a-chip (SOC) that can be used as a dual-sided Peripheral Component Interconnect (PCI) card or CardBus PC Card, and configured to be used for either PCI or CardBus PC cards by external input pins : System On Chip. The method of claim 25, wherein the initialization information, And information relating to the manufacturer of the card on which the semiconductor device is to be mounted, and information on the type of card on which the semiconductor device is to be mounted. The method of claim 25, wherein the DM A plurality of operating channels for performing the initialization, A first channel of the plurality of operation channels includes a start address at which the initialization information is stored, a destination address for writing the initialization information, and a size address for storing the size of the initialization information to perform initialization of the interface unit. and, The second channel of the plurality of operation channels has a start address in which information other than the initialization information is stored, and a destination address and a size address for initializing address values of a destination address and a size address of a predetermined third channel. , The third channel of the plurality of operation channels is a start address in which information other than the initialization information is stored, a destination address for writing information other than the initialization information, and a size address for storing the size of information other than the initialization information. A semiconductor device comprising a. The method of claim 28, wherein the DM Initialize the third channel by reading a destination address for storing information other than the initialization information and a size address for storing the size of information other than the initialization information from the serial EPIROM by operation of the second channel of the DM. and, If the size of the information other than the initialization information is not 0, information other than the initialization information is read out from the serial Y-pyrom through the serial Y-pyrom interface by the operation of the third channel of the DM, and the memory controller controls the information. And storing the memory in a memory. The method of claim 25, wherein the information other than the initialization information is If the card on which the semiconductor device is mounted is a CardBus PC Card, the semiconductor device is CIS (Card Information Structure) information which is information on the CardBus PC card. The method of claim 25, wherein the memory, A nonvolatile memory, characterized in that the semiconductor device.