KR100476396B1 - Silicon oxide film formation method of semiconductor device - Google Patents
Silicon oxide film formation method of semiconductor device Download PDFInfo
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- KR100476396B1 KR100476396B1 KR1019970075118A KR19970075118A KR100476396B1 KR 100476396 B1 KR100476396 B1 KR 100476396B1 KR 1019970075118 A KR1019970075118 A KR 1019970075118A KR 19970075118 A KR19970075118 A KR 19970075118A KR 100476396 B1 KR100476396 B1 KR 100476396B1
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- oxide film
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- silicon oxide
- semiconductor device
- single crystal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
Abstract
1. 청구 범위에 기재된 발명이 속한 기술 분야1. The technical field to which the invention described in the claims belongs
반도체 장치 제조 분야Semiconductor device manufacturing field
2. 발명이 해결하고자 하는 기술적 과제2. Technical problem to be solved by the invention
실리콘 기판과 실리콘산화막 계면에서 발생하여 문턱전압을 변화시키는 고정전하 및 계면포획전하를 감소할 수 있는 반도체 장치의 실리콘산화막 형성 방법을 제공한다.Provided is a method for forming a silicon oxide film of a semiconductor device capable of reducing a fixed charge and an interface trap charge generated at a silicon substrate and a silicon oxide film interface to change a threshold voltage.
3. 발명의 해결 방법의 요지3. Summary of the Solution of the Invention
실리콘 기판 상에 고정전하 및 계면포획전하를 포획하기 위한 영역을 포함한 단결정 실리콘막을 형성하고, 상기 단결정 실리콘막 상에 산화막을 성장하되, 상기 단결정 실리콘막까지 산화되도록 한다.A single crystal silicon film including a region for trapping fixed charge and interfacial trap charge is formed on the silicon substrate, and an oxide film is grown on the single crystal silicon film, and oxidized to the single crystal silicon film.
4. 발명의 중요한 용도4. Important uses of the invention
반도체 장치의 실리콘산화막 형성 방법에 이용됨Used in the method of forming a silicon oxide film of a semiconductor device
Description
본 발명은 일반적으로 반도체 장치 제조 방법에 관한 것으로, 특히 반도체 장치의 실리콘산화막(SiO2) 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a silicon oxide film (SiO 2 ) of a semiconductor device.
도1은 종래의 기술로 형성된 실리콘산화막을 나타내는 단면도이다. 종래의 실리콘산화막 형성 방법은 실리콘 기판(11)을 온도가 높은 산화 분위기(O2)에 노출하여 실리콘산화막을(12)을 형성하는 것으로 이루어진다. 미설명 도면부호 "13" 은 상기 실리콘산화막(12) 상에 형성된 다결정 실리콘막을 나타낸다.1 is a cross-sectional view showing a silicon oxide film formed by a conventional technique. The conventional silicon oxide film forming method consists of exposing the silicon substrate 11 to a high temperature oxidizing atmosphere (O 2 ) to form the
상기와 같은 방법으로 형성된 실리콘산화막(12)을 형성할 경우 실리콘 기판과 실리콘산화막 계면(Si-SiO2)에, 고정전하(Qf) 및 반도체의 결정 격자가 산화물 계면에서 갑자기 끊기면서 생기는 계면포획전하(interface trap charge, Qif)를 함유하고 있는 SiOx층(14)이 형성되게 된다. 상기 고정전하 및 계면포획전하의 밀도는 1010개/㎠으로서 이들 전하는 모스트랜지스터의 문턱전압을 변화시키는 문제점을 발생시킨다.In the case of forming the
상기 문제점을 해결하기 위하여 안출된 본 발명은 실리콘 기판과 실리콘산화막 계면에서 발생하여 문턱전압을 변화시키는 고정전하 및 계면포획전하를 감소할 수 있는 반도체 장치의 실리콘산화막 형성 방법을 제공하는데 그 목적이 있다.An object of the present invention is to provide a method for forming a silicon oxide film of a semiconductor device that can reduce the fixed charge and the interface trap charge generated at the interface between the silicon substrate and the silicon oxide film to change the threshold voltage. .
상기 목적을 달성하기 위한 본 발명은 반도체 장치의 실리콘산화막 형성 방법에 있어서, 실리콘 기판 상에 고정전하 및 계면포획전하를 포획하기 위한 영역을 포함한 단결정 실리콘막을 형성하는 단계; 및 상기 단결정 실리콘막 상에 산화막을 성장하되, 상기 단결정 실리콘막까지 산화되도록 하는 단계를 포함하여 이루어진다.According to an aspect of the present invention, there is provided a method of forming a silicon oxide film of a semiconductor device, the method comprising: forming a single crystal silicon film including a region for capturing a fixed charge and an interface trapping charge on a silicon substrate; And growing an oxide film on the single crystal silicon film, but oxidizing the oxide film to the single crystal silicon film.
본 발명은 실리콘산화막 형성으로 인한 고정전하 및 계면포획전하의 발생을 최소화하기 위하여 실리콘 기판 상에 얇은 단결정 실리콘막을 에피탁셜(epitaxial)하게 형성한 후 산화 공정을 실시하여 실리콘산화막을 형성한다.In order to minimize the generation of fixed and interfacial trap charges due to the formation of the silicon oxide film, the present invention forms a thin single crystal silicon film epitaxially on the silicon substrate and then performs an oxidation process to form the silicon oxide film.
이하, 첨부된 도면을 참조하여 본 발명의 일실시예를 설명한다.Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention.
도2a 내지 도2b는 본 발명의 일실시예에 따른 반도체 장치의 실리콘산화막 형성 방법을 도시한 단면도이다.2A through 2B are cross-sectional views illustrating a method of forming a silicon oxide film in a semiconductor device according to an embodiment of the present invention.
본 발명의 일실시예에 따는 반도체 장치의 실리콘산화막 형성 방법은 먼저, 도2a에 도시한 바와 같이 실리콘 기판(21) 상에 80 Å 두께의 단결정 실리콘막(22)을 에피탁셜하게 성장시킨다. 이때, 상기 단결정 실리콘 (22)막은 화학기상증착법을 이용하여 다음의 반응식과 같이 사염화실리콘 가스를 수소 가스와 반응시켜 성장시킨다.In the method for forming a silicon oxide film of a semiconductor device according to an embodiment of the present invention, first, as shown in FIG. 2A, an 80 실리콘 thick single
[반응식][Scheme]
SiCl4 + 2H2 → Si + 4HClSiCl 4 + 2H 2 → Si + 4HCl
여기서, 단결정 실리콘막 형성 초기에 상기 수소의 양을 많게 하여 상기 실리콘 기판과 에피탁셜하게 성장된 단결정 실리콘막의 계면에 수소가 3 % 이내로 과포화된 단결정실리콘 막(22 ')이 형성되도록 한다.Here, the amount of hydrogen is increased in the initial stage of the formation of the single crystal silicon film so that the single
다음으로, 도2b에 도시한 바와 같이 습식산화 공정으로 상기 단결정 실리콘막(22) 상에 175 Å 두께의 실리콘산화막(23)을 형성한다. 이때 상기 실리콘산화막 두께의 45%가 실리콘막으로 침식되면서 성장하기 때문에 상기 단결정 실리콘막은 모두 산화된다.Next, as shown in FIG. 2B, a 175 Å thick
도3은 상기와 같은 본 발명의 일실시예에 따라 실리콘산화막을 형성할 경우 고정전하 및 계면포획전하가 줄어드는 원리를 설명하기 위한 단면도이다.Figure 3 is a cross-sectional view for explaining the principle of reducing the fixed charge and the interface trap charge when forming a silicon oxide film according to an embodiment of the present invention as described above.
도3에 도시한 바와 같이 상기 실리콘산화막(23) 성장시 상기 단결정 실리콘막과 실리콘 기판 계면에 존재하는 수소 이온이 고정전하 및 계면포획전하를 포획(30)하게 되어 전하로서의 역할을 하지 못하도록 한다.As shown in FIG. 3, when the
이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the technical field of the present invention without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.
상기와 같이 이루어지는 본 발명은 실리콘 기판과 실리콘산화막의 계면에 존재하는 고정전하 및 계면포획전하 양을 줄일 수 있어서, 모스트랜지스터의 문턱전압 변화가 방지되어 모스트랜지스터의 특성을 향상시키는 것이 가능하다.According to the present invention as described above, the amount of fixed charge and interfacial trapping charge present at the interface between the silicon substrate and the silicon oxide film can be reduced, so that the threshold voltage change of the MOS transistor can be prevented, thereby improving the characteristics of the MOS transistor.
도1은 종래 기술에 따라 형성된 실리콘산화막을 나타내는 단면도1 is a cross-sectional view showing a silicon oxide film formed according to the prior art
도2a 및 2b는 본 발명의 일실시예에 따른 실리콘산화막 형성 공정 단면도2A and 2B are cross-sectional views of a silicon oxide film forming process according to an embodiment of the present invention.
도3은 발명에 따라 실리콘산화막을 형성할 경우 고정전하 및 계면포획전하가 줄어드는 원리를 설명하기 위한 단면도Figure 3 is a cross-sectional view for explaining the principle of reducing the fixed charge and the interface trapping charge when forming a silicon oxide film according to the invention
* 도면의 주요 부분에 대한 설명* Description of the main parts of the drawing
11, 21: 실리콘 기판 12, 23: 실리콘산화막11, 21:
13: 다결정 실리콘막 22: 단결정 실리콘막13: polycrystalline silicon film 22: single crystal silicon film
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US20230163022A1 (en) * | 2016-06-22 | 2023-05-25 | Globalwafers Co., Ltd. | High resistivity silicon-on-insulator substrate comprising an isolation region |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH0661252A (en) * | 1992-08-05 | 1994-03-04 | Mitsubishi Electric Corp | Semiconductor device and its manufacture |
KR950027905A (en) * | 1994-03-17 | 1995-10-18 | 김주용 | Dielectric Film Formation Method of Semiconductor Device |
KR960026374A (en) * | 1994-12-20 | 1996-07-22 | 김주용 | Silicon Substrate Oxidation Method |
KR100211538B1 (en) * | 1995-12-15 | 1999-08-02 | 김영환 | Method of forming gate insulation film |
KR100329143B1 (en) * | 1995-03-10 | 2002-11-01 | 가부시끼가이샤 도시바 | Semiconductor device manufacturing method |
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JPH0661252A (en) * | 1992-08-05 | 1994-03-04 | Mitsubishi Electric Corp | Semiconductor device and its manufacture |
KR950027905A (en) * | 1994-03-17 | 1995-10-18 | 김주용 | Dielectric Film Formation Method of Semiconductor Device |
KR960026374A (en) * | 1994-12-20 | 1996-07-22 | 김주용 | Silicon Substrate Oxidation Method |
KR100329143B1 (en) * | 1995-03-10 | 2002-11-01 | 가부시끼가이샤 도시바 | Semiconductor device manufacturing method |
KR100211538B1 (en) * | 1995-12-15 | 1999-08-02 | 김영환 | Method of forming gate insulation film |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US20230163022A1 (en) * | 2016-06-22 | 2023-05-25 | Globalwafers Co., Ltd. | High resistivity silicon-on-insulator substrate comprising an isolation region |
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