KR100472030B1 - Method of manufacturing for semiconductor device using emission intensity measurement of plasma and plasma processing system using the same - Google Patents

Abstract

In the process of manufacturing a semiconductor device, in order to minimize the variation of the critical dimension so that the etching target layer can be etched, a wafer substrate having an etching target layer and a pattern layer disposed with an arbitrary pattern density on the etching target layer is formed in the chamber. A semiconductor device manufacturing method comprising the steps of: forming a plasma in the chamber to etch the etching target layer, wherein during the process, the plasma etching time or RF power is adjusted according to the pattern density of the pattern layer. Etch the object to be etched.

Description

Method for manufacturing semiconductor device using plasma emission intensity measurement and plasma processing apparatus using this method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the manufacture of semiconductor devices, and more particularly, to a method for manufacturing a semiconductor device by measuring plasma emission intensity during plasma etching, and a plasma processing apparatus using the method.

In general, a semiconductor device manufacturing process includes an etching process for patterning a wiring (eg, a gate or a metal layer) or forming a contact hole. The conventional etching process is mainly performed by a wet method. Due to the problem of critical dimensions (CD) due to isotropic etching, dry etching using plasma is widely used.

The critical dimension corresponds to a width of a shape such as a photoresist layer formed with an arbitrary pattern on the target layer to be etched, and this threshold dimension is ideally maintained at a constant value regardless of before or after the etching process described above. It is required in the manufacturing process of the semiconductor device, because it is necessary to effectively form a number of devices having a fine structure on a semiconductor wafer having a constant area in accordance with the development of technology by the high integration / miniaturization of the semiconductor device is growing day by day.

However, in reality, the above-described critical dimension varies slightly depending on the before and after of the etching process due to various factors, wherein one factor for changing the critical dimension is formed on the semiconductor wafer during the plasma etching. Pattern Density (PD) of the pattern layer to be mentioned.

For example, when the pattern layer made of photoresist over a target layer (for example, a polysilicon layer) to be etched on a semiconductor wafer has the threshold dimension halved, compared to the case where the threshold dimension is disposed at, for example, 20% on the target layer. That is, when it is disposed on the target layer at 10%, the surface area exposed to the plasma atmosphere during the plasma etching process for the target layer is relatively smaller than the case of the 20%, and furthermore, in the wafer substrate disposed below the target layer. As the amount of reflected plasma ions increases, the etching proceeds beyond the degree of etching to be performed in the target layer, thereby increasing the threshold dimension, that is, the width of the final etched target layer is larger than the desired reference value. A smaller etching is achieved.

As described above, in the process of manufacturing a conventional semiconductor device, when the process requires dry etching, dry etching is performed without considering the degree to which the pattern layer for etching is disposed to some extent on the wafer substrate. Due to the final etching target layer is a problem that reduces the product characteristics of the semiconductor device.

Accordingly, the present invention has been made in view of the above-described problems, and an object of the present invention is to manufacture a semiconductor device in which an etching target layer can be formed with a good critical dimension regardless of the density of a pattern layer formed on a wafer substrate. In providing a method.

In addition, another object of the present invention is to provide a plasma processing apparatus capable of adjusting the plasma etching time according to the pattern density of a pattern layer formed on a wafer substrate when manufacturing a semiconductor device using plasma etching.

In order to realize the above object,

A method of manufacturing a semiconductor device comprising a step of disposing an etching target layer and a wafer substrate having a pattern layer disposed on the etching target layer with an arbitrary pattern density in a chamber, generating plasma in the chamber, and etching the etching target layer. ,

In the process, the etching target layer is etched by adjusting the plasma etching time or RF power according to the pattern density of the pattern layer.

In the manufacturing method, the adjustment of the plasma etching time or the RF power is preferably performed according to the emission intensity of the plasma measured during the etching process.

In addition, the present invention to realize the above object,

A chamber connected with a plasma generator;

A sensing unit for sensing the emission intensity of the plasma generated in the chamber; And

Control unit that adjusts the plasma etching time or RF power according to the electrical signal received from the detection unit and sends the electrical signal to the plasma generator accordingly

It provides a plasma processing apparatus comprising a.

In the apparatus, the sensing unit is preferably made of a PhotoMultiplier Tube (PMT).

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a schematic view showing a plasma processing apparatus according to an embodiment of the present invention, the plasma processing apparatus shown in the process of manufacturing a semiconductor device, when forming the patterning of the wiring, contact holes, etc. using plasma etching, Used.

As illustrated, the plasma processing apparatus includes a chamber 10 having an internal space having a predetermined size, and the chamber 10 includes a plasma having a predetermined emission intensity for plasma etching. Plasma generators for generating into are connected.

Here, the plasma generator includes upper and lower electrodes 12 and 14 disposed at random intervals in the chamber 10, and matchers 16 and 16 ′ connected to the electrodes 12 and 14. ) And high frequency power sources 18 and 18 '.

In this case, a wafer substrate 20 requiring plasma etching is mounted on the lower electrode 14, and the etching target layer 22 and a pattern having a predetermined pattern shape are mounted on the wafer substrate 20. Layer 24 is formed with a predetermined pattern density.

In the present invention, the plasma processing apparatus, in other words, irrespective of the pattern density of the pattern layer 24, the etching target layer 22 in a desired pattern, that is, the portion left to be etched has a constant width (CD; critical dimension) In order to be etched with the following measures are taken.

That is, the means according to the present invention, when the plasma 26 is generated in the chamber 10, by measuring the light emission intensity of the plasma 26 and etching by the plasma according to the measured value of the stepped intensity By adjusting the time or RF power, the last remaining portion of the etch target layer 22 is etched without changing the critical dimension.

To this end, in the present invention, in order to measure the emission intensity of the plasma 26, to measure the emission intensity of the plasma 16 through the view port (10a) formed in the chamber 10 outside the chamber (10) And a sensing unit 28, which is electrically connected to the matching unit 16, 16 'and the high frequency power source 18, 18' and is sent from the sensing unit 28. The plasma generator is electrically connected to the controller 30 which controls the plasma etching time or the RF power by the plasma generator according to the signal (a signal processed by converting the light energy according to the plasma emission intensity into electrical energy).

In the present embodiment, the sensing unit 28 is a photomultiplier tube (PMT) and the control unit 20 is provided as a management computer system of the plasma processing apparatus, but this is one according to the present invention. This is merely an example of, but is not necessarily limited to.

Accordingly, the plasma etching of the etching target layer 22 is performed using the plasma processing apparatus configured as described above.

First, in a state in which the pattern layer 24 is disposed on the etching target layer 22 with a pattern density of 20%, for example, plasma 26 is generated in the chamber 10 by the action of the plasma generator. When etching is performed on the target layer 22, the detector 28 measures the emission intensity of the plasma 26 through the view port 10a, converts the emission intensity into an electrical signal, and then converts it into an electrical signal. Will be sent).

Accordingly, the control unit 30 selects an etching time or RF power corresponding to the signal sent from the sensing unit 28, and converts the electrical signal according to the matcher 16, 16 ′ and the high frequency power source 18. 18 ') to generate the plasma according to the controlled etching time to adjust the etching target layer 22 to be etched.

In light of this one plasma treatment process, when the wafer substrate 20 formed with the pattern layer 24 at a pattern density of 10% is provided into the chamber 10, and the plasma etching is performed on the wafer substrate 20, the chamber The light emission intensity of the plasma 26 formed in the (10) becomes larger than the above case, which has a property that the light emission intensity of the plasma 26 is inversely proportional to the pattern density of the pattern layer 24. Because.

Accordingly, when the plasma 26 is etched according to the same etching time or RF power in a state where the emission intensity of the plasma 26 is larger than that described above (when the critical dimension is 20%), the etching target layer 22 is applied to the etching target layer 22. Over-etching may cause the width (critical dimension) of the remaining area to be smaller than the desired value.

In order to prevent this phenomenon, in the present invention, the etching time or the RF power is adjusted to achieve plasma etching of the etching target layer 22. That is, when the pattern density of the pattern layer 24 is low, the detector 28 also detects the emission intensity of the corresponding plasma 26 and transmits its electrical signal to the controller 30. In other words, the controller 30 selects a plasma etching time or RF power corresponding to the increased light emission intensity and transmits a signal corresponding thereto to the plasma generator. In the plasma generator, the etching target layer 22 may be etched according to the adjusted plasma etching time or RF power corresponding to the pattern layer 24 arranged with low pattern density. The etch target layer 22 can maintain the good remaining portion as desired as desired without over-etching.

As described above, the plasma processing apparatus automatically adjusts the plasma etching time or RF power according to the pattern density of the pattern layer formed on the wafer substrate with a predetermined pattern density to etch the etching target layer, thereby etching the target layer. This can be formed with a good critical dimension.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, it belongs to the range of.

As described above, according to the present invention, in the manufacturing process of the semiconductor device, the etching target layer is effectively etched in accordance with the pattern density of the pattern layer formed on the substrate with respect to the wafer substrate requiring plasma etching. To be manufactured.

1 is a schematic view of a semiconductor processing apparatus according to an embodiment of the present invention.

Claims (4)

A method of manufacturing a semiconductor device comprising a step of disposing an etching target layer and a wafer substrate having a pattern layer disposed on the etching target layer with an arbitrary pattern density in a chamber, generating plasma in the chamber, and etching the etching target layer. , In the process, the emission intensity of the plasma is changed according to the pattern density of the pattern layer, and the etching target layer is etched by adjusting the plasma etching time or RF power according to the measured emission intensity of the plasma. The manufacturing method of the semiconductor element. delete A chamber connected with a plasma generator; A sensing unit for sensing the emission intensity of the plasma generated in the chamber; And Control unit that adjusts the plasma etching time or RF power according to the electrical signal received from the detection unit and sends the electrical signal to the plasma generator accordingly Plasma processing apparatus comprising a. The method of claim 3, wherein The detection unit, the plasma processing apparatus, characterized in that made of a photomultiplier tube.