KR100441253B1 - method for manufacturing multi-layer printed circuit board using bump - Google Patents
method for manufacturing multi-layer printed circuit board using bump Download PDFInfo
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- KR100441253B1 KR100441253B1 KR10-2002-0036598A KR20020036598A KR100441253B1 KR 100441253 B1 KR100441253 B1 KR 100441253B1 KR 20020036598 A KR20020036598 A KR 20020036598A KR 100441253 B1 KR100441253 B1 KR 100441253B1
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- copper foil
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
도금에 의해서 범프(80㎛)를 형성한 후에 가열ㆍ가압하여 일괄 적층하는 방법을 사용하여 레이저 드릴을 사용하여 비아홀(Via Hole)을 가공하지 않음으로서 다층인쇄회로기판의 제조시 공정을 단순화하는 범프를 이용한 다층인쇄회로기판 제조방법이 개시된다. 본 발명은 수지층을 기준으로 하여 양쪽면에 동박면이 있는 CCL를 비아홀을 가공하고, CCL 양쪽의 동박면에 에칭에 의하여 회로를 형성하고 무전해 도금하여 양쪽의 동박면 전체를 도통되도록 하고 나서, 회로가 형성된 CCL의 양측면에 드라이 필름을 적층하고 나서 전해 동도금과 Sn/Pb 도금에 의해서 범프를 형성하여 내층을 제조하는 단계; 수지층을 기준으로 양측에 동박면이 형성된 CCL을 CNC 드릴을 사용하여 홀을 가공하고, 홀에 판넬도금을 수행하고 나서, 적층시 내층을 향하는 CCL의 일측 동박면에 회로를 형성하여 외층을 형성하는 단계; 형성된 내층 및 외층의 사이에 범프가 형성되어 있는 위치에 홀을 가공된 프리프레그를 넣고 가열ㆍ가압하여 적층하는 단계를 포함한다.A bump that simplifies the process of manufacturing a multilayer printed circuit board by not forming a via hole by using a laser drill using a method of forming a bump (80 μm) by plating and heating and pressurizing and laminating it collectively. Disclosed is a method of manufacturing a multilayer printed circuit board. According to the present invention, the CCL having the copper foil on both sides of the resin layer is processed through via holes, and a circuit is formed on the copper foils on both sides of the CCL by etching and electroless plating to conduct the entire copper foil on both sides. Stacking dry films on both sides of the CCL on which the circuit is formed, and then forming bumps by electrolytic copper plating and Sn / Pb plating to manufacture an inner layer; CCL with copper foil on both sides of the resin layer is machined through a CNC drill, and the panel is plated on the hole, and a circuit is formed on one copper foil surface of the CCL facing the inner layer during lamination to form an outer layer. Doing; And inserting the processed prepreg into a position where bumps are formed between the formed inner layer and the outer layer, and laminating by heating and pressing.
Description
본 발명은 범프를 이용한 다층인쇄회로기판의 제조방법에 관한 것으로, 특히도금에 의해서 범프(80㎛)를 형성한 후에 가열ㆍ가압하여 일괄 적층하는 방법을 사용하여 레이저 드릴을 사용하여 비아홀(Via Hole)을 가공하지 않음으로서 다층인쇄회로기판의 제조시 공정을 단순화하는 범프를 이용한 다층인쇄회로기판 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed circuit board using bumps. In particular, a bump (80 μm) is formed by plating and then heated and pressed to collectively stack the via holes using a laser drill. The present invention relates to a method for manufacturing a multilayer printed circuit board using bumps, which simplify the process of manufacturing the multilayer printed circuit board by not processing the same).
일반적으로, 인쇄회로기판은 각종 열경화성 합성수지로 이루어진 보드의 일면 또는 양면에 동선으로 배선한 후 보드 상에 IC 또는 전자부품들을 배치 고정하고 이들 간의 전기적 배선을 구현하여 절연체로 코팅한 것이다. 전자부품의 발달로 회로도체를 중첩하여 만드는 다층 인쇄회로기판이 개발된 이래, 최근에는 다층 인쇄회로기판의 고밀도화에 관한 연구가 활발하게 진행되고 있다.In general, a printed circuit board is wired to one side or both sides of a board made of various thermosetting synthetic resins, and then ICs and electronic components are disposed and fixed on the boards, and electrical wiring therebetween is coated with an insulator. Background Art Since the development of electronic components, multilayer printed circuit boards made of overlapping circuit conductors have been developed, and recently, research on high density of multilayer printed circuit boards has been actively conducted.
다층인쇄회로기판은 절연층과 회로도체를 순차적으로 적층해서 다층회로를 형성하는 방법이다. 다층인쇄회로기판은 층간회로를 연결하는 극소경의 비아홀 형성이 가능할 뿐만 아니라 회로두께가 얇아서 미세회로 형성이 용이하여 고밀도 회로를 구성할 수 있다.A multilayer printed circuit board is a method of forming a multilayer circuit by sequentially stacking an insulating layer and a circuit conductor. The multilayer printed circuit board not only enables the formation of microscopic via holes connecting the interlayer circuits, but also enables the formation of high density circuits because the circuit thickness is thin and the formation of fine circuits is easy.
최근 휴대폰, PDA 등의 이동통신기기와 컴퓨터, 캠코더 등 각종 전자기기의 소형화, 박형화, 경량화, 고기능화가 진전하는 중이고, 전자기기를 구성하는 각종 전자부품의 소형화 및 박형화와 함께, 이것들을 전자부품이 설치되는 인쇄회로기판에 관하여도 고밀도 탑재(Packing)를 가능하게 하기 위하여 여러 가지 기술개발이 왕성하게 이루어지고 있다.In recent years, miniaturization, thinning, weight reduction, and high functionalization of mobile communication devices such as mobile phones, PDAs, and various electronic devices such as computers and camcorders are progressing. In addition to the miniaturization and thinning of various electronic components constituting electronic devices, these electronic parts Various technologies have been actively developed to enable high-density packaging of printed circuit boards.
종래의 다층인쇄회로기판 제조 과정은 레이저 천공기(Laser Drill)를 이용하여 층간 블라인드 비아홀을 형성하고, 형성된 비아홀을 도금을 통해 층간 도통을시킨다. 또한, 비아홀(Via Hole)이 3개의 도전층을 거쳐 형성되는 경우에는 반복 작업을 통해 스택 비어(Stack Via)를 형성해야 하고, 비아홀의 표면에 부품을 실장하기 위해서는 홀을 수지로 충진(Hole plugging)한 다음 충진된 수지의 상부에 다시 도금을 해야 한다.In a conventional multilayer printed circuit board manufacturing process, an interlayer blind via hole is formed using a laser drill, and the via hole is formed to have interlayer conduction through plating. In addition, when a via hole is formed through three conductive layers, a stack via must be formed through repetitive work. In order to mount a part on the surface of the via hole, the hole is filled with resin. The plated top of the filled resin must then be replated.
즉, 종래의 다층인쇄회로기판은 레이저 드릴을 이용하여 비아홀을 형성하고, 비아홀의 도금을 통해서 층간 도통을 하여왔다. 레이저드릴과 도금이라는 두 가지 방식을 채택하여 다층 인쇄회로기판을 제조하는 것이다.That is, the conventional multilayer printed circuit board has formed via holes using a laser drill, and has made interlayer conduction through plating of the via holes. Multilayer printed circuit board is manufactured by adopting two methods, laser drill and plating.
그러므로 종래의 다층 인쇄회로기판의 제조는 고가의 레이저 천공장비 및 이를 설치할 장소가 필요하여 비아홀의 개수가 증가할수록 금전 및 장소의 제약이 있으며, 블라인드 비아홀(Blind Via Hole)의 경우 적은 지름과 관통이 되지 않은 구조로 인해 도금액의 순환이 어려워 도금 신뢰성에 문제가 있었으며, 스택 비어(Stack Via)의 경우 반복 작업으로 인하여 공정이 증가하고 정합(Registration)불량에 의한 층간 도통이 문제시 되며, 비아홀의 상부에 부품을 실장하기 위해 수지로 홀을 충진 하는 과정이 어렵고, 홀 충진 후 다시 도금을 해야 하며, 도금을 하더라도 도금 편차에 의해 주위와 높이가 다르게 되는 문제점이 있었다.Therefore, conventional multi-layer printed circuit board manufacturing requires expensive laser drilling equipment and a place to install the same. As the number of via holes increases, there is a restriction in money and place. In the case of blind via holes, a small diameter and a penetration Due to the unstructured structure, it was difficult to circulate the plating solution, causing problems in plating reliability.In the case of stack vias, the process is increased due to repetitive work, and interlayer conduction due to poor registration is problematic. The process of filling the hole with resin is difficult to mount the parts on the part, and the plating is required after the hole filling, and even when plating, there is a problem in that the height is different from the surroundings due to the plating deviation.
본 발명은 상기의 문제점을 해소하기 위하여 발명된 것으로, 도금에 의해서 80㎛높이의 도전성 돌기(bump; 이하 범프)를 형성한 후에 가열ㆍ가압하여 일괄 적층하는 방식으로, 6층의 다층인쇄회로 기판 제조시, CCL(Copper Clad Laminate)의양쪽 동박면에 회로를 형성한 후, 양쪽의 회로가 있는 동박면에 드라이필름(D/F) 또는 도금 레지스트가 될 수 있는 그 밖의 재료를 사용하여 적층(Lamination)한 후, 도금에 의해서 범프(80㎛)를 형성한 후, 외층을 가공하여 적층함으로서, 레이저 드릴을 사용하여 비아홀(Via Hole)을 가공할 필요가 없게 되어 다층인쇄회로기판의 제조시 공정을 단순화하기 위한 범프를 이용한 다층인쇄회로기판 제조방법을 제공하는 데 그 목적이 있다.The present invention was invented to solve the above problems, and after forming a conductive bump (hereinafter referred to as bump) having a height of 80 µm by plating, heating, pressing, and laminating them collectively, a six-layer multilayer printed circuit board In manufacturing, a circuit is formed on both copper foil surfaces of a CCL (Copper Clad Laminate), and then laminated on a copper foil surface having both circuits using dry film (D / F) or other material which may be a plating resist. After lamination, bumps (80 µm) are formed by plating, and the outer layers are processed and laminated, thereby eliminating the need to process via holes using a laser drill, thereby manufacturing a multilayer printed circuit board. An object of the present invention is to provide a method of manufacturing a multilayer printed circuit board using bumps to simplify the process.
도 1 및 도 2는 본 발명에 따른 범프를 이용한 6층의 인쇄회로기판의 제조공정을 보여주기 위한 공정도이다.1 and 2 are process charts showing a manufacturing process of a six-layer printed circuit board using bumps according to the present invention.
도 3 및 도 4는 본 발명에 따른 범프를 이용한 8층의 인쇄회로기판의 제조공정을 보여주기 위한 공정도이다.3 and 4 are process charts showing a manufacturing process of an eight-layer printed circuit board using bumps according to the present invention.
<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>
10, 70 : CCL 11, 72 : 수지층10, 70: CCL 11, 72: resin layer
12, 71 : 동박면 20 : 비아홀12, 71: copper foil surface 20: via hole
30, 50 : 드라이필름 40,74,90 : 회로30, 50: dry film 40, 74, 90: circuit
60 : 범프 80, 81 : 홀60: bump 80, 81: hole
82 : 프리프레그 100: 내층82: prepreg 100: inner layer
200: 외층200: outer layer
이와 같은 목적을 달성하기 위한 본 발명은,The present invention for achieving such an object,
수지층을 기준으로 하여 양쪽면에 동박면이 있는 CCL에 비아홀을 가공하고, CCL를 양쪽의 동박면에 에칭에 의하여 회로를 형성하고 무전해 도금하여 양쪽의 동박면 전체를 도통되도록 하고 나서, 회로가 형성된 CCL의 양측면에 드라이 필름을 적층하고 나서 전해 동도금과 Sn/Pb 도금에 의해서 범프를 형성하여 내층을 제조하는 단계;Via holes are processed in the CCL having copper foil on both sides based on the resin layer, and the CCL is formed on both copper foil surfaces by etching to form a circuit and electroless plated to conduct the entire copper foil surface on both sides. Forming a bump by electrolytic copper plating and Sn / Pb plating after laminating dry films on both sides of the CCL on which the CCL is formed;
수지층을 기준으로 양측에 동박면이 형성된 CCL을 CNC 드릴을 사용하여 홀을 가공하고, 홀에 판넬도금을 수행하고 나서, 적층시 내층을 향하는 CCL의 일측 동박면에 회로를 형성하여 외층을 형성하는 단계;CCL with copper foil on both sides of the resin layer is machined through a CNC drill, and the panel is plated on the hole, and a circuit is formed on one copper foil surface of the CCL facing the inner layer during lamination to form an outer layer. Doing;
형성된 내층 및 외층의 사이에 범프가 형성되어 있는 위치에 홀을 가공된 프리프레그를 넣고 가열ㆍ가압하여 적층하는 단계를 포함한다.And inserting the processed prepreg into a position where bumps are formed between the formed inner layer and the outer layer, and laminating by heating and pressing.
이하 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 1 및 도 2는 본 발명에 따른 범프를 이용한 6층의 인쇄회로기판의 제조공정을 보여주기 위한 단면도이고, 도 3 및 도 4는 본 발명에 따른 범프를 이용한 8층의 인쇄회로기판의 제조공정을 보여주기 위한 단면도이다.1 and 2 are cross-sectional views illustrating a manufacturing process of a six-layer printed circuit board using bumps according to the present invention, and FIGS. 3 and 4 are views illustrating a manufacturing of an eight-layer printed circuit board using bumps according to the present invention. A cross section to show the process.
본 발명에 따른 범프를 이용한 6층 인쇄회로기판의 제조방법을 설명하면, 도 1 및 도 2에서 보는 바와 같이, 6층 인쇄회로기판의 내층(100)은, 코어재(Core)를 만들기 위해서 수지층(11)을 기준으로 양측에 동박면(12)이 형성된 CCL(Copper Clad Laminate)(10)을 CNC 드릴을 사용하여 홀(20)을 가공하고, 홀(20)이 가공된 CCL(10)의 양쪽면에 드라이 필름(D/F)을 도포하고 드라이 필름(D/F)(30)을 노광 및 현상하고, 이를 에칭에 의하여 박리하여 CCL(10)의 양쪽면에 회로(40)를 형성한다. (a-d단계)A method of manufacturing a six-layer printed circuit board using bumps according to the present invention will be described. As shown in FIGS. 1 and 2, the inner layer 100 of the six-layer printed circuit board may be formed to form a core material (Core). The CCL (Copper Clad Laminate) 10 having the copper foil surface 12 formed on both sides of the ground layer 11 is machined using a CNC drill, and the CCL 10 in which the holes 20 are processed. Apply dry film (D / F) to both sides of the film, expose and develop the dry film (D / F) 30, and peel it off by etching to form circuits 40 on both sides of the CCL 10. do. (steps a-d)
이후 회로(40)가 형성된 CCL(10)에 무전해 도금을 수행하여 CCL(10)의 양쪽 동박면 전체를 도통되게 하고 나서, CCL(10)의 양측면에 드라이 필름(D/F)(50)을 도포하고 나서, 전해 동도금과 Sn/Pb 도금에 의해서 80㎛높이의 범프(Bump)(60)를 형성하고, 범프(60)가 형성되면 드라이 필름(D/F)(50)을 박리하고 나서, 회로(40)와 회로(40)사이, 회로(40)와 범프(60)사이, 범프(60)와 범프(60)사이를 구분하여 주는 소프트에칭을 수행하게 된다. (e-i단계)Thereafter, electroless plating is performed on the CCL 10 having the circuit 40 formed thereon so as to conduct the entire copper foil surface of the CCL 10, and then dry film (D / F) 50 on both sides of the CCL 10. After coating, after forming a bump (60) of 80㎛ height by electrolytic copper plating and Sn / Pb plating, and after the bump 60 is formed, the dry film (D / F) 50 is peeled off , Soft etching is performed to distinguish between the circuit 40 and the circuit 40, between the circuit 40 and the bump 60, and between the bump 60 and the bump 60. (step e-i)
여기서, 범프의 형성 전 단계에서 적층되는 드라이필름은 도금 레지스트를 형성하는 잉크등 기타 재료를 적층하는 하는 것으로 대체될 수 있다.Here, the dry film laminated at the step of forming the bumps may be replaced by laminating other materials such as an ink forming a plating resist.
또한, 6층 인쇄회로기판의 외층(200)은, 수지층(72)을 기준으로 양측에 동박면(71)이 형성된 CCL(70)을 CNC 드릴을 사용하여 홀(80)을 가공하고, 관통된홀(80)에 25㎛ 두께의 판넬도금(73)을 수행하고 나서, 적층시 안쪽을 향하는 CCL(70)의 일측 동박면에 회로(74)를 형성한다. (j-m 단계)In addition, the outer layer 200 of the six-layer printed circuit board is processed through the hole 80 by using a CNC drill, CCL (70) formed with copper foil surface 71 on both sides with respect to the resin layer 72, After the panel plating 73 having a thickness of 25 μm is performed on the old hole 80, a circuit 74 is formed on one side of the copper foil surface of the CCL 70 facing inward during lamination. (j-m steps)
다층 인쇄회로기판의 내층(100) 및 외층(200)이 완성되면 수지 침투 가공재인프리프레그(Prepreg)(82)를 금형이나 드릴을 이용하여 범프(60)가 형성되어 있는 위치와 같은 위치에 홀(81)을 가공하고, 외층(200)인 1~2층과 내층(100)인 3~4층 및 외층(200)인 5~6층의 사이에 가공된 프리프레그(Prepreg)(82)를 넣고 가열ㆍ가압하여 적층한 후, 적층한 양측면에 회로(90)를 형성함(o-r단계)에 의해서 6층의 다층인쇄회로기판이 제조되어 진다.When the inner layer 100 and the outer layer 200 of the multilayer printed circuit board are completed, the prepreg 82, which is a resin penetration processing material, is formed at the same position as the bump 60 is formed by using a mold or a drill. The prepreg 82 processed between the first and second layers of the outer layer 200 and the third and fourth layers of the inner layer 100 and the fifth and sixth layers of the outer layer 200 is processed. 6 layers of multilayer printed circuit boards are produced by forming a circuit 90 (or step) on both sides of the stacked layers after laminating by heating and pressing.
또한, 본 발명에 따른 8층이상의 다층인쇄회로기판의 제조방법은 도 3 및 도 4에서 보는 바와 같이, 도면 1 및 도2의 6층 다층인쇄회로기판의 제조방법과 동일한 방법으로 외층에 사용되는 코어재(Core)를 만들기 위해서 수지층(11)을 기준으로 양측에 동박면(12)이 형성된 CCL(10)을 CNC 드릴을 사용하여 홀(20)을 가공하고, 가공된 CCL(10)의 양쪽면에 드라이 필름(D/F)을 적층하고 드라이 필름(D/F)(30)을 노광 및 현상하고, 이를 에칭에 의하여 박리하여 CCL(10)의 한쪽면에 회로(40)를 형성한다. (a-d단계)In addition, the manufacturing method of the multilayer printed circuit board of 8 or more layers according to the present invention is used in the outer layer in the same manner as the manufacturing method of the six-layer multilayer printed circuit board of FIGS. 1 and 2, as shown in FIGS. In order to make the core material (Core), the hole 20 is processed by using a CNC drill on the CCL 10 having the copper foil surface 12 formed on both sides with respect to the resin layer 11, and the Dry film (D / F) is laminated on both sides, and the dry film (D / F) 30 is exposed and developed, and it is peeled off by etching to form a circuit 40 on one side of the CCL 10. . (steps a-d)
이후에, 무전해 도금을 수행하고 나서, CCL(10)의 양측면에 드라이 필름(D/F)(50)을 적층하고 나서, 전해도금인 Sn/Pb 도금에 의해서 80㎛높이의 범프(Bump)(60)를 형성하고, 범프(60)가 형성되면 드라이 필름(D/F)(50)을 박리하고 나서, 회로(40)와 회로(40)사이, 회로(40)와 범프(60)사이, 범프(60)와 범프(60)사이를 구분하여 주는 소프트에칭을 수행하게 된다. (e-i단계)Thereafter, after electroless plating is performed, dry films (D / F) 50 are laminated on both sides of the CCL 10, and then bumps having a height of 80 µm are formed by Sn / Pb plating, which is an electroplating process. 60 is formed, and when the bump 60 is formed, the dry film (D / F) 50 is peeled off, and then, between the circuit 40 and the circuit 40, between the circuit 40 and the bump 60. , Soft etching is performed to distinguish between the bump 60 and the bump 60. (step e-i)
이와 같이 CCL(10)의 한쪽 동박면에 회로를 형성하여, 회로가 형성된 동박면위에 도금으로 범프를 형성하여, 이렇게 만들어진 CCL(10)을 도 1 및 도 2에서 보는 바와 같이 제조된 6층의 인쇄회로기판(200)의 일측에 회로(90)을 형성한 다음 홀(81)이 가공된 프리프레그(Prepreg)(82)를 사이에 넣고 가열ㆍ가압하여 적층한 후, 적층한 양측면에 회로(90)를 형성하는(o-r단계)에 의해서 8층의 다층인쇄회로기판이 제조되어 진다.In this way, a circuit is formed on one copper foil surface of the CCL 10, and bumps are formed by plating on the copper foil surface on which the circuit is formed, and thus the CCL 10 thus produced is made of six layers as shown in FIGS. After the circuit 90 is formed on one side of the printed circuit board 200, a prepreg 82 in which the holes 81 are processed is sandwiched and heated and pressed to be laminated, and then the circuits are formed on both sides of the printed circuit board 200. An eight-layer multilayer printed circuit board is manufactured by forming (or step) 90).
이와 같은 방법에 의하여 제조되는 본 발명에 따른 다층인쇄회로기판은 점차 소형화 및 경량화되는 휴대폰, PDA 등의 이동통신기기와 컴퓨터, 캠코더 등에 사용되며, CCL(Copper Clad Laminate)의 양쪽면에 동박을 에칭한 후, 도금을 사용하여 범프(Bump)를 형성하고, 일괄 적층함으로써 다층인쇄회로기판 제조시 비아홀(via hole)의 형성에 레이저드릴을 사용하지 않게 됨으로써 비용 및 설치 장소를 절감하는 것이다.The multilayer printed circuit board according to the present invention manufactured by such a method is used in mobile communication devices such as mobile phones and PDAs, computers, camcorders, and the like, which are gradually miniaturized and lightened, and etching copper foil on both sides of CCL (Copper Clad Laminate). After that, bumps are formed using plating and stacked together to reduce costs and installation sites by not using a laser drill to form via holes in manufacturing a multilayer printed circuit board.
상술한 바와 같이, 본 발명에 따른 다층 인쇄회로기판의 제조방법은 전자기기를 구성하는 각종 전자부품의 소형화 및 박형화와 함께, 이것들을 전자부품이 설치되는 인쇄회로기판에 관하여도 고밀도 탑재(Packing)를 가능하게 하게 할 필요가 있으므로, 도금으로 범프(Bump)를 형성하여 비아홀을 대체하기 때문에 보다 많은 부품을 실장할 수 있으며, 레이저드릴를 사용하여 비아홀을 가공하지 않기 때문에 그만큼의 비용이 감소되는 효과가 있으며, 2층의 코어재를 한번에 적층하는 방식을 취하므로 작업의 공수를 줄일 수 있으며, 층수가 높아 질수록 비용이 절감되는 효과를 얻을 수 있다.As described above, the manufacturing method of the multilayer printed circuit board according to the present invention, together with the miniaturization and thinning of various electronic components constituting the electronic device, also packs them with respect to the printed circuit board on which the electronic components are installed. Since it is necessary to make the bumps by plating, more parts can be mounted because the bumps are replaced to replace the via holes, and the cost is reduced because the via holes are not processed using a laser drill. In addition, since the core material of the two layers is laminated at a time, the labor of the work can be reduced, and the higher the number of layers, the cost can be reduced.
이상에서 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명하였으나, 본 발명은 이에 한정되는 것이 아니며 본 발명의 기술적 사상의 범위내에서 당업자에 의해 그 개량이나 변형이 가능하다.Although the preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited thereto and may be improved or modified by those skilled in the art within the scope of the technical idea of the present invention.
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KR100726238B1 (en) * | 2006-07-28 | 2007-06-08 | 삼성전기주식회사 | Manufacturing method of multi-layer printed circuit board |
KR100804776B1 (en) * | 2006-12-27 | 2008-02-19 | 주식회사 두산 | Printed circuit board including metal bump and method of manufacturing the same |
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