KR100428675B1 - Apparatus for transmitting tone by using frequency processing option in electronic switch board - Google Patents

Abstract

The present invention is a ROM for storing only the fundamental frequency of the beep data; A RAM for reading the beep data of the fundamental frequency stored in the ROM and outputting each beep data indicated by the head address indicating unit according to the count signal of the counter; A plurality of buffers temporarily storing the beep data input from the RAM and outputting the beep data to a processor unit, an option storage unit for outputting each beep data temporarily stored in the buffer unit, and a beep signal output from the plurality of buffer units A frequency processing unit including a processor unit for processing data according to a frequency processing option of the option storage unit and outputting the data; The RAM reads the beep data of the fundamental frequency from the ROM, processes the beep data at high speed, and selects a process having various logics for each time slot in the frequency processing unit, thereby generating and transmitting various beeps by combining the fundamental frequencies. What can be done The.

Description

Apparatus for transmitting tone by using frequency processing option in electronic switch board}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the transmission of tones of electronic switch boards. In particular, various kinds of tones are generated by combining fundamental frequencies in electronic exchanges such as TDX-10, TDX-10A, STAREX-TX1, and STAREX-TX1A. The present invention relates to an apparatus for transmitting a tone using a frequency processing option of an electronic exchange which is adapted to transmit various tones with low memory capacity.

In general, R2MFC (R2 Multi Frequency Compelled) is an inter-station signaling method of an electronic exchange, which combines two frequencies of six frequencies to form one R2 digit, and forward and backward signals according to the signal progress direction. ).

And DTMF (Dual Tone Multi Frequency) is mainly used for communication between wired subscribers and exchange periods. It uses numbers from 0 to 9, '*' and '#', and 'A', 'B', ' C 'and' D 'are not currently used. This DTMF method combines two frequencies from the basic eight frequencies to form one digit.

In addition, CCT (Continuity Check Tone) uses two frequencies as the signal used for line test between stations, and U-Law and A-Law are data compression / extension.

In addition, audible tones (audible tones, or audible tones) are signals for informing subscribers of call progress, and there are various tones such as dial tone, call tone, and ring tone. The frequency used for these audible tones varies for each tone, and on / off may be repeated at regular intervals.

Therefore, an electronic exchange such as TDX-10A sends out various tones to the other station using R2MFC method. The beeper used in the electronic exchange using the R2MFC system is 16 in the R2MFC forward, 16 in the R2MFC reverse, 16 in the DTMF, 3 in the CCT, and various audible tones. Therefore, 51 beeps are basically required except for audible tones for exchange of signals between exchanges.

Hereinafter, the configuration and operation of the signal transmission apparatus of the electronic exchange according to the prior art will be described.

First, Fig. 1 is a block diagram of a signal transmission apparatus of a conventional electronic exchange.

As shown in the drawing, a conventional transmitter includes a counter 11 for counting and outputting an input clock signal; A head address indicating section 12 indicating a head address of the beep data stored in a ROM (ROM, Read Only Memory) 13; A ROM (13) for outputting each beep data indicated by the head address indicating section (12) in accordance with the count signal of the counter section (11); A plurality of flip flops 14 temporarily storing and outputting the beep data output from the ROM 13; And a plurality of P / S converters 15 for converting parallel beep data output from the plurality of flip-flop units 14 into serial data.

Referring to the operation of the device according to such a configuration as follows.

First, the ROM 13 stores PCM data of a beep tone.

The head address indicating section 12 then indicates the head address of the beep data as the upper six bits of the ROM 13. When the upper 6 bits are allocated to the beep block, the memory block allocated to the beep sound is maximum. Up to four beeps can be supported. Then, by configuring the digit of the beep data using the lower 11 bits in the memory block of the ROM 13, each beep data is It is composed of bytes. In other words, the PCM (Pulse Code Modulation) data of each beep is stored in the ROM 13, and each of these beep data is composed of 2048 bytes.

Thus, the counter unit 11 operating according to the clock signal of 8 KHz indicates the digit of each beep block stored in the ROM 13 so that each beep data is output at each rising edge of the clock signal.

That is, the counter unit 11 outputs the beep data one byte by using a 2048 counter. At this time, the counter 11 is synchronized with a frame synchronization signal (Frame Synchronization, FS) indicating the start of channel 0 (not shown) and operates according to a clock signal of 8 KHz.

Then, the head address indicating unit 12 designates up to 64 memory blocks in which the beep data is stored for one period of the clock signal input to the counter unit 11. For example, if you need to send out beep 0 to channel 0, beep 1 to channel 1, ....., 63 beep to channel 63, each rising edge of 8KHz clock signal The head address indicating section 12 indicates the digits of each beep data from digit 0 to digit 63, respectively. Accordingly, since 64 beep data must be designated during one cycle of the clock signal, the head address indicating unit 12 operates at a cycle of 512 KHz (8 KHz * 64 = 512 KHz).

In this way, the first digits of the 64 channels of the beep block are read during the first period of the clock signal. Subsequently, in the next period of the clock signal, the counter unit 11 accumulates the coefficient by one and the second digit for the 64 channels of the beep block is read. The clock signal is counted 2048 times so that the entire beep data for 64 channels is read, and the outputted data is output to the plurality of flip-flop units 14 each time.

In addition, the plurality of flip-flop units 14 latch the tone data output from the ROM 13 in the same manner as described above, and then, according to the output enable signal, the plurality of P / S converters ( 15) respectively. At this time, since the beep data is composed of parallel data, the parallel beep data output from the plurality of flip-flop units 14 in the plurality of P / S converters 15 are converted into serial signals, thereby converting each transmission path TX0, It is sent to the other station through .., TXn).

As described above, the conventional electronic exchange device sequentially transmits beep data of 64 channels according to a clock signal.

On the other hand, unlike the above method, 32 channels are used for signaling and the remaining 32 channels are used for audible tones.

However, the conventional signaling device has a problem as follows.

First of all, the PCM data for all the tones must be stored in the ROM, so it takes up a lot of memory blocks in the ROM. In general, a compressed R2MFC signal generates one digit by selecting two synthesized frequencies from six fundamental frequencies. In addition to this, if you want to use U-Law as well as A-Law, which is the compression / extension method currently in use, you need twice as much space as the current capacity.

Therefore, a total of 51 beeps required for signals between stations should be generated using a total of 23 fundamental frequencies consisting of six in the R2MFC forward, six in the R2MFC reverse, eight in DTMF, two in CCT, and one in mute. Therefore, more than twice as many memory blocks were used as the 23 fundamental frequencies, and audible tones had to be allocated more memory blocks than the basic frequencies. Therefore, when various audible tones need to be added, there is a problem in that the memory blocks of the ROM are insufficient to implement them.

In addition, in order to control the beeper through the application of modulation or companding, or the level adjustment, the beeper is controlled due to the trouble of having to rewrite the PCM data of the entire beeper into the ROM. There was a disadvantage that was not easy.

Accordingly, the present invention has been proposed to solve the conventional problems as described above, and an object of the present invention is to produce a variety of tones by combining the fundamental frequency in the electron exchanger that can transmit a variety of tones with a small memory capacity It is to provide a signal transmission device using the frequency processing option of.

In order to achieve the above object, an apparatus for transmitting an acoustic signal of an electronic exchange according to the present invention, in the apparatus for transmitting an acoustic signal of an electronic exchange having a head address indicating unit which instructs the head address of the acoustic signal data using an input clock of the counter, A ROM for storing only the fundamental frequency of the beep data; a RAM for reading the beep data of the fundamental frequency stored in the ROM, and outputting each beep data indicated by the head address indicating unit according to the counter signal of the counter; The option storing unit comprises: a plurality of buffer units temporarily storing the beep data and outputting the signal to the processor unit, an option storage unit to output each beep data temporarily stored in the buffer unit, and the beep data output from the plurality of buffer units. Processed and output according to negative frequency processing option And a frequency processing unit comprising a data compression / extension conversion unit configured to compress / extend the signal sound data output from the processor unit according to a specific compression / extension method and output the signal sound signal. do.

1 is a block diagram of a signal transmission apparatus of a conventional electronic exchanger,

2 is a block diagram of an apparatus for transmitting a signal tone using a frequency processing option of an electronic exchange according to the present invention;

3 is a detailed block diagram of the frequency processor of FIG. 2.

Explanation of symbols on the main parts of the drawings

21: counter 22: head address indicating unit

23: RAM 24: ROM

25: a plurality of flip-flop unit 26: a plurality of P / S conversion unit

30: frequency processing unit

Hereinafter, an embodiment according to the technical idea of the signal transmission apparatus using the frequency processing option of the present invention as described above is as follows.

First, Figure 2 is a block diagram of a signal transmission apparatus using the frequency processing option of the electronic exchange according to the present invention.

As shown therein, the apparatus according to the present invention includes a counter unit 21 for counting and outputting an input clock signal; A head address indicating section 22 indicating a head address of the beep data read out from the ROM 24 by the RAM 23; A ROM 24 for storing beep data of a fundamental frequency necessary for inter-station signals; A RAM (23) for reading the beep data of the fundamental frequency stored in the ROM (24) and outputting each beep data indicated by the head address indicating section (22) according to the count signal of the counter section (21); A frequency processor 30 for processing and outputting a frequency according to a process programmed for each time slot when the beep data is output from the RAM 23; A plurality of flip-flop units 25 for temporarily storing and outputting the beep data output from the frequency processor 30; And a plurality of P / S converters 26 for converting parallel beep data output from the plurality of flip-flop portions 25 into serial signals.

The frequency converter 30 includes: a plurality of buffers 31 which temporarily store the input tone data and output them to the processor 33; An option storage unit 32 for outputting a frequency processing option for each time slot for processing each beep data to the processor unit 33; A processor unit 33 for processing and outputting the beep data output from the plurality of buffer units 31 according to the frequency processing options of the option storage unit 32; It is composed of a data compression / extension converter 34 for compressing and outputting the beep data output from the processor 33 in accordance with a specific compression / extension method.

The operation of the device according to such a configuration will be described in detail as follows.

First, the ROM 24 stores only the fundamental frequency necessary to generate a beep for communication between stations. That is, in case of the R2MFC, DTMF, and CCT schemes, only the ring tone data (PCM Data, Pulse Code Modulation data) for 23 fundamental frequencies need to be stored. Therefore, the RAM 23 having a high read / write speed reads and stores the beep data of the fundamental frequency stored in the ROM 24 having a slow read speed.

Then, the head address indicating section 22 indicates the head address of each beep data as the upper six bits of the RAM 23. As a result, the beep block of the memory allocated to the beep data is maximum. Up to four beeps can be supported.

In addition, the RAM 23 stores pulse code modulation (PCM) data of each beep, and one beep includes 2048 bytes. At this time, since the RAM 23 constitutes a digit of the beep data with the lower 11 bits, each beep data is It is composed of bytes.

At this time, since the data read speed of the RAM 23 is faster than the data read speed of the ROM 24, the data can be read about five times faster than the conventional device. It can be secured. Accordingly, the plurality of buffers 31 may be provided in the frequency processor 30 to process four frequencies.

When the 8 KHz clock signal is input, the counter unit 11 reads the beep data one byte by pointing to each beep data stored in the RAM 23 using the 2048 counter.

Accordingly, the counter unit 21 reads the digits of the beep data one byte by using a 2048 counter. At this time, the counter 21 is synchronized with the frame synchronization signal (Frame Synchronization, FS) indicating channel 0, and then reads the digits of each beep data from channel 0 to channel 63 according to the clock signal.

Then, the head address indicating section 22 can designate the digits of a total of 64 beep data during one period of the clock signal input to the counter section 21. For example, if you need to send digit 0 to channel 0, digit 1 to channel 1, digit 1 ....., digit 63 to channel 63, the first address at each rising edge of the clock signal. The indicator section 22 indicates the fundamental frequencies of each beep data. In this case, a single digit is read up to four fundamental frequencies, and thus a single digit is formed, thus operating five times faster, including processing time. That is, it operates at 512KHz * 5 = 2.5MHz to form one byte of one digit.

In this way, the first digits of the 64 channels of the beep block are read during the first period of the clock signal. Then, in the next cycle of the clock signal, the counter unit 21 accumulates the coefficient by one and causes the second digit of the 64 channels to be read. When the 8KHz clock signal is counted 2048 times and all the sound signals of 64 channels are read, all the sound signals are sent to the frequency processor 30.

Thus, when PCM data is output, the PCM data are sequentially stored in four buffer units 31. Then, the option storage unit 32 stores the frequency processing options for each time slot, and selects a specific time slot so that a specific process for frequency processing is operated in the processor unit 33.

For example, if R2 forward beep 1 is transmitted to time slot 0, 1380 Hz and 1500 Hz are sequentially read from RAM 24 and stored in buffer 1 and buffer 2 of the plurality of buffer units 31, respectively. Null data is stored.

When the process 1 of the processor unit 33 is programmed to operate as Output = buffer 1 + buffer 2 + buffer 3 + buffer 4, the option storage unit 32 selects process 1 in time slot 0. The processor 33 outputs one byte of the frequency synthesized beep data of 1380 Hz + 1500 Hz (the sum of the frequencies stored in the buffer 1 and the buffer 2) to the data compression / extension converter 34.

Also, in process 2, various logics for each process, such as modulation, attenuation in process 3, for example, attenuate the data in buffer 1 in half with output = (buffer 1) / 2). If the processor 33 is programmed in advance, the option storage unit 32 selects each process for frequency processing for each time slot, thereby processing various combinations of frequencies.

Then, the beep data output from the processor unit 33 is converted into a U-Law method or an A-Law method by the U-LAW / A-LAW converter in the data compression / extension converter 34 to process the frequency processor 30. Is output from

Then, the plurality of flip-flop units 25 latch the tone data output from the frequency processor 30 by 8 bits and then, according to the output enable signal, the plurality of P / S converters (Parallel / Serial converter) (26).

Subsequently, the parallel beep data output from the plurality of flip-flop units 25 is converted into a serial signal by the plurality of P / S converters 26 and transmitted to the counter station through each transmission path TX0, .., TXn. will be.

As described above, the present invention processes the beep data at a high speed by reading the beep data of the fundamental frequency from the ROM storing only the fundamental frequency, and selects a process having various logics for each time slot in the frequency processor, thereby combining the fundamental frequencies. It is possible to generate and transmit various tones.

Although the preferred embodiment of the present invention has been described above, the present invention may use various changes, modifications, and equivalents. It is clear that the present invention can be applied in the same manner by appropriately modifying the above embodiments. Accordingly, the above description does not limit the scope of the invention as defined by the limitations of the following claims.

As described above, the signal transmission apparatus using the frequency processing option of the electronic exchange according to the present invention has an effect that can be variously manipulated. That is, various operations such as frequency synthesis, modulation, level adjustment, and the like by changing the logic or changing the program for a programmable logic device (PLD) or a signal transmitting device having a microprocessor (Micro Processor) It will be able to easily perform.

In addition, since the ROM only needs to store the fundamental frequency, it has the effect of saving the overall ROM space. That is, in the conventional apparatus, since all the beep data must be stored in the ROM, all 48 blocks are excluded from the R2MFC forward, R2MFC backward, DTMF, and CCT beep blocks except for the silent signals allocated to R2MFC forward, R2MFC backward, and DTMF. Although necessary, the apparatus according to the present invention only needs to store the fundamental frequency in the ROM, so a total of 22 blocks is sufficient except for one frequency used for silence. Therefore, various audible frequencies can be added to the free space of the ROM, and the size of the audible frequency domain can be reduced.

In addition, the apparatus according to the present invention has the effect of transmitting a variety of tones by combining the fundamental frequency arbitrarily. In the prior art, since only 12 blocks of memory were allocated to the basic beep block when the 1M bit (1Mega-Bit) ROM was used, only 12 memory blocks were supported for the audible beep. Using twelve memory blocks, various frequencies can be combined. In other words, even if only two frequencies are combined from the audible frequencies stored in the 12 blocks, It is possible to transmit a combination of two audible tones.

Claims (2)

A signal sound transmitting device of an electronic exchange having a head address indicating section which indicates a head address of beep data by using an input clock of a counter. A ROM for storing only the fundamental frequency of the tone data; A RAM for reading the beep data of the fundamental frequency stored in the ROM and outputting each beep data indicated by the head address indicating unit according to the count signal of the counter; A plurality of buffers temporarily storing the beep data input from the RAM and outputting the beep data to a processor unit, an option storage unit for outputting each beep data temporarily stored in the buffer unit, and a beep signal output from the plurality of buffer units A frequency processing unit including a processor unit for processing data according to a frequency processing option of the option storage unit and outputting the data; and a data compression / extension converting unit for compressing / extending the tone data output from the processor unit according to a specific compression / extension method. Signal transmission device using the frequency processing option of the electronic exchange, characterized in that it comprises a. delete