KR100351045B1 - Apparatus for decoding ac factor of inverse quantizer in motion picture decoding system - Google Patents

Abstract

PURPOSE: An apparatus for decoding an AC factor of an inverse quantizer in a motion picture decoding system is provided to obtain a DCT coefficient for inverse discrete cosine transform. CONSTITUTION: An apparatus for decoding an AC factor of an inverse quantizer in a motion picture decoding system includes a signal input unit(200), a calculation unit(204), a quantizing interval output unit(202), and a DCT block construction unit(206). The signal input unit receives a variable length decoding signal and a fixed length encoding signal, selectively outputs the signals, and outputs a coding signal and a run signal. The calculation unit accepts the signal selected by the signal input unit, quantization matrix and a linear or nonlinear quantizing interval size and performs calculations to output an AC factor. The quantizing interval output unit receives a quantization step code, converts the quantization step code into the linear or nonlinear quantizing interval size, and selectively outputs the quantizing interval size. The DCT block construction unit accepts the coding signal and a DC coefficient of a discrete cosine transform block to construct a DCT coefficient.

Description

AC coefficient decoding device of inverse quantization unit in moving picture decoding device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video decoding apparatus, and more particularly, to an apparatus for decoding the AC coefficient of the inverse quantization unit.

Moving Picture Expert Group (MPEG) 2, the international standard for video, is a standard for moving picture compression and decompression, published in April 1994, and several companies are working to make it practical. Digital video signal compression is increasing in many applications of digital image data transmission and digital image storage devices.

In order to reduce temporal redundancy, digital video signals are subjected to motion prediction and spatial cosine transform (DCT: DCT) to reduce spatial correlation. The DCT in the encoder is 8 × 8 in size, and the output coefficient of the DCT is composed of one DC (DC or DC) coefficient and 63 AC coefficients in the case of an intra macro block. In the case of a (Non-Intra) macroblock, it consists only of 64 AC coefficients. The quantization unit converts a real DCT coefficient into an integer so that it can be used as an input for variable length coding (VLC) and uses a quantization matrix (8 × 8) to set the DCT coefficient on the high frequency side to '0. It compresses the data by making it ', and performs lossy coding to get a better picture by weighting the structure of the quantization matrix to the sensitive part of human visual characteristics. After that, it is output through VLC and Run-Length Coding (RLC).

An object of the present invention is to provide an apparatus for decoding the AC coefficients of the inverse quantization unit in order to obtain a DCT coefficient for inverse DCT in the video decoding apparatus that receives the encoded and output bit stream as described above.

In the moving picture decoding apparatus for inputting and decoding the encoded digital signal compressed into the moving picture according to the present invention, to achieve the above object, the code bit of X bit, the coefficient bit of Y bit and the run bit of Z bit A decoding apparatus for decoding an AC coefficient by inputting a variable length decoded signal and a fixed length code signal, respectively, is configured to input and output the variable length decoded signal and the fixed length code signal, and to output a code signal and a run signal. A signal input means, an output selected by the signal input means, a quantization matrix and a calculation means for performing an operation after inputting a linear or nonlinear quantization interval size, and outputting the AC coefficient, and inputting the quantization step code to the linear and nonlinear A quantization interval output means for converting to a quantization interval size and outputting the selected quantization interval output means; It characterized in that it comprises a DCT block constructing means and outputting the input to the DC coefficient of the block ring constituting the coefficients of the DCT block.

1 is a block diagram of a decoding apparatus for decoding AC coefficients of an inverse quantization unit in a moving picture decoding apparatus according to the present invention, and includes a signal input unit 200, an operation unit 204, a quantization interval output unit 202, and a DCT block component ( 206).

FIG. 2 is a detailed block diagram according to the present invention of the AC coefficient decoding apparatus shown in FIG. 1, and the signal absolute value unit 400 and the signal selecting unit 402 constituting the signal input unit 200 shown in FIG. The first quantization output unit 404 constituting the quantization interval output unit 202, the second quantization output unit 406, the quantization size selection unit 408, the connection unit 410 constituting the operation unit 204 and A coefficient selector 416 constituting the first operator 412, the second operator 414, the DCT block construction unit 206, the transformer 418, the saturation part 420, the mismatching part 422, and the like. It consists of an output buffer 424.

Hereinafter, the operation of the AC coefficient decoding apparatus of the inverse quantization unit in the moving picture decoding apparatus according to the present invention will be described in detail with reference to FIGS. 1 and 2.

The video coder performs DCT, quantization, and encoding, and the video decoder performs decoding, inverse quantization, and inverse DCT, which are processes opposite to those of the coder.

The DC coefficient is subjected to a DC encoding process, and the AC coefficient is quantized by dividing into a quantization scale which is a unit quantization size controlled according to the buffer state of the output unit. Then, it is divided into a quantization matrix having an default value or set in an encoder according to the nature of the image information at the time of encoding. The DCT results indicate that the DC which is important for DCT characteristics is in the upper left top, the important low frequency signals are in the upper left side of the 8 × 8 DCT coefficient matrix, and the less important high frequency signals tend to be raised in the lower left of the matrix. Therefore, the quantization matrix is configured to have a larger value toward the lower right in the case of the intra-macro block, thereby dividing the DCT coefficient to make the DCT coefficient of the high frequency side to '0'. As a result, the compression effect of the RLC can be enhanced, and quantization is performed by weighting the low frequency coefficient, which is a sensitive part of human visual characteristics.

The process of inverse quantization is a process in which quantization scale and the quantization matrix used in the encoder are multiplied by the coefficient for DCT generated by the output of variable length coding. The inverse quantization process is a lossy compression process that is not exactly restored to the original information as a result of rounding and truncation during quantization, and the input coefficient for inverse DCT through decoding of DC and AC coefficients as a result of inverse quantization. Can be generated. The inverse quantization unit decodes the AC coefficient as

In Equation (1), v and u represent length and width in DCT blocks, respectively, and have values of 0-7 when DCT block is 8 × 8 size, while F [v] [u] is DCT coefficient, QF [v] [u] is an input of an 8x8 sized inverse quantizer input to the input terminal IN1, and W [v] [u] represents a quantization matrix.

One more thing to note is k, which is '0' for an intra block, and has a value corresponding to the sign of the input of the inverse quantizer in equation (1).

The signal input unit 200 shown in FIG. 1 inputs a fixed length code signal, takes an absolute value into a coefficient, and outputs it, and outputs a code signal and a run signal. And a signal selector 402 which selects and outputs a variable length decoded signal that is controlled and inputted to one control signal and the variable length decoded signal, and the calculation unit 204 is controlled and input to the second control signal. A connection unit 410 for connecting the first or second value to the output of 402 according to the type of the macroblock, a first operation unit 412 for inputting and multiplying the output of the quantization interval output means and the quantization matrix, and The output unit of the connection unit 410 and the output of the first operation unit 412 is multiplied by a predetermined value and multiplied by a second operation unit 414 for outputting the AC coefficient, the quantization interval output unit 202 is a terminal Linear quantization interval by inputting 5-bit quantization step code into IN2 A first quantization output unit 404 for outputting a signal, a second quantization output unit 406 for outputting a nonlinear quantization interval size by inputting a quantization step code, and outputs of the first and second quantization output means input A quantization size selection unit 408 is controlled by a control signal and selects and outputs a linear or nonlinear quantization interval size, and the DCT block configuration unit 206 selects AC and DC coefficients that are controlled by the fourth control signal. A coefficient selector 416 for outputting the data, a converter 418 for inputting the output of the coefficient selector 416, an output of the code signal and the signal selector 402, and converting the result into a two's complement form; The sum of the coefficients is excellent in the inverse DCT block by inputting the output of the converter 418 and clipping the output in the range of ± 2 ^Y −1 and outputting the output of the saturation unit 420. The mismatching part 422 and the mismatching part 422 which discriminate | determine whether it is a cardinal number, and make it a cardinal number. And an output buffer 424 for temporarily storing the coefficients of the inverse DCT block by inputting the output of the N-DC block and performing run-length decoding to configure the AC coefficients of the DCT block used for the inverse DCT.

The operation of the AC coefficient decoding apparatus of the inverse quantization unit in the moving picture decoding apparatus according to the present invention will be described in detail as follows.

In the video decoding apparatus, the input of the AC coefficient decoding apparatus of the inverse quantization unit is input through the input terminal IN1 from the output of variable length decoding (VLD), and is composed of a variable length decoding signal or a fixed length code signal. Each signal is composed of a 6-bit run signal, a 1-bit sign signal, and an 11-bit count value, and the 11-bit count value is configured in two's complement form.

The 1-bit sign bit of the input signal is separated from the signal absolute value unit 400 and input to the saturation unit 420 through the conversion unit 418, and the 6-bit sign indicating the number of consecutive '0's of the AC coefficient. The run signal is also separated and used as the RAM read signal of the output signal (input through the terminal IN3) of the quantization matrix stored in the RAM and the coefficient value write signal of the output buffer 424. Since the coefficient values of the variable-length decoded signal and the fixed-length signal are configured in the form of absolute values and two's complement values, respectively, the coefficient values of the fixed-length signal are converted from two's complement form to the absolute value for ease of operation. It converts to and performs this function in the signal absolute value unit 400.

The signal selector 402 outputs a fixed length signal when a fixed length signal is generated, and if not, inputs a variable length decoded signal to the connection unit 410.

The connection part 410 shifts one bit to the left to multiply 2 of the operation 2 × QF [v] [u] of Equation (1). 2 The control signal is inputted as '0' through the input terminal IN5 and added. In the case of a non-intra macroblock, the value of the second control signal is +1 if the sign of the value input to the input terminal IN1 is positive. And put it into the least significant bit of the signal being processed by the connection unit 410 through the input terminal IN5, and if the sign of the value input to the input terminal IN1 is negative, the value of the second control signal is -1 through the input terminal IN5. Put the least significant bit. In the case of negative, if +1 instead of -1 is converted to two's complement, -1 is obtained. If the sign is positive, +1 can be added as well, which can reduce the area of hardware. On the other hand, the coefficient value output from the connection unit 410 is 12 bits.

When encoding the video signal, the quantization unit changes the quantization interval size in macroblock units according to the state of the encoder output buffer.In the case of using the linear quantizer, the linear unit increases by 2 in the range of 2-62 depending on the control signal. If the nonlinear quantizer is used and the nonlinear quantizer is used, the quantization interval size, which is a nonlinear interval of 1 to 112, is also used according to the control signal. The decoding unit of the inverse quantization unit outputs the linear quantization interval size from the first quantization output unit 404 having a multiplication function of multiplying the size code by 2 according to the 5-bit quantization interval size code inputted to the terminal IN2. The second quantization output unit 406 composed of) outputs a nonlinear quantization interval size. For each of the output quantization interval sizes, one of two signals is selected and output from the quantization size selector 408 according to a third control signal which is a linear and nonlinear quantizer control signal input to the input terminal IN7.

The quantization matrix stored in the RAM is inputted to the first operator 412 of the calculator 204 as an 8-bit quantization matrix element value by skipping an address according to the size of the run length representing a continuous number of '0's. The first operation unit 412 having a size of 8 × 7 is input through the terminal IN3 and multiplies the output of the quantization matrix by the output of the quantization size selection unit 408.

The second operator 414 inputs a 12-bit DCT coefficient value output from the connector 410 and an output of the 15-bit first operator 414 to generate a 27-bit result after multiplication. And, the right shifter is configured to move the 5 bits to the right to output 22 bits and divide them by 32 as shown in Equation (1).

The coefficient selector 416 inputs the DC coefficient value of the DCT block decoded by the DC decoder and the AC coefficient value output from the second calculator 414 to control and output the fourth control signal input through the input terminal IN4. do. The conversion unit 418 calculates the absolute value and inputs the coefficient value input from the coefficient selection unit 416 when the sign bit input from the signal absolute value unit 400 is '0' and outputs it through '1'. In this case, take the two's complement and output it. The signal converted into two's complement and output is 23 bits including the sign bit. Thereafter, the inverse DCT unit, which is the next stage of the inverse quantization unit shown in FIG. 1, performs a two's complement operation.

The saturation unit 420 clipping the input DCT coefficient value in the range of -2047 to +2047. If the upper 11 bits except the sign bit are detected and the sign bit is positive, a value greater than +2047 is input. Instead, this value is output +2047. If the sign bit is negative, a negative value greater than -2047 is input. Clipping is done by printing -2047 instead of this value.

The mismatching unit 422 inputs the output of the saturation unit 420 and exclusively ORs the least significant bits of the 64 coefficient values in one block to determine whether it is odd or even. If it is even, the 64th coefficient adds +1 to the 64th coefficient and if it is even, then adds -1 to the 64th coefficient.

The DCT coefficient output from the mismatching unit 422 is output to the reverse DCT unit through the terminal OUT through the output buffer 424.

In the moving picture decoding apparatus according to the present invention, the DCT coefficient that is the result of decoding the AC coefficient of the inverse quantization unit is output as a coefficient value composed of one bit of code bits and two complements of 11 bits.

As described above, in the moving picture decoding apparatus according to the present invention, the AC coefficient decoding apparatus of the inverse quantization apparatus can easily configure a circuit, and converts the input into an absolute value before the final saturation unit 420 after signal processing. By taking the two's complement in the converter 420, the signal processing process can be simplified.

1 is a block diagram of an AC coefficient decoding apparatus of an inverse quantization unit in a moving picture decoding apparatus according to the present invention.

FIG. 2 is a detailed block diagram according to the present invention of the ash coefficient decoding apparatus shown in FIG.

Claims (6)

A moving picture decoding apparatus for inputting and decoding a compressed digital signal compressed into a moving picture, comprising: a variable length decoded signal and a fixed length code signal each consisting of an X bit code bit, a Y bit coefficient bit, and a Z bit run bit; The input device decodes the AC coefficient of the discrete cosine transform block. Signal input means for inputting and outputting the variable length decoded signal and the fixed length code signal, and outputting a code signal and a run signal; Computing means for outputting the AC (AC or less AC) coefficient by performing an operation after inputting the output selected from the signal input means, the quantization matrix and the linear or nonlinear quantization interval size: A quantization interval output means for inputting a quantization step code, converting the linearized and nonlinear quantization interval sizes, and outputting the selected quantization interval code; And a DCT block constructing means for inputting the code signal and the DC coefficient of the discrete cosine transform block to configure the coefficients of the discrete cosine transform block and outputting the coefficients of the discrete cosine transform block. A-clock decoding device. The method of claim 1, wherein the signal input means A signal absolute value means for inputting the fixed length code signal, taking an absolute value in a coefficient, and outputting the coded signal; And a signal selecting means for selecting and outputting the signal obtained by controlling the first control signal and the variable length decoded signal, and outputting the variable length decoded signal. The method of claim 1 or 2, wherein the calculating means Connecting means for connecting a first value or a second value to an output of the signal selection means controlled by a second control signal according to a type of macro block: First calculation means for inputting the output of said quantization interval output means and said quantization matrix and multiplying and outputting it; And a second calculation means for inputting the output of the connection means and the output of the first calculation means, multiplying to a predetermined value and multiplying the AC coefficient to output the AC coefficient. Decryption device. The method of claim 1, wherein the quantization interval output means First quantization output means for inputting the quantization step code to output a linear quantization interval size; Second quantization output means for inputting the quantization step code to output a nonlinear quantization interval size; Inverse quantization in a moving picture decoding apparatus comprising a quantization size selection means for controlling the input and output of the first and second quantization output means is controlled by a third control signal to select and output the linear or nonlinear quantization interval size A negative inverse discrete cosine transform coefficient decoding device. The method of claim 2, wherein the DCT block configuring means Coefficient selection means for selecting and outputting the AC and DC coefficients controlled and input to a fourth control signal; Conversion means for inputting the output of the coefficient selection means, the code signal, and the output of the signal selection means, converting them into a two's complement form and outputting them: Saturation means for inputting the output of the conversion means and clipping the output in the range of ± 2 ^Y -1: Mismatching means for inputting the output of the saturation means to determine whether the sum of the coefficients in the discrete cosine transform block is excellent or odd, and make the odd number: And an output buffer means for inputting the output of the mismatching means to temporarily store coefficients of the discrete cosine transform block, and performing run-length decoding to form the discrete cosine transform block. A-clock decoding apparatus of inverse quantization unit. The method of claim 1, wherein X, Y and Z are The A-clock decoding apparatus of the inverse quantization unit in the moving picture decoding apparatus characterized in that 1, 11 and 6, respectively.