KR100344223B1 - A generating circuit of minus voltage - Google Patents

Abstract

Instead of using the disclosed separate transformer or the like, the switching operation of the capacitor and the transistor is used to generate a negative voltage having the same level as the positive voltage and the opposite polarity.

A pulse signal generating means for generating the first and second pulse signals having a predetermined period of opposite phases to each other, and the first switching means being operated during the period in which the pulse signal generating means outputs the first pulse signal at high potential. The positive voltage output from the power supply circuit unit is charged to the capacitor, and while the second switching means operates while the pulse signal generating means outputs the second pulse signal at high potential, the polarity of the voltage charged to the capacitor is reversed to reduce the negative voltage. Generate and output.

Description

A generating circuit of minus voltage

The present invention relates to a negative voltage generating circuit for generating a negative voltage having the same voltage and the same polarity and opposite polarity by using a positive voltage of a predetermined level output from a power supply circuit portion.

In general, digital circuits composed of TTL (Transistor Transistor Logic) systems, digital circuits containing a mixture of Complementary Metal Oxide Semiconductor (CMOS) series, and circuits containing a mixture of digital and analog circuits are positive and negative directions with respect to ground. The positive voltage and negative voltage having the same level are used together.

However, when both the positive voltage and the negative voltage occur in one power supply circuit part, the configuration of the power supply circuit part becomes very complicated.

Therefore, in general, the power supply circuit unit generates a positive voltage, and uses one positive voltage generated in the power supply circuit unit to generate and supply a negative voltage having the same voltage and the same polarity and opposite polarity.

1 is a conventional negative voltage generation circuit diagram for generating negative voltages having the same level and opposite polarity by using a positive voltage output from a power supply circuit unit.

Here, reference numeral 10 denotes a pulse signal generator that generates a switching pulse signal of a predetermined period.

The output terminal of the pulse signal generator 10 is connected to the base of the switching transistor Q11, and a positive voltage output from the power supply circuit unit 12 is applied to the collector of the switching transistor Q11 to the primary coil of the switching transformer TA. It is configured to be applied through.

In addition, the secondary coil of the switching transformer TA is connected to the ground capacitor C11 through the reverse diode D11 and includes a rectifying unit 14 for outputting a negative voltage, and the negative voltage outputted by the rectifying unit 14 and The positive voltage output from the power supply circuit unit 12 is configured to be supplied to the load 16 as an operating power source.

In the conventional negative voltage generation circuit configured as described above, the pulse signal generation unit 10 generates the switching pulse signal of the predetermined period while the power supply circuit unit 10 outputs the positive voltage of the predetermined level, and the switching pulse of the predetermined period generated. The signal is applied to the base of transistor Q11.

Then, the transistor Q11 is repeatedly turned on and off in accordance with a switching pulse signal of a predetermined cycle generated by the pulse signal generator 10, and the power circuit unit 12 is turned on in response to the transistor Q11 being turned on and off. The output positive voltage is switched in the primary coil of the switching transformer TA and induced to the secondary coil of the switching transformer TA.

The voltage induced by the secondary coil of the switching transformer TA is rectified by the negative voltage through the reverse diode D11 of the rectifying unit 14 and smoothed by the ground capacitor C11 so that the negative voltage is output, that is, the rectifying unit 14. ) Outputs a negative voltage having the same level as that of the positive voltage output from the power supply circuit unit 12 with the opposite polarity with respect to ground.

As such, the negative voltage output from the rectifying unit 14 and the positive voltage output from the power supply circuit unit 12 are supplied to the load 16 as an operating voltage to drive the load 16 normally.

However, the conventional negative voltage generator circuit uses an expensive switching transformer with a large size and a heavy weight, and thus, the weight and size of the entire circuit become large, and the use of the switching transformer causes not only poor efficiency but also high switching noise. There were various problems such as being.

Accordingly, an object of the present invention is to provide a negative voltage generation circuit that generates negative voltages having the same level as a positive voltage and opposite polarities using switching operations of a capacitor and a transistor.

According to the negative voltage generating circuit of the present invention for achieving the above object, it is provided with a pulse signal generating means for generating the first and second pulse signals of a predetermined period of the phase opposite to each other, the pulse signal generating means is the first While the first switching means operates during the period of outputting the pulse signal at high potential, the capacitor is charged with the positive voltage output from the power supply circuit portion, and the second switching means is provided during the period during which the pulse signal generating means outputs the second pulse signal at high potential. In operation, the polarity of the voltage charged in the capacitor is inverted to generate and output a negative voltage.

The pulse signal generating means generates a first and second pulse signals whose phases are inverted from each other using a microcomputer, and the first and second pulse signals are phased so that the first and second switching means do not simultaneously operate. When this is reversed, all of the low potentials are maintained for a predetermined time.

And a pulse signal generator for generating a pulse signal at a predetermined cycle; And a pulse signal converter configured to generate first and second pulse signals having a period for maintaining a low potential when the phases are opposite to each other and the phases are inverted as pulse signals output by the pulse signal generator. A pulse signal generator; A microcomputer, the pulse signal converter; A delay unit for delaying a pulse signal output by the pulse signal generator for a predetermined time; A first AND gate generating a second pulse signal by logically multiplying output signals of the pulse signal generator and the delay unit; First and second inverters for inverting output signals of the pulse signal generator and the delay unit, respectively; And a first AND gate generating a second pulse signal by performing a logical multiplication on the output signals of the first and second inverters.

In addition, the first switching means; First and second transistors turned on and off in response to the first pulse signal, and a first transistor, the capacitor and the second transistor are connected in series to an output terminal of the power supply circuit portion, and the second switching means comprises: And third and fourth transistors turned on and off according to the second pulse signal, and a third transistor, the condenser, and a fourth transistor are connected in series to an output terminal of the power supply circuit unit.

1 is a conventional negative voltage generation circuit diagram,

2 is a circuit diagram showing an embodiment of a negative voltage generation circuit of the present invention;

3 is a waveform diagram showing a pulse signal output by the microcomputer of FIG.

4 is a circuit diagram showing another embodiment of the negative voltage generation circuit of the present invention;

5 is a waveform diagram of each part of FIG. 4.

* Description of the symbols for the main parts of the drawings *

20: microcomputer 22: power circuit

24 load 26 first switching means

28 second switching means 40 pulse signal generating means

42: pulse signal converter 44: delay

C21: Capacitor AND41, AND42: And Gate

INV41, INV42: Inverter Q21 to Q24: First to fourth transistors

P20, P21: first and second pulse signal

Hereinafter, the negative voltage generating circuit of the present invention will be described in detail with reference to the accompanying drawings of FIGS. 2 to 5.

2 is a circuit diagram showing an embodiment of a negative voltage generation circuit of the present invention.

Reference numeral 20 denotes a microcomputer as pulse signal generating means.

The microcomputer 20 has two output terminals, and outputs first and second pulse signals P20 and P21 of predetermined periods in which phases are inverted from each other to the two output terminals.

Reference numeral 22 is a power supply circuit portion for outputting a power supply voltage, and reference numeral 24 is a load driven by using a positive voltage and a negative voltage as operating voltages.

Reference numeral 26 is a first switching means.

The first switching means 26 includes two transistors Q21 and Q22 that are turned on and off in accordance with the first pulse signal P20 output by the microcomputer 20. P20 is connected to be applied to the base of transistors Q21 and Q22 so that the positive voltage output from the power supply circuit section 22 is applied to the collector of transistor Q21, and the emitter of transistor Q21 is connected to a capacitor ( It is connected to the collector of transistor Q22 via C21, and the emitter of transistor Q22 is grounded.

Reference numeral 28 is a second switching means.

The second switching means 28 includes two transistors Q23 and Q24 which are turned on and off in accordance with the second pulse signal P21 outputted by the microcomputer 20. P21 is connected to be applied to the base of transistors Q23 and Q24 so that the emitter of transistor Q23 is grounded, and the collector of transistor Q23 is connected to the emitter of transistor Q24 through the capacitor C21. The collector of transistor Q24 is connected to the negative voltage terminal (-) of the load 24.

In the negative voltage generating circuit of the present invention configured as described above, the microcomputer 20, which is a pulse signal generating means, in the state in which the power supply circuit section 22 outputs a positive voltage at a predetermined level, is used as an output terminal of FIGS. 3A and 3B. As shown in FIG. 1, the first and second pulse signals P20 and P21 of predetermined periods having opposite phases are outputted, and the first and second pulse signals P20 and P21 that are output are generated by the first and second pulse signals P20 and P21. Commonly applied to the bases of the transistors Q21 and Q22 of the first switching means 26 and the bases of the transistors Q23 and Q24 of the second switching means 28, respectively.

Then, the transistor Q21 (Q22) of the first switching means 26 during the period in which the microcomputer 20 outputs the first pulse signal P20 at high potential and the second pulse signal P21 at low potential. ) Is turned on, and the transistors Q23 and Q24 of the second switching means 28 are turned off, so that the positive power output from the power supply circuit section 22 causes the transistor Q21, the capacitor C21 and the transistor Q22 to be turned off. While sequentially flowing to ground, the capacitor C21 is charged with a voltage of a predetermined level, that is, a voltage having the same level as that of the plus voltage output from the power supply circuit unit 22.

In this state, when the microcomputer 20 outputs the first pulse signal P20 at low potential and the second pulse signal P21 outputs a high potential, the first switching means 26 is reversed. Transistors Q21 and Q22 are turned off, and the transistors Q23 and Q24 of the second switching means 28 are turned on.

Then, the polarity of the voltage charged in the capacitor C21 is inverted so that the negative voltage is output, i.e., from the ground to the negative terminal (-) of the load 24 through the transistor Q23, the capacitor C21 and the transistor Q24. Since the current flows, the charging voltage of the capacitor C21 is discharged, and the negative terminal (-) of the load 24 is supplied to supply a negative voltage having the same polarity and the same polarity and the opposite polarity, which are output from the power supply circuit unit 22. Done.

Here, when the transistors Q21 and Q23 (Q22 and Q24) are turned on at the same time, overcurrent flows to the transistors Q21 and Q23 (Q22 and Q24) and is damaged.

Therefore, in the present invention, as shown in FIG. 3A and FIG. 3B, when the microcomputer 20 inverts the phase of the first and second pulse signals output to the output terminal, two pulse signals are predetermined. The transistors Q21 and Q23 (Q22 and Q24) are not turned on at the same time by maintaining the low potential for the time t.

4 is a circuit diagram showing another embodiment of the negative voltage generation circuit of the present invention.

Reference numeral 40 is a pulse signal generating means of the present invention.

The pulse signal generating means 40 is a pulse signal output from the microcomputer 20, which is a pulse signal generator for generating one pulse signal at a predetermined period, and a pulse signal output from the microcomputer 20, and the phases are opposite to each other. In this case, the pulse signal converter 42 generates the first and second pulse signals each having a section for maintaining the low potential.

The pulse signal converter 42 includes a delay unit 44 for delaying a pulse signal output from the microcomputer 20 for a predetermined time, and outputs from the microcomputer 20 and the delay unit 44. Logically multiplying the pulse signal to generate the first AND gate AND41 for generating the first pulse signal P20, and the first and second for inverting the pulse signals output from the microcomputer 20 and the delayer 44, respectively. An inverter INV41 (INV42) and a second AND gate AND42 for generating a second pulse signal P21 by logically multiplying the output signals of the first and second inverters INV41 and INV42.

According to another embodiment of the present invention configured as described above, the microcomputer 20 which is the pulse generator of the pulse signal generating means 40 in the state where the power supply circuit unit 22 outputs the power supply voltage is predetermined as shown in FIG. A pulse signal of a period is output, and the pulse signal of the predetermined period is delayed and output for a predetermined time as shown in FIG. 5B through the delay unit 44 of the pulse signal converter 42.

In this manner, the pulse signal of the predetermined period outputted by the microcomputer 20 and the pulse signal delayed by the delay unit 44 of the pulse signal converter 42 are logically multiplied by the first AND gate AND41.

In addition, the pulse signal of the predetermined period outputted by the microcomputer 20 and the pulse signal delayed by the delay unit 44 of the pulse signal conversion unit 42 are transmitted through the first and second inverters INV41 and INV42. Is inverted and then logically multiplied at the second AND gate AND42 as shown in FIG.

Therefore, the first and second AND gates AND41 (AND42) are different from each other as shown in FIGS. 5C and 5F, and for a predetermined time t when the phases are reversed. The first and second pulse signals P20 and P21 maintaining the low potential are respectively output.

In this way, the first and second pulse signals P20 and P21 output by the first and second AND gates AND41 and AND42 of the pulse signal conversion unit 42 of the pulse signal generating unit 40 are transistors Q22. As applied to the base of Q21, the transistors Q22 and Q21 are alternately turned on and off as in the above-described embodiment, and the capacitor C21 receives twice the voltage of the power voltage output from the power supply circuit 22. The double voltage generated by the capacitor C21 is rectified and smoothed through the rectifying unit 24 to output the double voltage.

As described above, according to the present invention, the first and second pulse signals in which phases are inverted from each other without using a separate switching transformer, etc., and the same level as the plus voltage generated by the power generator using a transistor and a capacitor are generated. It can be manufactured at low cost as it generates negative voltages with opposite polarities, and can be made compact, as well as integrated, and also has little switching noise, high efficiency, and the like.

Claims (11)

(delete) (delete) (delete) (delete) (delete) (Correction) a power supply circuit section for generating a positive voltage at a predetermined level; A capacitor for charging and discharging the output power of the power circuit portion; Pulse signal generating means for generating a pulse signal at a predetermined period; And A delayer for delaying the pulse signal output by the pulse signal generating means for a predetermined time; A first AND gate generating a first pulse signal by logically multiplying an output signal of the pulse signal generating means and the delay unit; First and second inverters for inverting output signals of the pulse signal generating means and the delay unit, respectively; And A second AND gate generating a second pulse signal by logically multiplying output signals of the first and second inverters; First switching means for causing the capacitor to charge the output plus voltage of the power supply circuit part when the power is turned on, off and on according to a first pulse signal output from the first AND gate; And a second switching means for outputting a negative voltage by inverting the polarity of the voltage charged in the capacitor when it is turned on, off and on according to the second pulse signal output from the second and gate. Circuit. (Correction) The method according to claim 6, wherein the first switching means; And a first transistor and a second transistor turned on and off in response to the first pulse signal, wherein a first transistor, the capacitor, and a second transistor are connected in series with an output terminal of the power supply circuit unit. (Correction) The method according to claim 7, wherein the second switching means; And a third and fourth transistors turned on and off in response to the second pulse signal, wherein the third transistor, the capacitor, and the fourth transistor are connected in series to an output terminal of the power circuit portion. Circuit. (New) The first and second pulse signals output from the first and second end gates are in phase so that the first and second transistors and the third and fourth transistors are not turned on at the same time. The negative voltage generating circuit, characterized in that all of the low potential is maintained for a predetermined time (t) when inverted. (Newly established) a power supply circuit section for generating a positive voltage at a predetermined level; A capacitor for charging output power of the power circuit unit and discharging the charged power; A pulse signal generator for generating first and second pulse signals of opposite phases to each other; And The first pulse is output from the pulse signal converter is configured to be connected to the collector of the first transistor, the collector of the first transistor is connected to the output terminal of the power circuit unit, the capacitor is connected to the emitter of the first transistor First and second transistors for causing the capacitor to charge the output plus voltage of the power supply circuit portion when the signal is turned on and off and turned on according to a signal; A collector and an emitter are connected to both ends of the capacitor, respectively, and are simultaneously turned on and off according to a second pulse signal output from the pulse signal generator. The negative voltage generating circuit, characterized in that consisting of the third and fourth transistors for outputting. (New) The pulse signal generator according to claim 10, wherein A microcomputer generating a pulse signal at a predetermined cycle; A delayer for delaying a pulse signal output from the microcomputer for a predetermined time; A first AND gate generating a first pulse signal by logically multiplying an output signal of the microcomputer and the delay unit; First and second inverters for inverting output signals of the microcomputer and the delayer, respectively; And And a second AND gate configured to generate a second pulse signal by logically multiplying output signals of the first and second inverters.